memory-map.h 2.2 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566
  1. /*
  2. * Copyright (C) 2005-2006 Atmel Corporation
  3. *
  4. * See file CREDITS for list of people who contributed to this
  5. * project.
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License as
  9. * published by the Free Software Foundation; either version 2 of
  10. * the License, or (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  20. * MA 02111-1307 USA
  21. */
  22. #ifndef __AT32AP7000_MEMORY_MAP_H__
  23. #define __AT32AP7000_MEMORY_MAP_H__
  24. /* Devices on the High Speed Bus (HSB) */
  25. #define LCDC_BASE 0xFF000000
  26. #define DMAC_BASE 0xFF200000
  27. #define USB_FIFO 0xFF300000
  28. /* Devices on Peripheral Bus A (PBA) */
  29. #define SPI0_BASE 0xFFE00000
  30. #define SPI1_BASE 0xFFE00400
  31. #define TWI_BASE 0xFFE00800
  32. #define USART0_BASE 0xFFE00C00
  33. #define USART1_BASE 0xFFE01000
  34. #define USART2_BASE 0xFFE01400
  35. #define USART3_BASE 0xFFE01800
  36. #define SSC0_BASE 0xFFE01C00
  37. #define SSC1_BASE 0xFFE02000
  38. #define SSC2_BASE 0xFFE02400
  39. #define PIOA_BASE 0xFFE02800
  40. #define PIOB_BASE 0xFFE02C00
  41. #define PIOC_BASE 0xFFE03000
  42. #define PIOD_BASE 0xFFE03400
  43. #define PIOE_BASE 0xFFE03800
  44. #define PSIF_BASE 0xFFE03C00
  45. /* Devices on Peripheral Bus B (PBB) */
  46. #define SM_BASE 0xFFF00000
  47. #define INTC_BASE 0xFFF00400
  48. #define HMATRIX_BASE 0xFFF00800
  49. #define TIMER0_BASE 0xFFF00C00
  50. #define TIMER1_BASE 0xFFF01000
  51. #define PWM_BASE 0xFFF01400
  52. #define MACB0_BASE 0xFFF01800
  53. #define MACB1_BASE 0xFFF01C00
  54. #define DAC_BASE 0xFFF02000
  55. #define MMCI_BASE 0xFFF02400
  56. #define AUDIOC_BASE 0xFFF02800
  57. #define HISI_BASE 0xFFF02C00
  58. #define USB_BASE 0xFFF03000
  59. #define HSMC_BASE 0xFFF03400
  60. #define HSDRAMC_BASE 0xFFF03800
  61. #define ECC_BASE 0xFFF03C00
  62. #endif /* __AT32AP7000_MEMORY_MAP_H__ */