omap5912osk.c 9.0 KB

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  1. /*
  2. * (C) Copyright 2002
  3. * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
  4. * Marius Groeger <mgroeger@sysgo.de>
  5. *
  6. * (C) Copyright 2002
  7. * David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
  8. *
  9. * (C) Copyright 2003
  10. * Texas Instruments, <www.ti.com>
  11. * Kshitij Gupta <Kshitij@ti.com>
  12. *
  13. * (C) Copyright 2004
  14. * Texas Instruments, <www.ti.com>
  15. * Rishi Bhattacharya <rishi@ti.com>
  16. *
  17. * See file CREDITS for list of people who contributed to this
  18. * project.
  19. *
  20. * This program is free software; you can redistribute it and/or
  21. * modify it under the terms of the GNU General Public License as
  22. * published by the Free Software Foundation; either version 2 of
  23. * the License, or (at your option) any later version.
  24. *
  25. * This program is distributed in the hope that it will be useful,
  26. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  27. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  28. * GNU General Public License for more details.
  29. *
  30. * You should have received a copy of the GNU General Public License
  31. * along with this program; if not, write to the Free Software
  32. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  33. * MA 02111-1307 USA
  34. */
  35. #include <common.h>
  36. #include <netdev.h>
  37. #if defined(CONFIG_OMAP1610)
  38. #include <./configs/omap1510.h>
  39. #endif
  40. DECLARE_GLOBAL_DATA_PTR;
  41. void flash__init (void);
  42. void ether__init (void);
  43. void set_muxconf_regs (void);
  44. void peripheral_power_enable (void);
  45. #define COMP_MODE_ENABLE ((unsigned int)0x0000EAEF)
  46. static inline void delay (unsigned long loops)
  47. {
  48. __asm__ volatile ("1:\n"
  49. "subs %0, %1, #1\n"
  50. "bne 1b":"=r" (loops):"0" (loops));
  51. }
  52. /*
  53. * Miscellaneous platform dependent initialisations
  54. */
  55. int board_init (void)
  56. {
  57. gd->bd->bi_arch_number = MACH_TYPE_OMAP_OSK;
  58. /* adress of boot parameters */
  59. gd->bd->bi_boot_params = 0x10000100;
  60. /* Configure MUX settings */
  61. set_muxconf_regs ();
  62. peripheral_power_enable ();
  63. /* this speeds up your boot a quite a bit. However to make it
  64. * work, you need make sure your kernel startup flush bug is fixed.
  65. * ... rkw ...
  66. */
  67. icache_enable ();
  68. flash__init ();
  69. ether__init ();
  70. return 0;
  71. }
  72. /******************************
  73. Routine:
  74. Description:
  75. ******************************/
  76. void flash__init (void)
  77. {
  78. #define EMIFS_GlB_Config_REG 0xfffecc0c
  79. unsigned int regval;
  80. regval = *((volatile unsigned int *) EMIFS_GlB_Config_REG);
  81. /* Turn off write protection for flash devices. */
  82. regval = regval | 0x0001;
  83. *((volatile unsigned int *) EMIFS_GlB_Config_REG) = regval;
  84. }
  85. /*************************************************************
  86. Routine:ether__init
  87. Description: take the Ethernet controller out of reset and wait
  88. for the EEPROM load to complete.
  89. *************************************************************/
  90. void ether__init (void)
  91. {
  92. #define ETH_CONTROL_REG 0x0480000b
  93. int i;
  94. *((volatile unsigned short *) 0xfffece08) = 0x03FF;
  95. *((volatile unsigned short *) 0xfffb3824) = 0x8000;
  96. *((volatile unsigned short *) 0xfffb3830) = 0x0000;
  97. *((volatile unsigned short *) 0xfffb3834) = 0x0009;
  98. *((volatile unsigned short *) 0xfffb3838) = 0x0009;
  99. *((volatile unsigned short *) 0xfffb3818) = 0x0002;
  100. *((volatile unsigned short *) 0xfffb382C) = 0x0048;
  101. *((volatile unsigned short *) 0xfffb3824) = 0x8603;
  102. udelay (3);
  103. for (i=0;i<2000;i++);
  104. *((volatile unsigned short *) 0xfffb381C) = 0x6610;
  105. udelay (30);
  106. for (i=0;i<10000;i++);
  107. *((volatile unsigned char *) ETH_CONTROL_REG) &= ~0x01;
  108. udelay (3);
  109. }
  110. /******************************
  111. Routine:
  112. Description:
  113. ******************************/
  114. int dram_init (void)
  115. {
  116. gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
  117. gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
  118. return 0;
  119. }
  120. /******************************************************
  121. Routine: set_muxconf_regs
  122. Description: Setting up the configuration Mux registers
  123. specific to the hardware
  124. *******************************************************/
  125. void set_muxconf_regs (void)
  126. {
  127. volatile unsigned int *MuxConfReg;
  128. /* set each registers to its reset value; */
  129. MuxConfReg =
  130. (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_0);
  131. /* setup for UART1 */
  132. *MuxConfReg &= ~(0x02000000); /* bit 25 */
  133. /* setup for UART2 */
  134. *MuxConfReg &= ~(0x01000000); /* bit 24 */
  135. /* Disable Uwire CS Hi-Z */
  136. *MuxConfReg |= 0x08000000;
  137. MuxConfReg =
  138. (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_3);
  139. *MuxConfReg = 0x00000000;
  140. MuxConfReg =
  141. (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_4);
  142. *MuxConfReg = 0x00000000;
  143. MuxConfReg =
  144. (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_5);
  145. *MuxConfReg = 0x00000000;
  146. MuxConfReg =
  147. (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_6);
  148. /*setup mux for UART3 */
  149. *MuxConfReg |= 0x00000001; /* bit3, 1, 0 (mux0 5,5,26) */
  150. *MuxConfReg &= ~0x0000003e;
  151. MuxConfReg =
  152. (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_7);
  153. *MuxConfReg = 0x00000000;
  154. MuxConfReg =
  155. (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_8);
  156. /* Disable Uwire CS Hi-Z */
  157. *MuxConfReg |= 0x00001200; /*bit 9 for CS0 12 for CS3 */
  158. MuxConfReg =
  159. (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_9);
  160. /* Need to turn on bits 21 and 12 in FUNC_MUX_CTRL_9 so the */
  161. /* hardware will actually use TX and RTS based on bit 25 in */
  162. /* FUNC_MUX_CTRL_0. I told you this thing was screwy! */
  163. *MuxConfReg |= 0x00201000;
  164. MuxConfReg =
  165. (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_A);
  166. *MuxConfReg = 0x00000000;
  167. MuxConfReg =
  168. (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_B);
  169. *MuxConfReg = 0x00000000;
  170. MuxConfReg =
  171. (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_C);
  172. /* setup for UART2 */
  173. /* Need to turn on bits 27 and 24 in FUNC_MUX_CTRL_C so the */
  174. /* hardware will actually use TX and RTS based on bit 24 in */
  175. /* FUNC_MUX_CTRL_0. */
  176. *MuxConfReg |= 0x09000000;
  177. MuxConfReg =
  178. (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_D);
  179. *MuxConfReg |= 0x00000020;
  180. MuxConfReg =
  181. (volatile unsigned int *) ((unsigned int) PULL_DWN_CTRL_0);
  182. *MuxConfReg = 0x00000000;
  183. MuxConfReg =
  184. (volatile unsigned int *) ((unsigned int) PULL_DWN_CTRL_1);
  185. *MuxConfReg = 0x00000000;
  186. /* mux setup for SD/MMC driver */
  187. MuxConfReg =
  188. (volatile unsigned int *) ((unsigned int) PULL_DWN_CTRL_2);
  189. *MuxConfReg &= 0xFFFE0FFF;
  190. MuxConfReg =
  191. (volatile unsigned int *) ((unsigned int) PULL_DWN_CTRL_3);
  192. *MuxConfReg = 0x00000000;
  193. MuxConfReg =
  194. (volatile unsigned int *) ((unsigned int) MOD_CONF_CTRL_0);
  195. /* bit 13 for MMC2 XOR_CLK */
  196. *MuxConfReg &= ~(0x00002000);
  197. /* bit 29 for UART 1 */
  198. *MuxConfReg &= ~(0x00002000);
  199. MuxConfReg =
  200. (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_0);
  201. /* Configure for USB. Turn on VBUS_CTRL and VBUS_MODE. */
  202. *MuxConfReg |= 0x000C0000;
  203. MuxConfReg =
  204. (volatile unsigned int *) ((unsigned int)USB_TRANSCEIVER_CTRL);
  205. *MuxConfReg &= ~(0x00000070);
  206. *MuxConfReg &= ~(0x00000008);
  207. *MuxConfReg |= 0x00000003;
  208. *MuxConfReg |= 0x00000180;
  209. MuxConfReg =
  210. (volatile unsigned int *) ((unsigned int) MOD_CONF_CTRL_0);
  211. /* bit 17, software controls VBUS */
  212. *MuxConfReg &= ~(0x00020000);
  213. /* Enable USB 48 and 12M clocks */
  214. *MuxConfReg |= 0x00000200;
  215. *MuxConfReg &= ~(0x00000180);
  216. /*2.75V for MMCSDIO1 */
  217. MuxConfReg =
  218. (volatile unsigned int *) ((unsigned int) VOLTAGE_CTRL_0);
  219. *MuxConfReg = 0x00001FE7;
  220. MuxConfReg =
  221. (volatile unsigned int *) ((unsigned int) PU_PD_SEL_0);
  222. *MuxConfReg = 0x00000000;
  223. MuxConfReg =
  224. (volatile unsigned int *) ((unsigned int) PU_PD_SEL_1);
  225. *MuxConfReg = 0x00000000;
  226. MuxConfReg =
  227. (volatile unsigned int *) ((unsigned int) PU_PD_SEL_2);
  228. *MuxConfReg = 0x00000000;
  229. MuxConfReg =
  230. (volatile unsigned int *) ((unsigned int) PU_PD_SEL_3);
  231. *MuxConfReg = 0x00000000;
  232. MuxConfReg =
  233. (volatile unsigned int *) ((unsigned int) PU_PD_SEL_4);
  234. *MuxConfReg = 0x00000000;
  235. MuxConfReg =
  236. (volatile unsigned int *) ((unsigned int) PULL_DWN_CTRL_4);
  237. *MuxConfReg = 0x00000000;
  238. /* Turn on UART2 48 MHZ clock */
  239. MuxConfReg =
  240. (volatile unsigned int *) ((unsigned int) MOD_CONF_CTRL_0);
  241. *MuxConfReg |= 0x40000000;
  242. MuxConfReg =
  243. (volatile unsigned int *) ((unsigned int) USB_OTG_CTRL);
  244. /* setup for USB VBus detection OMAP161x */
  245. *MuxConfReg |= 0x00040000; /* bit 18 */
  246. MuxConfReg =
  247. (volatile unsigned int *) ((unsigned int) PU_PD_SEL_2);
  248. /* PullUps for SD/MMC driver */
  249. *MuxConfReg |= ~(0xFFFE0FFF);
  250. MuxConfReg =
  251. (volatile unsigned int *) ((unsigned int)COMP_MODE_CTRL_0);
  252. *MuxConfReg = COMP_MODE_ENABLE;
  253. }
  254. /******************************************************
  255. Routine: peripheral_power_enable
  256. Description: Enable the power for UART1
  257. *******************************************************/
  258. void peripheral_power_enable (void)
  259. {
  260. #define UART1_48MHZ_ENABLE ((unsigned short)0x0200)
  261. #define SW_CLOCK_REQUEST ((volatile unsigned short *)0xFFFE0834)
  262. *SW_CLOCK_REQUEST |= UART1_48MHZ_ENABLE;
  263. }
  264. /*
  265. * Check Board Identity
  266. */
  267. int checkboard(void)
  268. {
  269. char buf[64];
  270. int i = getenv_f("serial#", buf, sizeof(buf));
  271. puts("Board: OSK5912");
  272. if (i > 0) {
  273. puts(", serial# ");
  274. puts(buf);
  275. }
  276. putc('\n');
  277. return (0);
  278. }
  279. #ifdef CONFIG_CMD_NET
  280. int board_eth_init(bd_t *bis)
  281. {
  282. int rc = 0;
  283. #ifdef CONFIG_LAN91C96
  284. rc = lan91c96_initialize(0, CONFIG_LAN91C96_BASE);
  285. #endif
  286. return rc;
  287. }
  288. #endif