snapper9260.c 4.8 KB

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  1. /*
  2. * Bluewater Systems Snapper 9260/9G20 modules
  3. *
  4. * (C) Copyright 2011 Bluewater Systems
  5. * Author: Andre Renaud <andre@bluewatersys.com>
  6. * Author: Ryan Mallon <ryan@bluewatersys.com>
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. */
  23. #include <common.h>
  24. #include <asm/io.h>
  25. #include <asm/arch/at91sam9260_matrix.h>
  26. #include <asm/arch/at91sam9_smc.h>
  27. #include <asm/arch/at91_common.h>
  28. #include <asm/arch/at91_pmc.h>
  29. #include <asm/arch/at91_rstc.h>
  30. #include <asm/arch/gpio.h>
  31. #include <net.h>
  32. #include <netdev.h>
  33. #include <i2c.h>
  34. #include <pca953x.h>
  35. DECLARE_GLOBAL_DATA_PTR;
  36. /* IO Expander pins */
  37. #define IO_EXP_ETH_RESET (0 << 1)
  38. #define IO_EXP_ETH_POWER (1 << 1)
  39. static void macb_hw_init(void)
  40. {
  41. struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
  42. struct at91_port *pioa = (struct at91_port *)ATMEL_BASE_PIOA;
  43. struct at91_rstc *rstc = (struct at91_rstc *)ATMEL_BASE_RSTC;
  44. unsigned long erstl;
  45. /* Enable clock */
  46. writel(1 << ATMEL_ID_EMAC0, &pmc->pcer);
  47. /* Disable pull-ups to prevent PHY going into test mode */
  48. writel(pin_to_mask(AT91_PIN_PA14) |
  49. pin_to_mask(AT91_PIN_PA15) |
  50. pin_to_mask(AT91_PIN_PA18),
  51. &pioa->pudr);
  52. /* Power down ethernet */
  53. pca953x_set_dir(0x28, IO_EXP_ETH_POWER, PCA953X_DIR_OUT);
  54. pca953x_set_val(0x28, IO_EXP_ETH_POWER, 1);
  55. /* Hold ethernet in reset */
  56. pca953x_set_dir(0x28, IO_EXP_ETH_RESET, PCA953X_DIR_OUT);
  57. pca953x_set_val(0x28, IO_EXP_ETH_RESET, 0);
  58. /* Enable ethernet power */
  59. pca953x_set_val(0x28, IO_EXP_ETH_POWER, 0);
  60. /* Need to reset PHY -> 500ms reset */
  61. erstl = readl(&rstc->mr) & AT91_RSTC_MR_ERSTL_MASK;
  62. writel(AT91_RSTC_KEY | AT91_RSTC_MR_ERSTL(13) |
  63. AT91_RSTC_MR_URSTEN, &rstc->mr);
  64. writel(AT91_RSTC_KEY | AT91_RSTC_CR_EXTRST, &rstc->cr);
  65. /* Wait for end hardware reset */
  66. while (!(readl(&rstc->sr) & AT91_RSTC_SR_NRSTL))
  67. ;
  68. /* Restore NRST value */
  69. writel(AT91_RSTC_KEY | erstl | AT91_RSTC_MR_URSTEN, &rstc->mr);
  70. /* Bring the ethernet out of reset */
  71. pca953x_set_val(0x28, IO_EXP_ETH_RESET, 1);
  72. /* The phy internal reset take 21ms */
  73. udelay(21 * 1000);
  74. /* Re-enable pull-up */
  75. writel(pin_to_mask(AT91_PIN_PA14) |
  76. pin_to_mask(AT91_PIN_PA15) |
  77. pin_to_mask(AT91_PIN_PA18),
  78. &pioa->puer);
  79. at91_macb_hw_init();
  80. }
  81. static void nand_hw_init(void)
  82. {
  83. struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
  84. struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX;
  85. unsigned long csa;
  86. /* Enable CS3 as NAND/SmartMedia */
  87. csa = readl(&matrix->ebicsa);
  88. csa |= AT91_MATRIX_CS3A_SMC_SMARTMEDIA;
  89. writel(csa, &matrix->ebicsa);
  90. /* Configure SMC CS3 for NAND/SmartMedia */
  91. writel(AT91_SMC_SETUP_NWE(2) | AT91_SMC_SETUP_NCS_WR(0) |
  92. AT91_SMC_SETUP_NRD(2) | AT91_SMC_SETUP_NCS_RD(0),
  93. &smc->cs[3].setup);
  94. writel(AT91_SMC_PULSE_NWE(4) | AT91_SMC_PULSE_NCS_WR(4) |
  95. AT91_SMC_PULSE_NRD(4) | AT91_SMC_PULSE_NCS_RD(4),
  96. &smc->cs[3].pulse);
  97. writel(AT91_SMC_CYCLE_NWE(7) | AT91_SMC_CYCLE_NRD(7),
  98. &smc->cs[3].cycle);
  99. writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
  100. AT91_SMC_MODE_EXNW_DISABLE |
  101. AT91_SMC_MODE_DBW_8 |
  102. AT91_SMC_MODE_TDF_CYCLE(3),
  103. &smc->cs[3].mode);
  104. /* Configure RDY/BSY */
  105. at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1);
  106. /* Enable NandFlash */
  107. at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
  108. }
  109. int board_init(void)
  110. {
  111. struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
  112. /* Enable PIO clocks */
  113. writel((1 << ATMEL_ID_PIOA) |
  114. (1 << ATMEL_ID_PIOB) |
  115. (1 << ATMEL_ID_PIOC), &pmc->pcer);
  116. /* The mach-type is the same for both Snapper 9260 and 9G20 */
  117. gd->bd->bi_arch_number = MACH_TYPE_SNAPPER_9260;
  118. /* Address of boot parameters */
  119. gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
  120. /* Initialise peripherals */
  121. at91_seriald_hw_init();
  122. i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
  123. nand_hw_init();
  124. macb_hw_init();
  125. return 0;
  126. }
  127. int board_eth_init(bd_t *bis)
  128. {
  129. return macb_eth_initialize(0, (void *)ATMEL_BASE_EMAC0, 0x1f);
  130. }
  131. int dram_init(void)
  132. {
  133. gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
  134. CONFIG_SYS_SDRAM_SIZE);
  135. return 0;
  136. }
  137. void reset_phy(void)
  138. {
  139. }