ehci-hcd.c 20 KB

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  1. /*-
  2. * Copyright (c) 2007-2008, Juniper Networks, Inc.
  3. * Copyright (c) 2008, Excito Elektronik i Skåne AB
  4. * Copyright (c) 2008, Michael Trimarchi <trimarchimichael@yahoo.it>
  5. *
  6. * All rights reserved.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation version 2 of
  11. * the License.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. */
  23. #include <common.h>
  24. #include <asm/byteorder.h>
  25. #include <usb.h>
  26. #include <asm/io.h>
  27. #include <malloc.h>
  28. #include <watchdog.h>
  29. #include "ehci.h"
  30. int rootdev;
  31. struct ehci_hccr *hccr; /* R/O registers, not need for volatile */
  32. volatile struct ehci_hcor *hcor;
  33. static uint16_t portreset;
  34. static struct QH qh_list __attribute__((aligned(32)));
  35. static struct descriptor {
  36. struct usb_hub_descriptor hub;
  37. struct usb_device_descriptor device;
  38. struct usb_linux_config_descriptor config;
  39. struct usb_linux_interface_descriptor interface;
  40. struct usb_endpoint_descriptor endpoint;
  41. } __attribute__ ((packed)) descriptor = {
  42. {
  43. 0x8, /* bDescLength */
  44. 0x29, /* bDescriptorType: hub descriptor */
  45. 2, /* bNrPorts -- runtime modified */
  46. 0, /* wHubCharacteristics */
  47. 10, /* bPwrOn2PwrGood */
  48. 0, /* bHubCntrCurrent */
  49. {}, /* Device removable */
  50. {} /* at most 7 ports! XXX */
  51. },
  52. {
  53. 0x12, /* bLength */
  54. 1, /* bDescriptorType: UDESC_DEVICE */
  55. cpu_to_le16(0x0200), /* bcdUSB: v2.0 */
  56. 9, /* bDeviceClass: UDCLASS_HUB */
  57. 0, /* bDeviceSubClass: UDSUBCLASS_HUB */
  58. 1, /* bDeviceProtocol: UDPROTO_HSHUBSTT */
  59. 64, /* bMaxPacketSize: 64 bytes */
  60. 0x0000, /* idVendor */
  61. 0x0000, /* idProduct */
  62. cpu_to_le16(0x0100), /* bcdDevice */
  63. 1, /* iManufacturer */
  64. 2, /* iProduct */
  65. 0, /* iSerialNumber */
  66. 1 /* bNumConfigurations: 1 */
  67. },
  68. {
  69. 0x9,
  70. 2, /* bDescriptorType: UDESC_CONFIG */
  71. cpu_to_le16(0x19),
  72. 1, /* bNumInterface */
  73. 1, /* bConfigurationValue */
  74. 0, /* iConfiguration */
  75. 0x40, /* bmAttributes: UC_SELF_POWER */
  76. 0 /* bMaxPower */
  77. },
  78. {
  79. 0x9, /* bLength */
  80. 4, /* bDescriptorType: UDESC_INTERFACE */
  81. 0, /* bInterfaceNumber */
  82. 0, /* bAlternateSetting */
  83. 1, /* bNumEndpoints */
  84. 9, /* bInterfaceClass: UICLASS_HUB */
  85. 0, /* bInterfaceSubClass: UISUBCLASS_HUB */
  86. 0, /* bInterfaceProtocol: UIPROTO_HSHUBSTT */
  87. 0 /* iInterface */
  88. },
  89. {
  90. 0x7, /* bLength */
  91. 5, /* bDescriptorType: UDESC_ENDPOINT */
  92. 0x81, /* bEndpointAddress:
  93. * UE_DIR_IN | EHCI_INTR_ENDPT
  94. */
  95. 3, /* bmAttributes: UE_INTERRUPT */
  96. 8, /* wMaxPacketSize */
  97. 255 /* bInterval */
  98. },
  99. };
  100. #if defined(CONFIG_EHCI_IS_TDI)
  101. #define ehci_is_TDI() (1)
  102. #else
  103. #define ehci_is_TDI() (0)
  104. #endif
  105. void __ehci_powerup_fixup(uint32_t *status_reg, uint32_t *reg)
  106. {
  107. mdelay(50);
  108. }
  109. void ehci_powerup_fixup(uint32_t *status_reg, uint32_t *reg)
  110. __attribute__((weak, alias("__ehci_powerup_fixup")));
  111. static int handshake(uint32_t *ptr, uint32_t mask, uint32_t done, int usec)
  112. {
  113. uint32_t result;
  114. do {
  115. result = ehci_readl(ptr);
  116. udelay(5);
  117. if (result == ~(uint32_t)0)
  118. return -1;
  119. result &= mask;
  120. if (result == done)
  121. return 0;
  122. usec--;
  123. } while (usec > 0);
  124. return -1;
  125. }
  126. static int ehci_reset(void)
  127. {
  128. uint32_t cmd;
  129. uint32_t tmp;
  130. uint32_t *reg_ptr;
  131. int ret = 0;
  132. cmd = ehci_readl(&hcor->or_usbcmd);
  133. cmd = (cmd & ~CMD_RUN) | CMD_RESET;
  134. ehci_writel(&hcor->or_usbcmd, cmd);
  135. ret = handshake((uint32_t *)&hcor->or_usbcmd, CMD_RESET, 0, 250 * 1000);
  136. if (ret < 0) {
  137. printf("EHCI fail to reset\n");
  138. goto out;
  139. }
  140. if (ehci_is_TDI()) {
  141. reg_ptr = (uint32_t *)((u8 *)hcor + USBMODE);
  142. tmp = ehci_readl(reg_ptr);
  143. tmp |= USBMODE_CM_HC;
  144. #if defined(CONFIG_EHCI_MMIO_BIG_ENDIAN)
  145. tmp |= USBMODE_BE;
  146. #endif
  147. ehci_writel(reg_ptr, tmp);
  148. }
  149. #ifdef CONFIG_USB_EHCI_TXFIFO_THRESH
  150. cmd = ehci_readl(&hcor->or_txfilltuning);
  151. cmd &= ~TXFIFO_THRESH(0x3f);
  152. cmd |= TXFIFO_THRESH(CONFIG_USB_EHCI_TXFIFO_THRESH);
  153. ehci_writel(&hcor->or_txfilltuning, cmd);
  154. #endif
  155. out:
  156. return ret;
  157. }
  158. static int ehci_td_buffer(struct qTD *td, void *buf, size_t sz)
  159. {
  160. uint32_t delta, next;
  161. uint32_t addr = (uint32_t)buf;
  162. size_t rsz = roundup(sz, 32);
  163. int idx;
  164. if (sz != rsz)
  165. debug("EHCI-HCD: Misaligned buffer size (%08x)\n", sz);
  166. if (addr & 31)
  167. debug("EHCI-HCD: Misaligned buffer address (%p)\n", buf);
  168. idx = 0;
  169. while (idx < 5) {
  170. flush_dcache_range(addr, addr + rsz);
  171. td->qt_buffer[idx] = cpu_to_hc32(addr);
  172. td->qt_buffer_hi[idx] = 0;
  173. next = (addr + 4096) & ~4095;
  174. delta = next - addr;
  175. if (delta >= sz)
  176. break;
  177. sz -= delta;
  178. addr = next;
  179. idx++;
  180. }
  181. if (idx == 5) {
  182. debug("out of buffer pointers (%u bytes left)\n", sz);
  183. return -1;
  184. }
  185. return 0;
  186. }
  187. static int
  188. ehci_submit_async(struct usb_device *dev, unsigned long pipe, void *buffer,
  189. int length, struct devrequest *req)
  190. {
  191. static struct QH qh __attribute__((aligned(32)));
  192. static struct qTD qtd[3] __attribute__((aligned (32)));
  193. int qtd_counter = 0;
  194. volatile struct qTD *vtd;
  195. unsigned long ts;
  196. uint32_t *tdp;
  197. uint32_t endpt, token, usbsts;
  198. uint32_t c, toggle;
  199. uint32_t cmd;
  200. int timeout;
  201. int ret = 0;
  202. debug("dev=%p, pipe=%lx, buffer=%p, length=%d, req=%p\n", dev, pipe,
  203. buffer, length, req);
  204. if (req != NULL)
  205. debug("req=%u (%#x), type=%u (%#x), value=%u (%#x), index=%u\n",
  206. req->request, req->request,
  207. req->requesttype, req->requesttype,
  208. le16_to_cpu(req->value), le16_to_cpu(req->value),
  209. le16_to_cpu(req->index));
  210. memset(&qh, 0, sizeof(struct QH));
  211. memset(qtd, 0, sizeof(qtd));
  212. toggle = usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe));
  213. qh.qh_link = cpu_to_hc32((uint32_t)&qh_list | QH_LINK_TYPE_QH);
  214. c = (usb_pipespeed(pipe) != USB_SPEED_HIGH &&
  215. usb_pipeendpoint(pipe) == 0) ? 1 : 0;
  216. endpt = (8 << 28) |
  217. (c << 27) |
  218. (usb_maxpacket(dev, pipe) << 16) |
  219. (0 << 15) |
  220. (1 << 14) |
  221. (usb_pipespeed(pipe) << 12) |
  222. (usb_pipeendpoint(pipe) << 8) |
  223. (0 << 7) | (usb_pipedevice(pipe) << 0);
  224. qh.qh_endpt1 = cpu_to_hc32(endpt);
  225. endpt = (1 << 30) |
  226. (dev->portnr << 23) |
  227. (dev->parent->devnum << 16) | (0 << 8) | (0 << 0);
  228. qh.qh_endpt2 = cpu_to_hc32(endpt);
  229. qh.qh_overlay.qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
  230. tdp = &qh.qh_overlay.qt_next;
  231. if (req != NULL) {
  232. qtd[qtd_counter].qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
  233. qtd[qtd_counter].qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
  234. token = (0 << 31) |
  235. (sizeof(*req) << 16) |
  236. (0 << 15) | (0 << 12) | (3 << 10) | (2 << 8) | (0x80 << 0);
  237. qtd[qtd_counter].qt_token = cpu_to_hc32(token);
  238. if (ehci_td_buffer(&qtd[qtd_counter], req, sizeof(*req)) != 0) {
  239. debug("unable construct SETUP td\n");
  240. goto fail;
  241. }
  242. *tdp = cpu_to_hc32((uint32_t)&qtd[qtd_counter]);
  243. tdp = &qtd[qtd_counter++].qt_next;
  244. toggle = 1;
  245. }
  246. if (length > 0 || req == NULL) {
  247. qtd[qtd_counter].qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
  248. qtd[qtd_counter].qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
  249. token = (toggle << 31) |
  250. (length << 16) |
  251. ((req == NULL ? 1 : 0) << 15) |
  252. (0 << 12) |
  253. (3 << 10) |
  254. ((usb_pipein(pipe) ? 1 : 0) << 8) | (0x80 << 0);
  255. qtd[qtd_counter].qt_token = cpu_to_hc32(token);
  256. if (ehci_td_buffer(&qtd[qtd_counter], buffer, length) != 0) {
  257. debug("unable construct DATA td\n");
  258. goto fail;
  259. }
  260. *tdp = cpu_to_hc32((uint32_t)&qtd[qtd_counter]);
  261. tdp = &qtd[qtd_counter++].qt_next;
  262. }
  263. if (req != NULL) {
  264. qtd[qtd_counter].qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
  265. qtd[qtd_counter].qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
  266. token = (toggle << 31) |
  267. (0 << 16) |
  268. (1 << 15) |
  269. (0 << 12) |
  270. (3 << 10) |
  271. ((usb_pipein(pipe) ? 0 : 1) << 8) | (0x80 << 0);
  272. qtd[qtd_counter].qt_token = cpu_to_hc32(token);
  273. *tdp = cpu_to_hc32((uint32_t)&qtd[qtd_counter]);
  274. tdp = &qtd[qtd_counter++].qt_next;
  275. }
  276. qh_list.qh_link = cpu_to_hc32((uint32_t)&qh | QH_LINK_TYPE_QH);
  277. /* Flush dcache */
  278. flush_dcache_range((uint32_t)&qh_list,
  279. (uint32_t)&qh_list + sizeof(struct QH));
  280. flush_dcache_range((uint32_t)&qh, (uint32_t)&qh + sizeof(struct QH));
  281. flush_dcache_range((uint32_t)qtd, (uint32_t)qtd + sizeof(qtd));
  282. usbsts = ehci_readl(&hcor->or_usbsts);
  283. ehci_writel(&hcor->or_usbsts, (usbsts & 0x3f));
  284. /* Enable async. schedule. */
  285. cmd = ehci_readl(&hcor->or_usbcmd);
  286. cmd |= CMD_ASE;
  287. ehci_writel(&hcor->or_usbcmd, cmd);
  288. ret = handshake((uint32_t *)&hcor->or_usbsts, STD_ASS, STD_ASS,
  289. 100 * 1000);
  290. if (ret < 0) {
  291. printf("EHCI fail timeout STD_ASS set\n");
  292. goto fail;
  293. }
  294. /* Wait for TDs to be processed. */
  295. ts = get_timer(0);
  296. vtd = &qtd[qtd_counter - 1];
  297. timeout = USB_TIMEOUT_MS(pipe);
  298. do {
  299. /* Invalidate dcache */
  300. invalidate_dcache_range((uint32_t)&qh_list,
  301. (uint32_t)&qh_list + sizeof(struct QH));
  302. invalidate_dcache_range((uint32_t)&qh,
  303. (uint32_t)&qh + sizeof(struct QH));
  304. invalidate_dcache_range((uint32_t)qtd,
  305. (uint32_t)qtd + sizeof(qtd));
  306. token = hc32_to_cpu(vtd->qt_token);
  307. if (!(token & 0x80))
  308. break;
  309. WATCHDOG_RESET();
  310. } while (get_timer(ts) < timeout);
  311. /* Invalidate the memory area occupied by buffer */
  312. invalidate_dcache_range(((uint32_t)buffer & ~31),
  313. ((uint32_t)buffer & ~31) + roundup(length, 32));
  314. /* Check that the TD processing happened */
  315. if (token & 0x80) {
  316. printf("EHCI timed out on TD - token=%#x\n", token);
  317. }
  318. /* Disable async schedule. */
  319. cmd = ehci_readl(&hcor->or_usbcmd);
  320. cmd &= ~CMD_ASE;
  321. ehci_writel(&hcor->or_usbcmd, cmd);
  322. ret = handshake((uint32_t *)&hcor->or_usbsts, STD_ASS, 0,
  323. 100 * 1000);
  324. if (ret < 0) {
  325. printf("EHCI fail timeout STD_ASS reset\n");
  326. goto fail;
  327. }
  328. qh_list.qh_link = cpu_to_hc32((uint32_t)&qh_list | QH_LINK_TYPE_QH);
  329. token = hc32_to_cpu(qh.qh_overlay.qt_token);
  330. if (!(token & 0x80)) {
  331. debug("TOKEN=%#x\n", token);
  332. switch (token & 0xfc) {
  333. case 0:
  334. toggle = token >> 31;
  335. usb_settoggle(dev, usb_pipeendpoint(pipe),
  336. usb_pipeout(pipe), toggle);
  337. dev->status = 0;
  338. break;
  339. case 0x40:
  340. dev->status = USB_ST_STALLED;
  341. break;
  342. case 0xa0:
  343. case 0x20:
  344. dev->status = USB_ST_BUF_ERR;
  345. break;
  346. case 0x50:
  347. case 0x10:
  348. dev->status = USB_ST_BABBLE_DET;
  349. break;
  350. default:
  351. dev->status = USB_ST_CRC_ERR;
  352. if ((token & 0x40) == 0x40)
  353. dev->status |= USB_ST_STALLED;
  354. break;
  355. }
  356. dev->act_len = length - ((token >> 16) & 0x7fff);
  357. } else {
  358. dev->act_len = 0;
  359. debug("dev=%u, usbsts=%#x, p[1]=%#x, p[2]=%#x\n",
  360. dev->devnum, ehci_readl(&hcor->or_usbsts),
  361. ehci_readl(&hcor->or_portsc[0]),
  362. ehci_readl(&hcor->or_portsc[1]));
  363. }
  364. return (dev->status != USB_ST_NOT_PROC) ? 0 : -1;
  365. fail:
  366. return -1;
  367. }
  368. static inline int min3(int a, int b, int c)
  369. {
  370. if (b < a)
  371. a = b;
  372. if (c < a)
  373. a = c;
  374. return a;
  375. }
  376. int
  377. ehci_submit_root(struct usb_device *dev, unsigned long pipe, void *buffer,
  378. int length, struct devrequest *req)
  379. {
  380. uint8_t tmpbuf[4];
  381. u16 typeReq;
  382. void *srcptr = NULL;
  383. int len, srclen;
  384. uint32_t reg;
  385. uint32_t *status_reg;
  386. if (le16_to_cpu(req->index) > CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS) {
  387. printf("The request port(%d) is not configured\n",
  388. le16_to_cpu(req->index) - 1);
  389. return -1;
  390. }
  391. status_reg = (uint32_t *)&hcor->or_portsc[
  392. le16_to_cpu(req->index) - 1];
  393. srclen = 0;
  394. debug("req=%u (%#x), type=%u (%#x), value=%u, index=%u\n",
  395. req->request, req->request,
  396. req->requesttype, req->requesttype,
  397. le16_to_cpu(req->value), le16_to_cpu(req->index));
  398. typeReq = req->request | req->requesttype << 8;
  399. switch (typeReq) {
  400. case DeviceRequest | USB_REQ_GET_DESCRIPTOR:
  401. switch (le16_to_cpu(req->value) >> 8) {
  402. case USB_DT_DEVICE:
  403. debug("USB_DT_DEVICE request\n");
  404. srcptr = &descriptor.device;
  405. srclen = 0x12;
  406. break;
  407. case USB_DT_CONFIG:
  408. debug("USB_DT_CONFIG config\n");
  409. srcptr = &descriptor.config;
  410. srclen = 0x19;
  411. break;
  412. case USB_DT_STRING:
  413. debug("USB_DT_STRING config\n");
  414. switch (le16_to_cpu(req->value) & 0xff) {
  415. case 0: /* Language */
  416. srcptr = "\4\3\1\0";
  417. srclen = 4;
  418. break;
  419. case 1: /* Vendor */
  420. srcptr = "\16\3u\0-\0b\0o\0o\0t\0";
  421. srclen = 14;
  422. break;
  423. case 2: /* Product */
  424. srcptr = "\52\3E\0H\0C\0I\0 "
  425. "\0H\0o\0s\0t\0 "
  426. "\0C\0o\0n\0t\0r\0o\0l\0l\0e\0r\0";
  427. srclen = 42;
  428. break;
  429. default:
  430. debug("unknown value DT_STRING %x\n",
  431. le16_to_cpu(req->value));
  432. goto unknown;
  433. }
  434. break;
  435. default:
  436. debug("unknown value %x\n", le16_to_cpu(req->value));
  437. goto unknown;
  438. }
  439. break;
  440. case USB_REQ_GET_DESCRIPTOR | ((USB_DIR_IN | USB_RT_HUB) << 8):
  441. switch (le16_to_cpu(req->value) >> 8) {
  442. case USB_DT_HUB:
  443. debug("USB_DT_HUB config\n");
  444. srcptr = &descriptor.hub;
  445. srclen = 0x8;
  446. break;
  447. default:
  448. debug("unknown value %x\n", le16_to_cpu(req->value));
  449. goto unknown;
  450. }
  451. break;
  452. case USB_REQ_SET_ADDRESS | (USB_RECIP_DEVICE << 8):
  453. debug("USB_REQ_SET_ADDRESS\n");
  454. rootdev = le16_to_cpu(req->value);
  455. break;
  456. case DeviceOutRequest | USB_REQ_SET_CONFIGURATION:
  457. debug("USB_REQ_SET_CONFIGURATION\n");
  458. /* Nothing to do */
  459. break;
  460. case USB_REQ_GET_STATUS | ((USB_DIR_IN | USB_RT_HUB) << 8):
  461. tmpbuf[0] = 1; /* USB_STATUS_SELFPOWERED */
  462. tmpbuf[1] = 0;
  463. srcptr = tmpbuf;
  464. srclen = 2;
  465. break;
  466. case USB_REQ_GET_STATUS | ((USB_RT_PORT | USB_DIR_IN) << 8):
  467. memset(tmpbuf, 0, 4);
  468. reg = ehci_readl(status_reg);
  469. if (reg & EHCI_PS_CS)
  470. tmpbuf[0] |= USB_PORT_STAT_CONNECTION;
  471. if (reg & EHCI_PS_PE)
  472. tmpbuf[0] |= USB_PORT_STAT_ENABLE;
  473. if (reg & EHCI_PS_SUSP)
  474. tmpbuf[0] |= USB_PORT_STAT_SUSPEND;
  475. if (reg & EHCI_PS_OCA)
  476. tmpbuf[0] |= USB_PORT_STAT_OVERCURRENT;
  477. if (reg & EHCI_PS_PR)
  478. tmpbuf[0] |= USB_PORT_STAT_RESET;
  479. if (reg & EHCI_PS_PP)
  480. tmpbuf[1] |= USB_PORT_STAT_POWER >> 8;
  481. if (ehci_is_TDI()) {
  482. switch ((reg >> 26) & 3) {
  483. case 0:
  484. break;
  485. case 1:
  486. tmpbuf[1] |= USB_PORT_STAT_LOW_SPEED >> 8;
  487. break;
  488. case 2:
  489. default:
  490. tmpbuf[1] |= USB_PORT_STAT_HIGH_SPEED >> 8;
  491. break;
  492. }
  493. } else {
  494. tmpbuf[1] |= USB_PORT_STAT_HIGH_SPEED >> 8;
  495. }
  496. if (reg & EHCI_PS_CSC)
  497. tmpbuf[2] |= USB_PORT_STAT_C_CONNECTION;
  498. if (reg & EHCI_PS_PEC)
  499. tmpbuf[2] |= USB_PORT_STAT_C_ENABLE;
  500. if (reg & EHCI_PS_OCC)
  501. tmpbuf[2] |= USB_PORT_STAT_C_OVERCURRENT;
  502. if (portreset & (1 << le16_to_cpu(req->index)))
  503. tmpbuf[2] |= USB_PORT_STAT_C_RESET;
  504. srcptr = tmpbuf;
  505. srclen = 4;
  506. break;
  507. case USB_REQ_SET_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8):
  508. reg = ehci_readl(status_reg);
  509. reg &= ~EHCI_PS_CLEAR;
  510. switch (le16_to_cpu(req->value)) {
  511. case USB_PORT_FEAT_ENABLE:
  512. reg |= EHCI_PS_PE;
  513. ehci_writel(status_reg, reg);
  514. break;
  515. case USB_PORT_FEAT_POWER:
  516. if (HCS_PPC(ehci_readl(&hccr->cr_hcsparams))) {
  517. reg |= EHCI_PS_PP;
  518. ehci_writel(status_reg, reg);
  519. }
  520. break;
  521. case USB_PORT_FEAT_RESET:
  522. if ((reg & (EHCI_PS_PE | EHCI_PS_CS)) == EHCI_PS_CS &&
  523. !ehci_is_TDI() &&
  524. EHCI_PS_IS_LOWSPEED(reg)) {
  525. /* Low speed device, give up ownership. */
  526. debug("port %d low speed --> companion\n",
  527. req->index - 1);
  528. reg |= EHCI_PS_PO;
  529. ehci_writel(status_reg, reg);
  530. break;
  531. } else {
  532. int ret;
  533. reg |= EHCI_PS_PR;
  534. reg &= ~EHCI_PS_PE;
  535. ehci_writel(status_reg, reg);
  536. /*
  537. * caller must wait, then call GetPortStatus
  538. * usb 2.0 specification say 50 ms resets on
  539. * root
  540. */
  541. ehci_powerup_fixup(status_reg, &reg);
  542. ehci_writel(status_reg, reg & ~EHCI_PS_PR);
  543. /*
  544. * A host controller must terminate the reset
  545. * and stabilize the state of the port within
  546. * 2 milliseconds
  547. */
  548. ret = handshake(status_reg, EHCI_PS_PR, 0,
  549. 2 * 1000);
  550. if (!ret)
  551. portreset |=
  552. 1 << le16_to_cpu(req->index);
  553. else
  554. printf("port(%d) reset error\n",
  555. le16_to_cpu(req->index) - 1);
  556. }
  557. break;
  558. default:
  559. debug("unknown feature %x\n", le16_to_cpu(req->value));
  560. goto unknown;
  561. }
  562. /* unblock posted writes */
  563. (void) ehci_readl(&hcor->or_usbcmd);
  564. break;
  565. case USB_REQ_CLEAR_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8):
  566. reg = ehci_readl(status_reg);
  567. switch (le16_to_cpu(req->value)) {
  568. case USB_PORT_FEAT_ENABLE:
  569. reg &= ~EHCI_PS_PE;
  570. break;
  571. case USB_PORT_FEAT_C_ENABLE:
  572. reg = (reg & ~EHCI_PS_CLEAR) | EHCI_PS_PE;
  573. break;
  574. case USB_PORT_FEAT_POWER:
  575. if (HCS_PPC(ehci_readl(&hccr->cr_hcsparams)))
  576. reg = reg & ~(EHCI_PS_CLEAR | EHCI_PS_PP);
  577. case USB_PORT_FEAT_C_CONNECTION:
  578. reg = (reg & ~EHCI_PS_CLEAR) | EHCI_PS_CSC;
  579. break;
  580. case USB_PORT_FEAT_OVER_CURRENT:
  581. reg = (reg & ~EHCI_PS_CLEAR) | EHCI_PS_OCC;
  582. break;
  583. case USB_PORT_FEAT_C_RESET:
  584. portreset &= ~(1 << le16_to_cpu(req->index));
  585. break;
  586. default:
  587. debug("unknown feature %x\n", le16_to_cpu(req->value));
  588. goto unknown;
  589. }
  590. ehci_writel(status_reg, reg);
  591. /* unblock posted write */
  592. (void) ehci_readl(&hcor->or_usbcmd);
  593. break;
  594. default:
  595. debug("Unknown request\n");
  596. goto unknown;
  597. }
  598. mdelay(1);
  599. len = min3(srclen, le16_to_cpu(req->length), length);
  600. if (srcptr != NULL && len > 0)
  601. memcpy(buffer, srcptr, len);
  602. else
  603. debug("Len is 0\n");
  604. dev->act_len = len;
  605. dev->status = 0;
  606. return 0;
  607. unknown:
  608. debug("requesttype=%x, request=%x, value=%x, index=%x, length=%x\n",
  609. req->requesttype, req->request, le16_to_cpu(req->value),
  610. le16_to_cpu(req->index), le16_to_cpu(req->length));
  611. dev->act_len = 0;
  612. dev->status = USB_ST_STALLED;
  613. return -1;
  614. }
  615. int usb_lowlevel_stop(void)
  616. {
  617. return ehci_hcd_stop();
  618. }
  619. int usb_lowlevel_init(void)
  620. {
  621. uint32_t reg;
  622. uint32_t cmd;
  623. if (ehci_hcd_init() != 0)
  624. return -1;
  625. /* EHCI spec section 4.1 */
  626. if (ehci_reset() != 0)
  627. return -1;
  628. #if defined(CONFIG_EHCI_HCD_INIT_AFTER_RESET)
  629. if (ehci_hcd_init() != 0)
  630. return -1;
  631. #endif
  632. /* Set head of reclaim list */
  633. memset(&qh_list, 0, sizeof(qh_list));
  634. qh_list.qh_link = cpu_to_hc32((uint32_t)&qh_list | QH_LINK_TYPE_QH);
  635. qh_list.qh_endpt1 = cpu_to_hc32((1 << 15) | (USB_SPEED_HIGH << 12));
  636. qh_list.qh_curtd = cpu_to_hc32(QT_NEXT_TERMINATE);
  637. qh_list.qh_overlay.qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
  638. qh_list.qh_overlay.qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
  639. qh_list.qh_overlay.qt_token = cpu_to_hc32(0x40);
  640. /* Set async. queue head pointer. */
  641. ehci_writel(&hcor->or_asynclistaddr, (uint32_t)&qh_list);
  642. reg = ehci_readl(&hccr->cr_hcsparams);
  643. descriptor.hub.bNbrPorts = HCS_N_PORTS(reg);
  644. printf("Register %x NbrPorts %d\n", reg, descriptor.hub.bNbrPorts);
  645. /* Port Indicators */
  646. if (HCS_INDICATOR(reg))
  647. descriptor.hub.wHubCharacteristics |= 0x80;
  648. /* Port Power Control */
  649. if (HCS_PPC(reg))
  650. descriptor.hub.wHubCharacteristics |= 0x01;
  651. /* Start the host controller. */
  652. cmd = ehci_readl(&hcor->or_usbcmd);
  653. /*
  654. * Philips, Intel, and maybe others need CMD_RUN before the
  655. * root hub will detect new devices (why?); NEC doesn't
  656. */
  657. cmd &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET);
  658. cmd |= CMD_RUN;
  659. ehci_writel(&hcor->or_usbcmd, cmd);
  660. /* take control over the ports */
  661. cmd = ehci_readl(&hcor->or_configflag);
  662. cmd |= FLAG_CF;
  663. ehci_writel(&hcor->or_configflag, cmd);
  664. /* unblock posted write */
  665. cmd = ehci_readl(&hcor->or_usbcmd);
  666. mdelay(5);
  667. reg = HC_VERSION(ehci_readl(&hccr->cr_capbase));
  668. printf("USB EHCI %x.%02x\n", reg >> 8, reg & 0xff);
  669. rootdev = 0;
  670. return 0;
  671. }
  672. int
  673. submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
  674. int length)
  675. {
  676. if (usb_pipetype(pipe) != PIPE_BULK) {
  677. debug("non-bulk pipe (type=%lu)", usb_pipetype(pipe));
  678. return -1;
  679. }
  680. return ehci_submit_async(dev, pipe, buffer, length, NULL);
  681. }
  682. int
  683. submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
  684. int length, struct devrequest *setup)
  685. {
  686. if (usb_pipetype(pipe) != PIPE_CONTROL) {
  687. debug("non-control pipe (type=%lu)", usb_pipetype(pipe));
  688. return -1;
  689. }
  690. if (usb_pipedevice(pipe) == rootdev) {
  691. if (rootdev == 0)
  692. dev->speed = USB_SPEED_HIGH;
  693. return ehci_submit_root(dev, pipe, buffer, length, setup);
  694. }
  695. return ehci_submit_async(dev, pipe, buffer, length, setup);
  696. }
  697. int
  698. submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
  699. int length, int interval)
  700. {
  701. debug("dev=%p, pipe=%lu, buffer=%p, length=%d, interval=%d",
  702. dev, pipe, buffer, length, interval);
  703. return ehci_submit_async(dev, pipe, buffer, length, NULL);
  704. }