interrupts.c 4.7 KB

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  1. /*
  2. * (C) Copyright 2003
  3. * Texas Instruments <www.ti.com>
  4. *
  5. * (C) Copyright 2002
  6. * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
  7. * Marius Groeger <mgroeger@sysgo.de>
  8. *
  9. * (C) Copyright 2002
  10. * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
  11. * Alex Zuepke <azu@sysgo.de>
  12. *
  13. * (C) Copyright 2002-2004
  14. * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
  15. *
  16. * (C) Copyright 2004
  17. * Philippe Robin, ARM Ltd. <philippe.robin@arm.com>
  18. *
  19. * See file CREDITS for list of people who contributed to this
  20. * project.
  21. *
  22. * This program is free software; you can redistribute it and/or
  23. * modify it under the terms of the GNU General Public License as
  24. * published by the Free Software Foundation; either version 2 of
  25. * the License, or (at your option) any later version.
  26. *
  27. * This program is distributed in the hope that it will be useful,
  28. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  29. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  30. * GNU General Public License for more details.
  31. *
  32. * You should have received a copy of the GNU General Public License
  33. * along with this program; if not, write to the Free Software
  34. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  35. * MA 02111-1307 USA
  36. */
  37. #include <common.h>
  38. #include <asm/proc-armv/ptrace.h>
  39. DECLARE_GLOBAL_DATA_PTR;
  40. #ifdef CONFIG_USE_IRQ
  41. int interrupt_init (void)
  42. {
  43. /*
  44. * setup up stacks if necessary
  45. */
  46. IRQ_STACK_START = gd->irq_sp - 4;
  47. IRQ_STACK_START_IN = gd->irq_sp + 8;
  48. FIQ_STACK_START = IRQ_STACK_START - CONFIG_STACKSIZE_IRQ;
  49. return arch_interrupt_init();
  50. }
  51. /* enable IRQ interrupts */
  52. void enable_interrupts (void)
  53. {
  54. unsigned long temp;
  55. __asm__ __volatile__("mrs %0, cpsr\n"
  56. "bic %0, %0, #0x80\n"
  57. "msr cpsr_c, %0"
  58. : "=r" (temp)
  59. :
  60. : "memory");
  61. }
  62. /*
  63. * disable IRQ/FIQ interrupts
  64. * returns true if interrupts had been enabled before we disabled them
  65. */
  66. int disable_interrupts (void)
  67. {
  68. unsigned long old,temp;
  69. __asm__ __volatile__("mrs %0, cpsr\n"
  70. "orr %1, %0, #0xc0\n"
  71. "msr cpsr_c, %1"
  72. : "=r" (old), "=r" (temp)
  73. :
  74. : "memory");
  75. return (old & 0x80) == 0;
  76. }
  77. #else
  78. int interrupt_init (void)
  79. {
  80. /*
  81. * setup up stacks if necessary
  82. */
  83. IRQ_STACK_START_IN = gd->irq_sp + 8;
  84. return 0;
  85. }
  86. void enable_interrupts (void)
  87. {
  88. return;
  89. }
  90. int disable_interrupts (void)
  91. {
  92. return 0;
  93. }
  94. #endif
  95. void bad_mode (void)
  96. {
  97. panic ("Resetting CPU ...\n");
  98. reset_cpu (0);
  99. }
  100. void show_regs (struct pt_regs *regs)
  101. {
  102. unsigned long flags;
  103. const char *processor_modes[] = {
  104. "USER_26", "FIQ_26", "IRQ_26", "SVC_26",
  105. "UK4_26", "UK5_26", "UK6_26", "UK7_26",
  106. "UK8_26", "UK9_26", "UK10_26", "UK11_26",
  107. "UK12_26", "UK13_26", "UK14_26", "UK15_26",
  108. "USER_32", "FIQ_32", "IRQ_32", "SVC_32",
  109. "UK4_32", "UK5_32", "UK6_32", "ABT_32",
  110. "UK8_32", "UK9_32", "UK10_32", "UND_32",
  111. "UK12_32", "UK13_32", "UK14_32", "SYS_32",
  112. };
  113. flags = condition_codes (regs);
  114. printf ("pc : [<%08lx>] lr : [<%08lx>]\n"
  115. "sp : %08lx ip : %08lx fp : %08lx\n",
  116. instruction_pointer (regs),
  117. regs->ARM_lr, regs->ARM_sp, regs->ARM_ip, regs->ARM_fp);
  118. printf ("r10: %08lx r9 : %08lx r8 : %08lx\n",
  119. regs->ARM_r10, regs->ARM_r9, regs->ARM_r8);
  120. printf ("r7 : %08lx r6 : %08lx r5 : %08lx r4 : %08lx\n",
  121. regs->ARM_r7, regs->ARM_r6, regs->ARM_r5, regs->ARM_r4);
  122. printf ("r3 : %08lx r2 : %08lx r1 : %08lx r0 : %08lx\n",
  123. regs->ARM_r3, regs->ARM_r2, regs->ARM_r1, regs->ARM_r0);
  124. printf ("Flags: %c%c%c%c",
  125. flags & CC_N_BIT ? 'N' : 'n',
  126. flags & CC_Z_BIT ? 'Z' : 'z',
  127. flags & CC_C_BIT ? 'C' : 'c', flags & CC_V_BIT ? 'V' : 'v');
  128. printf (" IRQs %s FIQs %s Mode %s%s\n",
  129. interrupts_enabled (regs) ? "on" : "off",
  130. fast_interrupts_enabled (regs) ? "on" : "off",
  131. processor_modes[processor_mode (regs)],
  132. thumb_mode (regs) ? " (T)" : "");
  133. }
  134. void do_undefined_instruction (struct pt_regs *pt_regs)
  135. {
  136. printf ("undefined instruction\n");
  137. show_regs (pt_regs);
  138. bad_mode ();
  139. }
  140. void do_software_interrupt (struct pt_regs *pt_regs)
  141. {
  142. printf ("software interrupt\n");
  143. show_regs (pt_regs);
  144. bad_mode ();
  145. }
  146. void do_prefetch_abort (struct pt_regs *pt_regs)
  147. {
  148. printf ("prefetch abort\n");
  149. show_regs (pt_regs);
  150. bad_mode ();
  151. }
  152. void do_data_abort (struct pt_regs *pt_regs)
  153. {
  154. printf ("data abort\n\n MAYBE you should read doc/README.arm-unaligned-accesses\n\n");
  155. show_regs (pt_regs);
  156. bad_mode ();
  157. }
  158. void do_not_used (struct pt_regs *pt_regs)
  159. {
  160. printf ("not used\n");
  161. show_regs (pt_regs);
  162. bad_mode ();
  163. }
  164. void do_fiq (struct pt_regs *pt_regs)
  165. {
  166. printf ("fast interrupt request\n");
  167. show_regs (pt_regs);
  168. bad_mode ();
  169. }
  170. #ifndef CONFIG_USE_IRQ
  171. void do_irq (struct pt_regs *pt_regs)
  172. {
  173. printf ("interrupt request\n");
  174. show_regs (pt_regs);
  175. bad_mode ();
  176. }
  177. #endif