ns9750dev.h 6.5 KB

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  1. /*
  2. * Copyright (C) 2004 by FS Forth-Systeme GmbH.
  3. * All rights reserved.
  4. * Markus Pietrek <mpietrek@fsforth.de>
  5. *
  6. * Configuation settings for the NetSilicon NS9750 DevBoard
  7. *
  8. * See file CREDITS for list of people who contributed to this
  9. * project.
  10. *
  11. * This program is free software; you can redistribute it and/or
  12. * modify it under the terms of the GNU General Public License as
  13. * published by the Free Software Foundation; either version 2 of
  14. * the License, or (at your option) any later version.
  15. *
  16. * This program is distributed in the hope that it will be useful,
  17. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  19. * GNU General Public License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with this program; if not, write to the Free Software
  23. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  24. * MA 02111-1307 USA
  25. */
  26. #ifndef __CONFIG_H
  27. #define __CONFIG_H
  28. /*
  29. * If we are developing, we might want to start armboot from ram
  30. * so we MUST NOT initialize critical regs like mem-timing ...
  31. */
  32. #define CONFIG_INIT_CRITICAL /* undef for developing */
  33. /*
  34. * High Level Configuration Options
  35. * (easy to change)
  36. */
  37. #define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */
  38. #define CONFIG_NS9750 1 /* in an NetSilicon NS9750 SoC */
  39. #define CONFIG_NS9750DEV 1 /* on an NetSilicon NS9750 DevBoard */
  40. /* input clock of PLL */
  41. #define CONFIG_SYS_CLK_FREQ 324403200 /* Don't use PLL. SW11-4 off */
  42. #define CPU_CLK_FREQ (CONFIG_SYS_CLK_FREQ/2)
  43. #define AHB_CLK_FREQ (CONFIG_SYS_CLK_FREQ/4)
  44. #define BBUS_CLK_FREQ (CONFIG_SYS_CLK_FREQ/8)
  45. #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
  46. /*@TODO #define CONFIG_STATUS_LED*/
  47. #define CONFIG_USE_IRQ
  48. /*
  49. * Size of malloc() pool
  50. */
  51. #define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024)
  52. #define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial
  53. * data */
  54. /*
  55. * Hardware drivers
  56. */
  57. #define CFG_NS9750_UART 1 /* use on-chip UART */
  58. #define CONFIG_DRIVER_NS9750_ETHERNET 1 /* use on-chip ethernet */
  59. /*
  60. * select serial console configuration
  61. */
  62. #define CONFIG_CONS_INDEX 1 /* Port B */
  63. /* allow to overwrite serial and ethaddr */
  64. #define CONFIG_ENV_OVERWRITE
  65. #define CONFIG_BAUDRATE 38400
  66. /***********************************************************
  67. * Command definition
  68. ***********************************************************/
  69. #if 0 /* @TODO */
  70. #define CONFIG_COMMANDS \
  71. (CONFIG_CMD_DFL | \
  72. CFG_CMD_CACHE | \
  73. /*CFG_CMD_NAND |*/ \
  74. /*CFG_CMD_EEPROM |*/ \
  75. /*CFG_CMD_I2C |*/ \
  76. /*CFG_CMD_USB |*/ \
  77. CFG_CMD_REGINFO | \
  78. CFG_CMD_DATE | \
  79. CFG_CMD_ELF)
  80. #else
  81. #define CONFIG_COMMANDS \
  82. (CONFIG_CMD_BDI | \
  83. CFG_CMD_NET | \
  84. CFG_CMD_PING | \
  85. CFG_CMD_CONSOLE | \
  86. CFG_CMD_LOADB | \
  87. CFG_CMD_LOADS | \
  88. CFG_CMD_MEMORY)
  89. #endif
  90. /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
  91. #include <cmd_confdefs.h>
  92. #define CONFIG_BOOTDELAY 3
  93. /*#define CONFIG_BOOTARGS "root=ramfs devfs=mount console=ttySA0,9600" */
  94. #define CONFIG_ETHADDR 00:04:f3:ff:ff:fb /*@TODO unset */
  95. #define CONFIG_NETMASK 255.255.255.0
  96. #define CONFIG_IPADDR 192.168.42.30
  97. #define CONFIG_SERVERIP 192.168.42.1
  98. /*#define CONFIG_BOOTFILE "elinos-lart" */
  99. /*#define CONFIG_BOOTCOMMAND "tftp; bootm" */
  100. #if (CONFIG_COMMANDS & CFG_CMD_KGDB)
  101. #define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
  102. /* what's this ? it's not used anywhere */
  103. #define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */
  104. #endif
  105. /*
  106. * Miscellaneous configurable options
  107. */
  108. #define CFG_LONGHELP /* undef to save memory */
  109. #define CFG_PROMPT "NS9750DEV # " /* Monitor Command Prompt */
  110. #define CFG_CBSIZE 256 /* Console I/O Buffer Size */
  111. #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
  112. #define CFG_MAXARGS 16 /* max number of command args */
  113. #define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
  114. #define CFG_MEMTEST_START 0x00000000 /* memtest works on */
  115. #define CFG_MEMTEST_END 0x00780000 /* 7,5 MB in DRAM */ /* @TODO */
  116. #undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
  117. #define CFG_LOAD_ADDR 0x00600000 /* default load address */ /* @TODO */
  118. #define CFG_HZ (CPU_CLK_FREQ/64)
  119. /* valid baudrates */
  120. #define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
  121. #define NS9750_ETH_PHY_ADDRESS (0x0000)
  122. /*-----------------------------------------------------------------------
  123. * Stack sizes
  124. *
  125. * The stack sizes are set up in start.S using the settings below
  126. */
  127. #define CONFIG_STACKSIZE (128*1024) /* regular stack */
  128. #ifdef CONFIG_USE_IRQ
  129. #define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
  130. #define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
  131. #endif
  132. /*-----------------------------------------------------------------------
  133. * Physical Memory Map
  134. */
  135. /* TODO */
  136. #define CONFIG_NR_DRAM_BANKS 2 /* we have 1 bank of DRAM */
  137. #define PHYS_SDRAM_1 0x00000000 /* SDRAM Bank #1 */
  138. #define PHYS_SDRAM_1_SIZE 0x00800000 /* 8 MB */
  139. #define PHYS_SDRAM_2 0x10000000 /* SDRAM Bank #1 */
  140. #define PHYS_SDRAM_2_SIZE 0x00800000 /* 8 MB */
  141. #define PHYS_FLASH_1 0x50000000 /* Flash Bank #1 */
  142. #define CFG_FLASH_BASE PHYS_FLASH_1
  143. /*-----------------------------------------------------------------------
  144. * FLASH and environment organization
  145. */
  146. /* @TODO*/
  147. #define CONFIG_AMD_LV400 1 /* uncomment this if you have a LV400 flash */
  148. #if 0
  149. #define CONFIG_AMD_LV800 1 /* uncomment this if you have a LV800 flash */
  150. #endif
  151. #define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
  152. #ifdef CONFIG_AMD_LV800
  153. #define PHYS_FLASH_SIZE 0x00100000 /* 1MB */
  154. #define CFG_MAX_FLASH_SECT (19) /* max number of sectors on one chip */
  155. #define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x0F0000) /* addr of environment */
  156. #endif
  157. #ifdef CONFIG_AMD_LV400
  158. #define PHYS_FLASH_SIZE 0x00080000 /* 512KB */
  159. #define CFG_MAX_FLASH_SECT (11) /* max number of sectors on one chip */
  160. #define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x070000) /* addr of environment */
  161. #endif
  162. /* timeout values are in ticks */
  163. #define CFG_FLASH_ERASE_TOUT (5*CFG_HZ) /* Timeout for Flash Erase */
  164. #define CFG_FLASH_WRITE_TOUT (5*CFG_HZ) /* Timeout for Flash Write */
  165. /* @TODO */
  166. /*#define CFG_ENV_IS_IN_FLASH 1*/
  167. #define CFG_ENV_IS_NOWHERE
  168. #define CFG_ENV_SIZE 0x10000 /* Total Size of Environment Sector */
  169. #ifdef CONFIG_STATUS_LED
  170. extern void __led_init(led_id_t mask, int state);
  171. extern void __led_toggle(led_id_t mask);
  172. extern void __led_set(led_id_t mask, int state);
  173. #endif /* CONFIG_STATUS_LED */
  174. #endif /* __CONFIG_H */