lowlevel_init.S 2.3 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798
  1. /*
  2. * Lowlevel setup for SMDK5250 board based on S5PC520
  3. *
  4. * Copyright (C) 2012 Samsung Electronics
  5. *
  6. * See file CREDITS for list of people who contributed to this
  7. * project.
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License as
  11. * published by the Free Software Foundation; either version 2 of
  12. * the License, or (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  22. * MA 02111-1307 USA
  23. */
  24. #include <config.h>
  25. #include <version.h>
  26. #include <asm/arch/cpu.h>
  27. _TEXT_BASE:
  28. .word CONFIG_SYS_TEXT_BASE
  29. .globl lowlevel_init
  30. lowlevel_init:
  31. /* use iRAM stack in bl2 */
  32. ldr sp, =CONFIG_IRAM_STACK
  33. stmdb r13!, {ip,lr}
  34. /* check reset status */
  35. ldr r0, =(EXYNOS5_POWER_BASE + INFORM1_OFFSET)
  36. ldr r1, [r0]
  37. /* AFTR wakeup reset */
  38. ldr r2, =S5P_CHECK_DIDLE
  39. cmp r1, r2
  40. beq exit_wakeup
  41. /* LPA wakeup reset */
  42. ldr r2, =S5P_CHECK_LPA
  43. cmp r1, r2
  44. beq exit_wakeup
  45. /* Sleep wakeup reset */
  46. ldr r2, =S5P_CHECK_SLEEP
  47. cmp r1, r2
  48. beq wakeup_reset
  49. /*
  50. * If U-boot is already running in RAM, no need to relocate U-Boot.
  51. * Memory controller must be configured before relocating U-Boot
  52. * in ram.
  53. */
  54. ldr r0, =0x0ffffff /* r0 <- Mask Bits*/
  55. bic r1, pc, r0 /* pc <- current addr of code */
  56. /* r1 <- unmasked bits of pc */
  57. ldr r2, _TEXT_BASE /* r2 <- original base addr in ram */
  58. bic r2, r2, r0 /* r2 <- unmasked bits of r2*/
  59. cmp r1, r2 /* compare r1, r2 */
  60. beq 1f /* r0 == r1 then skip sdram init */
  61. /* init system clock */
  62. bl system_clock_init
  63. /* Memory initialize */
  64. bl mem_ctrl_init
  65. 1:
  66. bl arch_cpu_init
  67. bl tzpc_init
  68. ldmia r13!, {ip,pc}
  69. wakeup_reset:
  70. bl system_clock_init
  71. bl mem_ctrl_init
  72. bl arch_cpu_init
  73. bl tzpc_init
  74. exit_wakeup:
  75. /* Load return address and jump to kernel */
  76. ldr r0, =(EXYNOS5_POWER_BASE + INFORM0_OFFSET)
  77. /* r1 = physical address of exynos5_cpu_resume function*/
  78. ldr r1, [r0]
  79. /* Jump to kernel */
  80. mov pc, r1
  81. nop
  82. nop