lxt972.c 3.1 KB

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  1. /*
  2. * Intel LXT971/LXT972 PHY Driver for TI DaVinci
  3. * (TMS320DM644x) based boards.
  4. *
  5. * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
  6. *
  7. * --------------------------------------------------------
  8. *
  9. * See file CREDITS for list of people who contributed to this
  10. * project.
  11. *
  12. * This program is free software; you can redistribute it and/or
  13. * modify it under the terms of the GNU General Public License as
  14. * published by the Free Software Foundation; either version 2 of
  15. * the License, or (at your option) any later version.
  16. *
  17. * This program is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. *
  22. * You should have received a copy of the GNU General Public License
  23. * along with this program; if not, write to the Free Software
  24. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  25. * MA 02111-1307 USA
  26. */
  27. #include <common.h>
  28. #include <net.h>
  29. #include <miiphy.h>
  30. #include <lxt971a.h>
  31. #include <asm/arch/emac_defs.h>
  32. #include "../../../../../drivers/net/davinci_emac.h"
  33. #ifdef CONFIG_DRIVER_TI_EMAC
  34. #ifdef CONFIG_CMD_NET
  35. int lxt972_is_phy_connected(int phy_addr)
  36. {
  37. u_int16_t id1, id2;
  38. if (!davinci_eth_phy_read(phy_addr, MII_PHYSID1, &id1))
  39. return(0);
  40. if (!davinci_eth_phy_read(phy_addr, MII_PHYSID2, &id2))
  41. return(0);
  42. if ((id1 == (0x0013)) && ((id2 & 0xfff0) == 0x78e0))
  43. return(1);
  44. return(0);
  45. }
  46. int lxt972_get_link_speed(int phy_addr)
  47. {
  48. u_int16_t stat1, tmp;
  49. volatile emac_regs *emac = (emac_regs *)EMAC_BASE_ADDR;
  50. if (!davinci_eth_phy_read(phy_addr, PHY_LXT971_STAT2, &stat1))
  51. return(0);
  52. if (!(stat1 & PHY_LXT971_STAT2_LINK)) /* link up? */
  53. return(0);
  54. if (!davinci_eth_phy_read(phy_addr, PHY_LXT971_DIG_CFG, &tmp))
  55. return(0);
  56. tmp |= PHY_LXT971_DIG_CFG_MII_DRIVE;
  57. davinci_eth_phy_write(phy_addr, PHY_LXT971_DIG_CFG, tmp);
  58. /* Read back */
  59. if (!davinci_eth_phy_read(phy_addr, PHY_LXT971_DIG_CFG, &tmp))
  60. return(0);
  61. /* Speed doesn't matter, there is no setting for it in EMAC... */
  62. if (stat1 & PHY_LXT971_STAT2_DUPLEX_MODE) {
  63. /* set DM644x EMAC for Full Duplex */
  64. emac->MACCONTROL = EMAC_MACCONTROL_MIIEN_ENABLE |
  65. EMAC_MACCONTROL_FULLDUPLEX_ENABLE;
  66. } else {
  67. /*set DM644x EMAC for Half Duplex */
  68. emac->MACCONTROL = EMAC_MACCONTROL_MIIEN_ENABLE;
  69. }
  70. return(1);
  71. }
  72. int lxt972_init_phy(int phy_addr)
  73. {
  74. int ret = 1;
  75. if (!lxt972_get_link_speed(phy_addr)) {
  76. /* Try another time */
  77. ret = lxt972_get_link_speed(phy_addr);
  78. }
  79. /* Disable PHY Interrupts */
  80. davinci_eth_phy_write(phy_addr, PHY_LXT971_INT_ENABLE, 0);
  81. return(ret);
  82. }
  83. int lxt972_auto_negotiate(int phy_addr)
  84. {
  85. u_int16_t tmp;
  86. if (!davinci_eth_phy_read(phy_addr, MII_BMCR, &tmp))
  87. return(0);
  88. /* Restart Auto_negotiation */
  89. tmp |= BMCR_ANRESTART;
  90. davinci_eth_phy_write(phy_addr, MII_BMCR, tmp);
  91. /*check AutoNegotiate complete */
  92. udelay (10000);
  93. if (!davinci_eth_phy_read(phy_addr, MII_BMSR, &tmp))
  94. return(0);
  95. if (!(tmp & BMSR_ANEGCOMPLETE))
  96. return(0);
  97. return (lxt972_get_link_speed(phy_addr));
  98. }
  99. #endif /* CONFIG_CMD_NET */
  100. #endif /* CONFIG_DRIVER_ETHER */