gcplus.h 6.5 KB

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  1. /*
  2. * (C) Copyright 2002
  3. * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
  4. * Marius Groeger <mgroeger@sysgo.de>
  5. *
  6. * 2003-2004 (c) MontaVista Software, Inc.
  7. *
  8. * Configuation settings for the ADS GraphicsClient+ board.
  9. *
  10. * See file CREDITS for list of people who contributed to this
  11. * project.
  12. *
  13. * This program is free software; you can redistribute it and/or
  14. * modify it under the terms of the GNU General Public License as
  15. * published by the Free Software Foundation; either version 2 of
  16. * the License, or (at your option) any later version.
  17. *
  18. * This program is distributed in the hope that it will be useful,
  19. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  20. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  21. * GNU General Public License for more details.
  22. *
  23. * You should have received a copy of the GNU General Public License
  24. * along with this program; if not, write to the Free Software
  25. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  26. * MA 02111-1307 USA
  27. */
  28. #ifndef __CONFIG_H
  29. #define __CONFIG_H
  30. /*
  31. * The ADS GCPlus Linux boot ROM loads U-Boot into RAM at 0xc0200000.
  32. * We don't actually init RAM in this case since we're using U-Boot as
  33. * an secondary boot loader during Linux kernel development and testing,
  34. * e.g. bootp/tftp download of the kernel is a far more convenient
  35. * when testing new kernels on this target. However the ADS GCPlus Linux
  36. * boot ROM leaves the MMU enabled when it passes control to U-Boot. So
  37. * we use lowlevel_init (CONFIG_INIT_CRITICAL) to remedy that problem.
  38. */
  39. #undef CONFIG_SKIP_LOWLEVEL_INIT
  40. #define CONFIG_SKIP_RELOCATE_UBOOT 1
  41. /*
  42. * High Level Configuration Options
  43. * (easy to change)
  44. */
  45. #define CONFIG_SA1110 1 /* This is an SA1100 CPU */
  46. #define CONFIG_GCPLUS 1 /* on an ADS GCPlus Board */
  47. #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
  48. /* we will never enable dcache, because we have to setup MMU first */
  49. #define CONFIG_SYS_NO_DCACHE
  50. #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
  51. #define CONFIG_SETUP_MEMORY_TAGS 1
  52. #define CONFIG_INITRD_TAG 1
  53. /*
  54. * Size of malloc() pool
  55. */
  56. #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
  57. #define CONFIG_SYS_GBL_DATA_SIZE 128 /* size rsrvd for initial data */
  58. /*
  59. * Hardware drivers
  60. */
  61. #define CONFIG_DRIVER_LAN91C96 /* we have an SMC9194 on-board */
  62. #define CONFIG_LAN91C96_BASE 0x100e0000
  63. /*
  64. * select serial console configuration
  65. */
  66. #define CONFIG_SA1100_SERIAL
  67. #define CONFIG_SERIAL3 1 /* we use SERIAL 3 on ADS GCPlus */
  68. /* allow to overwrite serial and ethaddr */
  69. #define CONFIG_ENV_OVERWRITE
  70. #define CONFIG_BAUDRATE 38400
  71. /*
  72. * Command line configuration.
  73. */
  74. #include <config_cmd_default.h>
  75. #define CONFIG_CMD_DHCP
  76. /*
  77. * BOOTP options
  78. */
  79. #define CONFIG_BOOTP_SUBNETMASK
  80. #define CONFIG_BOOTP_GATEWAY
  81. #define CONFIG_BOOTP_HOSTNAME
  82. #define CONFIG_BOOTP_BOOTPATH
  83. #define CONFIG_BOOTDELAY 3
  84. #define CONFIG_BOOTARGS "console=ttySA0,38400n8 mtdparts=sa1100-flash:1m@0(zImage),3m@1m(ramdisk.gz),12m@4m(userfs) root=/dev/nfs ip=bootp"
  85. #define CONFIG_BOOTCOMMAND "bootp;tftp;bootm"
  86. #define CONFIG_SYS_AUTOLOAD "n" /* No autoload */
  87. #if defined(CONFIG_CMD_KGDB)
  88. #define CONFIG_KGDB_BAUDRATE 38400 /* speed to run kgdb serial port */
  89. #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
  90. #endif
  91. /*
  92. * Miscellaneous configurable options
  93. */
  94. #define CONFIG_SYS_LONGHELP /* undef to save memory */
  95. #define CONFIG_SYS_PROMPT "ADS GCPlus # " /* Monitor Command Prompt */
  96. #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
  97. #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
  98. #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
  99. #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
  100. #define CONFIG_SYS_MEMTEST_START 0xc0400000 /* memtest works on */
  101. #define CONFIG_SYS_MEMTEST_END 0xc0800000 /* 4 ... 8 MB in DRAM */
  102. #define CONFIG_SYS_LOAD_ADDR 0xc0000000 /* default load address */
  103. #define CONFIG_SYS_HZ 3686400 /* incrementer freq: 3.6864 MHz */
  104. #define CONFIG_SYS_CPUSPEED 0x0a /* set core clock to 206MHz */
  105. /* valid baudrates */
  106. #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
  107. /*-----------------------------------------------------------------------
  108. * Stack sizes
  109. *
  110. * The stack sizes are set up in start.S using the settings below
  111. */
  112. #define CONFIG_STACKSIZE (128*1024) /* regular stack */
  113. #ifdef CONFIG_USE_IRQ
  114. #define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
  115. #define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
  116. #endif
  117. /*-----------------------------------------------------------------------
  118. * Physical Memory Map
  119. */
  120. #define CONFIG_NR_DRAM_BANKS 2 /* we have 2 banks of DRAM */
  121. #define PHYS_SDRAM_1 0xc0000000 /* SDRAM Bank #1 */
  122. #define PHYS_SDRAM_1_SIZE 0x01000000 /* 16 MB */
  123. #define PHYS_SDRAM_2 0xc8000000 /* SDRAM Bank #2 */
  124. #define PHYS_SDRAM_2_SIZE 0x01000000 /* 16 MB */
  125. #define PHYS_FLASH_1 0x08000000 /* Flash Bank #1 */
  126. #define PHYS_FLASH_SIZE 0x00800000 /* 8 MB */
  127. #define PHYS_FLASH_BANK_SIZE 0x01000000 /* 16 MB Banks */
  128. #define PHYS_FLASH_SECT_SIZE 0x00040000 /* 256 KB sectors (x2) */
  129. #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
  130. /*-----------------------------------------------------------------------
  131. * FLASH and environment organization
  132. */
  133. #if 1
  134. #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
  135. #define CONFIG_SYS_MAX_FLASH_SECT 128 /* max number of sectors on one chip */
  136. /* timeout values are in ticks */
  137. #define CONFIG_SYS_FLASH_ERASE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Erase */
  138. #define CONFIG_SYS_FLASH_WRITE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Write */
  139. #else
  140. /* REVISIT: This doesn't work on ADS GCPlus just yet: */
  141. #define CONFIG_SYS_FLASH_CFI 1 /* flash is CFI conformant */
  142. #define CONFIG_FLASH_CFI_DRIVER 1 /* use common cfi driver */
  143. #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 /* use buffered writes (20x faster) */
  144. #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max # of memory banks */
  145. #define CONFIG_SYS_FLASH_INCREMENT 0 /* there is only one bank */
  146. #define CONFIG_SYS_MAX_FLASH_SECT 128 /* max # of sectors on one chip */
  147. /*#define CONFIG_SYS_FLASH_PROTECTION 1 /--* hardware flash protection */
  148. #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
  149. #endif
  150. #define CONFIG_ENV_IS_IN_FLASH 1
  151. #define CONFIG_ENV_ADDR (PHYS_FLASH_1 + PHYS_FLASH_SECT_SIZE) /* Addr of Environment Sector */
  152. #define CONFIG_ENV_SIZE PHYS_FLASH_SECT_SIZE
  153. #endif /* __CONFIG_H */