miiphyutil.c 12 KB

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  1. /*
  2. * (C) Copyright 2001
  3. * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com.
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. */
  23. /*
  24. * This provides a bit-banged interface to the ethernet MII management
  25. * channel.
  26. */
  27. #include <common.h>
  28. #include <miiphy.h>
  29. #include <asm/types.h>
  30. #include <linux/list.h>
  31. #include <malloc.h>
  32. #include <net.h>
  33. /* local debug macro */
  34. #undef MII_DEBUG
  35. #undef debug
  36. #ifdef MII_DEBUG
  37. #define debug(fmt,args...) printf (fmt ,##args)
  38. #else
  39. #define debug(fmt,args...)
  40. #endif /* MII_DEBUG */
  41. struct mii_dev {
  42. struct list_head link;
  43. const char *name;
  44. int (*read) (const char *devname, unsigned char addr,
  45. unsigned char reg, unsigned short *value);
  46. int (*write) (const char *devname, unsigned char addr,
  47. unsigned char reg, unsigned short value);
  48. };
  49. static struct list_head mii_devs;
  50. static struct mii_dev *current_mii;
  51. /*
  52. * Lookup the mii_dev struct by the registered device name.
  53. */
  54. static struct mii_dev *miiphy_get_dev_by_name(const char *devname, int quiet)
  55. {
  56. struct list_head *entry;
  57. struct mii_dev *dev;
  58. if (!devname) {
  59. printf("NULL device name!\n");
  60. return NULL;
  61. }
  62. list_for_each(entry, &mii_devs) {
  63. dev = list_entry(entry, struct mii_dev, link);
  64. if (strcmp(dev->name, devname) == 0)
  65. return dev;
  66. }
  67. if (!quiet)
  68. printf("No such device: %s\n", devname);
  69. return NULL;
  70. }
  71. /*****************************************************************************
  72. *
  73. * Initialize global data. Need to be called before any other miiphy routine.
  74. */
  75. void miiphy_init(void)
  76. {
  77. INIT_LIST_HEAD (&mii_devs);
  78. current_mii = NULL;
  79. }
  80. /*****************************************************************************
  81. *
  82. * Register read and write MII access routines for the device <name>.
  83. */
  84. void miiphy_register(const char *name,
  85. int (*read) (const char *devname, unsigned char addr,
  86. unsigned char reg, unsigned short *value),
  87. int (*write) (const char *devname, unsigned char addr,
  88. unsigned char reg, unsigned short value))
  89. {
  90. struct mii_dev *new_dev;
  91. unsigned int name_len;
  92. char *new_name;
  93. /* check if we have unique name */
  94. new_dev = miiphy_get_dev_by_name(name, 1);
  95. if (new_dev) {
  96. printf("miiphy_register: non unique device name '%s'\n", name);
  97. return;
  98. }
  99. /* allocate memory */
  100. name_len = strlen (name);
  101. new_dev =
  102. (struct mii_dev *)malloc (sizeof (struct mii_dev) + name_len + 1);
  103. if (new_dev == NULL) {
  104. printf ("miiphy_register: cannot allocate memory for '%s'\n",
  105. name);
  106. return;
  107. }
  108. memset (new_dev, 0, sizeof (struct mii_dev) + name_len);
  109. /* initalize mii_dev struct fields */
  110. INIT_LIST_HEAD (&new_dev->link);
  111. new_dev->read = read;
  112. new_dev->write = write;
  113. new_dev->name = new_name = (char *)(new_dev + 1);
  114. strncpy (new_name, name, name_len);
  115. new_name[name_len] = '\0';
  116. debug ("miiphy_register: added '%s', read=0x%08lx, write=0x%08lx\n",
  117. new_dev->name, new_dev->read, new_dev->write);
  118. /* add it to the list */
  119. list_add_tail (&new_dev->link, &mii_devs);
  120. if (!current_mii)
  121. current_mii = new_dev;
  122. }
  123. int miiphy_set_current_dev(const char *devname)
  124. {
  125. struct mii_dev *dev;
  126. dev = miiphy_get_dev_by_name(devname, 0);
  127. if (dev) {
  128. current_mii = dev;
  129. return 0;
  130. }
  131. return 1;
  132. }
  133. const char *miiphy_get_current_dev(void)
  134. {
  135. if (current_mii)
  136. return current_mii->name;
  137. return NULL;
  138. }
  139. static struct mii_dev *miiphy_get_active_dev(const char *devname)
  140. {
  141. /* If the current mii is the one we want, return it */
  142. if (current_mii)
  143. if (strcmp(current_mii->name, devname) == 0)
  144. return current_mii;
  145. /* Otherwise, set the active one to the one we want */
  146. if (miiphy_set_current_dev(devname))
  147. return NULL;
  148. else
  149. return current_mii;
  150. }
  151. /*****************************************************************************
  152. *
  153. * Read to variable <value> from the PHY attached to device <devname>,
  154. * use PHY address <addr> and register <reg>.
  155. *
  156. * Returns:
  157. * 0 on success
  158. */
  159. int miiphy_read(const char *devname, unsigned char addr, unsigned char reg,
  160. unsigned short *value)
  161. {
  162. struct mii_dev *dev;
  163. dev = miiphy_get_active_dev(devname);
  164. if (dev)
  165. return dev->read(devname, addr, reg, value);
  166. return 1;
  167. }
  168. /*****************************************************************************
  169. *
  170. * Write <value> to the PHY attached to device <devname>,
  171. * use PHY address <addr> and register <reg>.
  172. *
  173. * Returns:
  174. * 0 on success
  175. */
  176. int miiphy_write(const char *devname, unsigned char addr, unsigned char reg,
  177. unsigned short value)
  178. {
  179. struct mii_dev *dev;
  180. dev = miiphy_get_active_dev(devname);
  181. if (dev)
  182. return dev->write(devname, addr, reg, value);
  183. return 1;
  184. }
  185. /*****************************************************************************
  186. *
  187. * Print out list of registered MII capable devices.
  188. */
  189. void miiphy_listdev (void)
  190. {
  191. struct list_head *entry;
  192. struct mii_dev *dev;
  193. puts ("MII devices: ");
  194. list_for_each (entry, &mii_devs) {
  195. dev = list_entry (entry, struct mii_dev, link);
  196. printf ("'%s' ", dev->name);
  197. }
  198. puts ("\n");
  199. if (current_mii)
  200. printf ("Current device: '%s'\n", current_mii->name);
  201. }
  202. /*****************************************************************************
  203. *
  204. * Read the OUI, manufacture's model number, and revision number.
  205. *
  206. * OUI: 22 bits (unsigned int)
  207. * Model: 6 bits (unsigned char)
  208. * Revision: 4 bits (unsigned char)
  209. *
  210. * Returns:
  211. * 0 on success
  212. */
  213. int miiphy_info(const char *devname, unsigned char addr, unsigned int *oui,
  214. unsigned char *model, unsigned char *rev)
  215. {
  216. unsigned int reg = 0;
  217. unsigned short tmp;
  218. if (miiphy_read (devname, addr, PHY_PHYIDR2, &tmp) != 0) {
  219. debug ("PHY ID register 2 read failed\n");
  220. return (-1);
  221. }
  222. reg = tmp;
  223. debug ("PHY_PHYIDR2 @ 0x%x = 0x%04x\n", addr, reg);
  224. if (reg == 0xFFFF) {
  225. /* No physical device present at this address */
  226. return (-1);
  227. }
  228. if (miiphy_read (devname, addr, PHY_PHYIDR1, &tmp) != 0) {
  229. debug ("PHY ID register 1 read failed\n");
  230. return (-1);
  231. }
  232. reg |= tmp << 16;
  233. debug ("PHY_PHYIDR[1,2] @ 0x%x = 0x%08x\n", addr, reg);
  234. *oui = (reg >> 10);
  235. *model = (unsigned char)((reg >> 4) & 0x0000003F);
  236. *rev = (unsigned char)(reg & 0x0000000F);
  237. return (0);
  238. }
  239. /*****************************************************************************
  240. *
  241. * Reset the PHY.
  242. * Returns:
  243. * 0 on success
  244. */
  245. int miiphy_reset(const char *devname, unsigned char addr)
  246. {
  247. unsigned short reg;
  248. int timeout = 500;
  249. if (miiphy_read (devname, addr, PHY_BMCR, &reg) != 0) {
  250. debug ("PHY status read failed\n");
  251. return (-1);
  252. }
  253. if (miiphy_write (devname, addr, PHY_BMCR, reg | PHY_BMCR_RESET) != 0) {
  254. debug ("PHY reset failed\n");
  255. return (-1);
  256. }
  257. #ifdef CONFIG_PHY_RESET_DELAY
  258. udelay (CONFIG_PHY_RESET_DELAY); /* Intel LXT971A needs this */
  259. #endif
  260. /*
  261. * Poll the control register for the reset bit to go to 0 (it is
  262. * auto-clearing). This should happen within 0.5 seconds per the
  263. * IEEE spec.
  264. */
  265. reg = 0x8000;
  266. while (((reg & 0x8000) != 0) && timeout--) {
  267. if (miiphy_read(devname, addr, PHY_BMCR, &reg) != 0) {
  268. debug("PHY status read failed\n");
  269. return -1;
  270. }
  271. udelay(1000);
  272. }
  273. if ((reg & 0x8000) == 0) {
  274. return (0);
  275. } else {
  276. puts ("PHY reset timed out\n");
  277. return (-1);
  278. }
  279. return (0);
  280. }
  281. /*****************************************************************************
  282. *
  283. * Determine the ethernet speed (10/100/1000). Return 10 on error.
  284. */
  285. int miiphy_speed(const char *devname, unsigned char addr)
  286. {
  287. u16 bmcr, anlpar;
  288. #if defined(CONFIG_PHY_GIGE)
  289. u16 btsr;
  290. /*
  291. * Check for 1000BASE-X. If it is supported, then assume that the speed
  292. * is 1000.
  293. */
  294. if (miiphy_is_1000base_x (devname, addr)) {
  295. return _1000BASET;
  296. }
  297. /*
  298. * No 1000BASE-X, so assume 1000BASE-T/100BASE-TX/10BASE-T register set.
  299. */
  300. /* Check for 1000BASE-T. */
  301. if (miiphy_read (devname, addr, PHY_1000BTSR, &btsr)) {
  302. printf ("PHY 1000BT status");
  303. goto miiphy_read_failed;
  304. }
  305. if (btsr != 0xFFFF &&
  306. (btsr & (PHY_1000BTSR_1000FD | PHY_1000BTSR_1000HD))) {
  307. return _1000BASET;
  308. }
  309. #endif /* CONFIG_PHY_GIGE */
  310. /* Check Basic Management Control Register first. */
  311. if (miiphy_read (devname, addr, PHY_BMCR, &bmcr)) {
  312. printf ("PHY speed");
  313. goto miiphy_read_failed;
  314. }
  315. /* Check if auto-negotiation is on. */
  316. if (bmcr & PHY_BMCR_AUTON) {
  317. /* Get auto-negotiation results. */
  318. if (miiphy_read (devname, addr, PHY_ANLPAR, &anlpar)) {
  319. printf ("PHY AN speed");
  320. goto miiphy_read_failed;
  321. }
  322. return (anlpar & PHY_ANLPAR_100) ? _100BASET : _10BASET;
  323. }
  324. /* Get speed from basic control settings. */
  325. return (bmcr & PHY_BMCR_100MB) ? _100BASET : _10BASET;
  326. miiphy_read_failed:
  327. printf (" read failed, assuming 10BASE-T\n");
  328. return _10BASET;
  329. }
  330. /*****************************************************************************
  331. *
  332. * Determine full/half duplex. Return half on error.
  333. */
  334. int miiphy_duplex(const char *devname, unsigned char addr)
  335. {
  336. u16 bmcr, anlpar;
  337. #if defined(CONFIG_PHY_GIGE)
  338. u16 btsr;
  339. /* Check for 1000BASE-X. */
  340. if (miiphy_is_1000base_x (devname, addr)) {
  341. /* 1000BASE-X */
  342. if (miiphy_read (devname, addr, PHY_ANLPAR, &anlpar)) {
  343. printf ("1000BASE-X PHY AN duplex");
  344. goto miiphy_read_failed;
  345. }
  346. }
  347. /*
  348. * No 1000BASE-X, so assume 1000BASE-T/100BASE-TX/10BASE-T register set.
  349. */
  350. /* Check for 1000BASE-T. */
  351. if (miiphy_read (devname, addr, PHY_1000BTSR, &btsr)) {
  352. printf ("PHY 1000BT status");
  353. goto miiphy_read_failed;
  354. }
  355. if (btsr != 0xFFFF) {
  356. if (btsr & PHY_1000BTSR_1000FD) {
  357. return FULL;
  358. } else if (btsr & PHY_1000BTSR_1000HD) {
  359. return HALF;
  360. }
  361. }
  362. #endif /* CONFIG_PHY_GIGE */
  363. /* Check Basic Management Control Register first. */
  364. if (miiphy_read (devname, addr, PHY_BMCR, &bmcr)) {
  365. puts ("PHY duplex");
  366. goto miiphy_read_failed;
  367. }
  368. /* Check if auto-negotiation is on. */
  369. if (bmcr & PHY_BMCR_AUTON) {
  370. /* Get auto-negotiation results. */
  371. if (miiphy_read (devname, addr, PHY_ANLPAR, &anlpar)) {
  372. puts ("PHY AN duplex");
  373. goto miiphy_read_failed;
  374. }
  375. return (anlpar & (PHY_ANLPAR_10FD | PHY_ANLPAR_TXFD)) ?
  376. FULL : HALF;
  377. }
  378. /* Get speed from basic control settings. */
  379. return (bmcr & PHY_BMCR_DPLX) ? FULL : HALF;
  380. miiphy_read_failed:
  381. printf (" read failed, assuming half duplex\n");
  382. return HALF;
  383. }
  384. /*****************************************************************************
  385. *
  386. * Return 1 if PHY supports 1000BASE-X, 0 if PHY supports 10BASE-T/100BASE-TX/
  387. * 1000BASE-T, or on error.
  388. */
  389. int miiphy_is_1000base_x(const char *devname, unsigned char addr)
  390. {
  391. #if defined(CONFIG_PHY_GIGE)
  392. u16 exsr;
  393. if (miiphy_read (devname, addr, PHY_EXSR, &exsr)) {
  394. printf ("PHY extended status read failed, assuming no "
  395. "1000BASE-X\n");
  396. return 0;
  397. }
  398. return 0 != (exsr & (PHY_EXSR_1000XF | PHY_EXSR_1000XH));
  399. #else
  400. return 0;
  401. #endif
  402. }
  403. #ifdef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
  404. /*****************************************************************************
  405. *
  406. * Determine link status
  407. */
  408. int miiphy_link(const char *devname, unsigned char addr)
  409. {
  410. unsigned short reg;
  411. /* dummy read; needed to latch some phys */
  412. (void)miiphy_read (devname, addr, PHY_BMSR, &reg);
  413. if (miiphy_read (devname, addr, PHY_BMSR, &reg)) {
  414. puts ("PHY_BMSR read failed, assuming no link\n");
  415. return (0);
  416. }
  417. /* Determine if a link is active */
  418. if ((reg & PHY_BMSR_LS) != 0) {
  419. return (1);
  420. } else {
  421. return (0);
  422. }
  423. }
  424. #endif