cfi_flash.c 55 KB

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  1. /*
  2. * (C) Copyright 2002-2004
  3. * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com
  4. *
  5. * Copyright (C) 2003 Arabella Software Ltd.
  6. * Yuli Barcohen <yuli@arabellasw.com>
  7. *
  8. * Copyright (C) 2004
  9. * Ed Okerson
  10. *
  11. * Copyright (C) 2006
  12. * Tolunay Orkun <listmember@orkun.us>
  13. *
  14. * See file CREDITS for list of people who contributed to this
  15. * project.
  16. *
  17. * This program is free software; you can redistribute it and/or
  18. * modify it under the terms of the GNU General Public License as
  19. * published by the Free Software Foundation; either version 2 of
  20. * the License, or (at your option) any later version.
  21. *
  22. * This program is distributed in the hope that it will be useful,
  23. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  24. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  25. * GNU General Public License for more details.
  26. *
  27. * You should have received a copy of the GNU General Public License
  28. * along with this program; if not, write to the Free Software
  29. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  30. * MA 02111-1307 USA
  31. *
  32. */
  33. /* The DEBUG define must be before common to enable debugging */
  34. /* #define DEBUG */
  35. #include <common.h>
  36. #include <asm/processor.h>
  37. #include <asm/io.h>
  38. #include <asm/byteorder.h>
  39. #include <environment.h>
  40. #include <mtd/cfi_flash.h>
  41. /*
  42. * This file implements a Common Flash Interface (CFI) driver for
  43. * U-Boot.
  44. *
  45. * The width of the port and the width of the chips are determined at
  46. * initialization. These widths are used to calculate the address for
  47. * access CFI data structures.
  48. *
  49. * References
  50. * JEDEC Standard JESD68 - Common Flash Interface (CFI)
  51. * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
  52. * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
  53. * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
  54. * AMD CFI Specification, Release 2.0 December 1, 2001
  55. * AMD/Spansion Application Note: Migration from Single-byte to Three-byte
  56. * Device IDs, Publication Number 25538 Revision A, November 8, 2001
  57. *
  58. * Define CONFIG_SYS_WRITE_SWAPPED_DATA, if you have to swap the Bytes between
  59. * reading and writing ... (yes there is such a Hardware).
  60. */
  61. #ifndef CONFIG_SYS_FLASH_BANKS_LIST
  62. #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
  63. #endif
  64. static uint flash_offset_cfi[2] = { FLASH_OFFSET_CFI, FLASH_OFFSET_CFI_ALT };
  65. static uint flash_verbose = 1;
  66. /* use CONFIG_SYS_MAX_FLASH_BANKS_DETECT if defined */
  67. #ifdef CONFIG_SYS_MAX_FLASH_BANKS_DETECT
  68. # define CFI_MAX_FLASH_BANKS CONFIG_SYS_MAX_FLASH_BANKS_DETECT
  69. #else
  70. # define CFI_MAX_FLASH_BANKS CONFIG_SYS_MAX_FLASH_BANKS
  71. #endif
  72. flash_info_t flash_info[CFI_MAX_FLASH_BANKS]; /* FLASH chips info */
  73. /*
  74. * Check if chip width is defined. If not, start detecting with 8bit.
  75. */
  76. #ifndef CONFIG_SYS_FLASH_CFI_WIDTH
  77. #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT
  78. #endif
  79. static phys_addr_t __cfi_flash_bank_addr(int i)
  80. {
  81. return ((phys_addr_t [])CONFIG_SYS_FLASH_BANKS_LIST)[i];
  82. }
  83. phys_addr_t cfi_flash_bank_addr(int i)
  84. __attribute__((weak, alias("__cfi_flash_bank_addr")));
  85. static void __flash_write8(u8 value, void *addr)
  86. {
  87. __raw_writeb(value, addr);
  88. }
  89. static void __flash_write16(u16 value, void *addr)
  90. {
  91. __raw_writew(value, addr);
  92. }
  93. static void __flash_write32(u32 value, void *addr)
  94. {
  95. __raw_writel(value, addr);
  96. }
  97. static void __flash_write64(u64 value, void *addr)
  98. {
  99. /* No architectures currently implement __raw_writeq() */
  100. *(volatile u64 *)addr = value;
  101. }
  102. static u8 __flash_read8(void *addr)
  103. {
  104. return __raw_readb(addr);
  105. }
  106. static u16 __flash_read16(void *addr)
  107. {
  108. return __raw_readw(addr);
  109. }
  110. static u32 __flash_read32(void *addr)
  111. {
  112. return __raw_readl(addr);
  113. }
  114. static u64 __flash_read64(void *addr)
  115. {
  116. /* No architectures currently implement __raw_readq() */
  117. return *(volatile u64 *)addr;
  118. }
  119. #ifdef CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
  120. void flash_write8(u8 value, void *addr)__attribute__((weak, alias("__flash_write8")));
  121. void flash_write16(u16 value, void *addr)__attribute__((weak, alias("__flash_write16")));
  122. void flash_write32(u32 value, void *addr)__attribute__((weak, alias("__flash_write32")));
  123. void flash_write64(u64 value, void *addr)__attribute__((weak, alias("__flash_write64")));
  124. u8 flash_read8(void *addr)__attribute__((weak, alias("__flash_read8")));
  125. u16 flash_read16(void *addr)__attribute__((weak, alias("__flash_read16")));
  126. u32 flash_read32(void *addr)__attribute__((weak, alias("__flash_read32")));
  127. u64 flash_read64(void *addr)__attribute__((weak, alias("__flash_read64")));
  128. #else
  129. #define flash_write8 __flash_write8
  130. #define flash_write16 __flash_write16
  131. #define flash_write32 __flash_write32
  132. #define flash_write64 __flash_write64
  133. #define flash_read8 __flash_read8
  134. #define flash_read16 __flash_read16
  135. #define flash_read32 __flash_read32
  136. #define flash_read64 __flash_read64
  137. #endif
  138. /*-----------------------------------------------------------------------
  139. */
  140. #if defined(CONFIG_ENV_IS_IN_FLASH) || defined(CONFIG_ENV_ADDR_REDUND) || (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE)
  141. flash_info_t *flash_get_info(ulong base)
  142. {
  143. int i;
  144. flash_info_t *info = NULL;
  145. for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
  146. info = & flash_info[i];
  147. if (info->size && info->start[0] <= base &&
  148. base <= info->start[0] + info->size - 1)
  149. break;
  150. }
  151. return info;
  152. }
  153. #endif
  154. unsigned long flash_sector_size(flash_info_t *info, flash_sect_t sect)
  155. {
  156. if (sect != (info->sector_count - 1))
  157. return info->start[sect + 1] - info->start[sect];
  158. else
  159. return info->start[0] + info->size - info->start[sect];
  160. }
  161. /*-----------------------------------------------------------------------
  162. * create an address based on the offset and the port width
  163. */
  164. static inline void *
  165. flash_map (flash_info_t * info, flash_sect_t sect, uint offset)
  166. {
  167. unsigned int byte_offset = offset * info->portwidth;
  168. return (void *)(info->start[sect] + byte_offset);
  169. }
  170. static inline void flash_unmap(flash_info_t *info, flash_sect_t sect,
  171. unsigned int offset, void *addr)
  172. {
  173. }
  174. /*-----------------------------------------------------------------------
  175. * make a proper sized command based on the port and chip widths
  176. */
  177. static void flash_make_cmd(flash_info_t *info, u32 cmd, void *cmdbuf)
  178. {
  179. int i;
  180. int cword_offset;
  181. int cp_offset;
  182. #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  183. u32 cmd_le = cpu_to_le32(cmd);
  184. #endif
  185. uchar val;
  186. uchar *cp = (uchar *) cmdbuf;
  187. for (i = info->portwidth; i > 0; i--){
  188. cword_offset = (info->portwidth-i)%info->chipwidth;
  189. #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  190. cp_offset = info->portwidth - i;
  191. val = *((uchar*)&cmd_le + cword_offset);
  192. #else
  193. cp_offset = i - 1;
  194. val = *((uchar*)&cmd + sizeof(u32) - cword_offset - 1);
  195. #endif
  196. cp[cp_offset] = (cword_offset >= sizeof(u32)) ? 0x00 : val;
  197. }
  198. }
  199. #ifdef DEBUG
  200. /*-----------------------------------------------------------------------
  201. * Debug support
  202. */
  203. static void print_longlong (char *str, unsigned long long data)
  204. {
  205. int i;
  206. char *cp;
  207. cp = (char *) &data;
  208. for (i = 0; i < 8; i++)
  209. sprintf (&str[i * 2], "%2.2x", *cp++);
  210. }
  211. static void flash_printqry (struct cfi_qry *qry)
  212. {
  213. u8 *p = (u8 *)qry;
  214. int x, y;
  215. for (x = 0; x < sizeof(struct cfi_qry); x += 16) {
  216. debug("%02x : ", x);
  217. for (y = 0; y < 16; y++)
  218. debug("%2.2x ", p[x + y]);
  219. debug(" ");
  220. for (y = 0; y < 16; y++) {
  221. unsigned char c = p[x + y];
  222. if (c >= 0x20 && c <= 0x7e)
  223. debug("%c", c);
  224. else
  225. debug(".");
  226. }
  227. debug("\n");
  228. }
  229. }
  230. #endif
  231. /*-----------------------------------------------------------------------
  232. * read a character at a port width address
  233. */
  234. static inline uchar flash_read_uchar (flash_info_t * info, uint offset)
  235. {
  236. uchar *cp;
  237. uchar retval;
  238. cp = flash_map (info, 0, offset);
  239. #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  240. retval = flash_read8(cp);
  241. #else
  242. retval = flash_read8(cp + info->portwidth - 1);
  243. #endif
  244. flash_unmap (info, 0, offset, cp);
  245. return retval;
  246. }
  247. /*-----------------------------------------------------------------------
  248. * read a word at a port width address, assume 16bit bus
  249. */
  250. static inline ushort flash_read_word (flash_info_t * info, uint offset)
  251. {
  252. ushort *addr, retval;
  253. addr = flash_map (info, 0, offset);
  254. retval = flash_read16 (addr);
  255. flash_unmap (info, 0, offset, addr);
  256. return retval;
  257. }
  258. /*-----------------------------------------------------------------------
  259. * read a long word by picking the least significant byte of each maximum
  260. * port size word. Swap for ppc format.
  261. */
  262. static ulong flash_read_long (flash_info_t * info, flash_sect_t sect,
  263. uint offset)
  264. {
  265. uchar *addr;
  266. ulong retval;
  267. #ifdef DEBUG
  268. int x;
  269. #endif
  270. addr = flash_map (info, sect, offset);
  271. #ifdef DEBUG
  272. debug ("long addr is at %p info->portwidth = %d\n", addr,
  273. info->portwidth);
  274. for (x = 0; x < 4 * info->portwidth; x++) {
  275. debug ("addr[%x] = 0x%x\n", x, flash_read8(addr + x));
  276. }
  277. #endif
  278. #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  279. retval = ((flash_read8(addr) << 16) |
  280. (flash_read8(addr + info->portwidth) << 24) |
  281. (flash_read8(addr + 2 * info->portwidth)) |
  282. (flash_read8(addr + 3 * info->portwidth) << 8));
  283. #else
  284. retval = ((flash_read8(addr + 2 * info->portwidth - 1) << 24) |
  285. (flash_read8(addr + info->portwidth - 1) << 16) |
  286. (flash_read8(addr + 4 * info->portwidth - 1) << 8) |
  287. (flash_read8(addr + 3 * info->portwidth - 1)));
  288. #endif
  289. flash_unmap(info, sect, offset, addr);
  290. return retval;
  291. }
  292. /*
  293. * Write a proper sized command to the correct address
  294. */
  295. void flash_write_cmd (flash_info_t * info, flash_sect_t sect,
  296. uint offset, u32 cmd)
  297. {
  298. void *addr;
  299. cfiword_t cword;
  300. addr = flash_map (info, sect, offset);
  301. flash_make_cmd (info, cmd, &cword);
  302. switch (info->portwidth) {
  303. case FLASH_CFI_8BIT:
  304. debug ("fwc addr %p cmd %x %x 8bit x %d bit\n", addr, cmd,
  305. cword.c, info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
  306. flash_write8(cword.c, addr);
  307. break;
  308. case FLASH_CFI_16BIT:
  309. debug ("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr,
  310. cmd, cword.w,
  311. info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
  312. flash_write16(cword.w, addr);
  313. break;
  314. case FLASH_CFI_32BIT:
  315. debug ("fwc addr %p cmd %x %8.8lx 32bit x %d bit\n", addr,
  316. cmd, cword.l,
  317. info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
  318. flash_write32(cword.l, addr);
  319. break;
  320. case FLASH_CFI_64BIT:
  321. #ifdef DEBUG
  322. {
  323. char str[20];
  324. print_longlong (str, cword.ll);
  325. debug ("fwrite addr %p cmd %x %s 64 bit x %d bit\n",
  326. addr, cmd, str,
  327. info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
  328. }
  329. #endif
  330. flash_write64(cword.ll, addr);
  331. break;
  332. }
  333. /* Ensure all the instructions are fully finished */
  334. sync();
  335. flash_unmap(info, sect, offset, addr);
  336. }
  337. static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect)
  338. {
  339. flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_UNLOCK_START);
  340. flash_write_cmd (info, sect, info->addr_unlock2, AMD_CMD_UNLOCK_ACK);
  341. }
  342. /*-----------------------------------------------------------------------
  343. */
  344. static int flash_isequal (flash_info_t * info, flash_sect_t sect,
  345. uint offset, uchar cmd)
  346. {
  347. void *addr;
  348. cfiword_t cword;
  349. int retval;
  350. addr = flash_map (info, sect, offset);
  351. flash_make_cmd (info, cmd, &cword);
  352. debug ("is= cmd %x(%c) addr %p ", cmd, cmd, addr);
  353. switch (info->portwidth) {
  354. case FLASH_CFI_8BIT:
  355. debug ("is= %x %x\n", flash_read8(addr), cword.c);
  356. retval = (flash_read8(addr) == cword.c);
  357. break;
  358. case FLASH_CFI_16BIT:
  359. debug ("is= %4.4x %4.4x\n", flash_read16(addr), cword.w);
  360. retval = (flash_read16(addr) == cword.w);
  361. break;
  362. case FLASH_CFI_32BIT:
  363. debug ("is= %8.8x %8.8lx\n", flash_read32(addr), cword.l);
  364. retval = (flash_read32(addr) == cword.l);
  365. break;
  366. case FLASH_CFI_64BIT:
  367. #ifdef DEBUG
  368. {
  369. char str1[20];
  370. char str2[20];
  371. print_longlong (str1, flash_read64(addr));
  372. print_longlong (str2, cword.ll);
  373. debug ("is= %s %s\n", str1, str2);
  374. }
  375. #endif
  376. retval = (flash_read64(addr) == cword.ll);
  377. break;
  378. default:
  379. retval = 0;
  380. break;
  381. }
  382. flash_unmap(info, sect, offset, addr);
  383. return retval;
  384. }
  385. /*-----------------------------------------------------------------------
  386. */
  387. static int flash_isset (flash_info_t * info, flash_sect_t sect,
  388. uint offset, uchar cmd)
  389. {
  390. void *addr;
  391. cfiword_t cword;
  392. int retval;
  393. addr = flash_map (info, sect, offset);
  394. flash_make_cmd (info, cmd, &cword);
  395. switch (info->portwidth) {
  396. case FLASH_CFI_8BIT:
  397. retval = ((flash_read8(addr) & cword.c) == cword.c);
  398. break;
  399. case FLASH_CFI_16BIT:
  400. retval = ((flash_read16(addr) & cword.w) == cword.w);
  401. break;
  402. case FLASH_CFI_32BIT:
  403. retval = ((flash_read32(addr) & cword.l) == cword.l);
  404. break;
  405. case FLASH_CFI_64BIT:
  406. retval = ((flash_read64(addr) & cword.ll) == cword.ll);
  407. break;
  408. default:
  409. retval = 0;
  410. break;
  411. }
  412. flash_unmap(info, sect, offset, addr);
  413. return retval;
  414. }
  415. /*-----------------------------------------------------------------------
  416. */
  417. static int flash_toggle (flash_info_t * info, flash_sect_t sect,
  418. uint offset, uchar cmd)
  419. {
  420. void *addr;
  421. cfiword_t cword;
  422. int retval;
  423. addr = flash_map (info, sect, offset);
  424. flash_make_cmd (info, cmd, &cword);
  425. switch (info->portwidth) {
  426. case FLASH_CFI_8BIT:
  427. retval = flash_read8(addr) != flash_read8(addr);
  428. break;
  429. case FLASH_CFI_16BIT:
  430. retval = flash_read16(addr) != flash_read16(addr);
  431. break;
  432. case FLASH_CFI_32BIT:
  433. retval = flash_read32(addr) != flash_read32(addr);
  434. break;
  435. case FLASH_CFI_64BIT:
  436. retval = ( (flash_read32( addr ) != flash_read32( addr )) ||
  437. (flash_read32(addr+4) != flash_read32(addr+4)) );
  438. break;
  439. default:
  440. retval = 0;
  441. break;
  442. }
  443. flash_unmap(info, sect, offset, addr);
  444. return retval;
  445. }
  446. /*
  447. * flash_is_busy - check to see if the flash is busy
  448. *
  449. * This routine checks the status of the chip and returns true if the
  450. * chip is busy.
  451. */
  452. static int flash_is_busy (flash_info_t * info, flash_sect_t sect)
  453. {
  454. int retval;
  455. switch (info->vendor) {
  456. case CFI_CMDSET_INTEL_PROG_REGIONS:
  457. case CFI_CMDSET_INTEL_STANDARD:
  458. case CFI_CMDSET_INTEL_EXTENDED:
  459. retval = !flash_isset (info, sect, 0, FLASH_STATUS_DONE);
  460. break;
  461. case CFI_CMDSET_AMD_STANDARD:
  462. case CFI_CMDSET_AMD_EXTENDED:
  463. #ifdef CONFIG_FLASH_CFI_LEGACY
  464. case CFI_CMDSET_AMD_LEGACY:
  465. #endif
  466. retval = flash_toggle (info, sect, 0, AMD_STATUS_TOGGLE);
  467. break;
  468. default:
  469. retval = 0;
  470. }
  471. debug ("flash_is_busy: %d\n", retval);
  472. return retval;
  473. }
  474. /*-----------------------------------------------------------------------
  475. * wait for XSR.7 to be set. Time out with an error if it does not.
  476. * This routine does not set the flash to read-array mode.
  477. */
  478. static int flash_status_check (flash_info_t * info, flash_sect_t sector,
  479. ulong tout, char *prompt)
  480. {
  481. ulong start;
  482. #if CONFIG_SYS_HZ != 1000
  483. if ((ulong)CONFIG_SYS_HZ > 100000)
  484. tout *= (ulong)CONFIG_SYS_HZ / 1000; /* for a big HZ, avoid overflow */
  485. else
  486. tout = DIV_ROUND_UP(tout * (ulong)CONFIG_SYS_HZ, 1000);
  487. #endif
  488. /* Wait for command completion */
  489. reset_timer();
  490. start = get_timer (0);
  491. while (flash_is_busy (info, sector)) {
  492. if (get_timer (start) > tout) {
  493. printf ("Flash %s timeout at address %lx data %lx\n",
  494. prompt, info->start[sector],
  495. flash_read_long (info, sector, 0));
  496. flash_write_cmd (info, sector, 0, info->cmd_reset);
  497. return ERR_TIMOUT;
  498. }
  499. udelay (1); /* also triggers watchdog */
  500. }
  501. return ERR_OK;
  502. }
  503. /*-----------------------------------------------------------------------
  504. * Wait for XSR.7 to be set, if it times out print an error, otherwise
  505. * do a full status check.
  506. *
  507. * This routine sets the flash to read-array mode.
  508. */
  509. static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
  510. ulong tout, char *prompt)
  511. {
  512. int retcode;
  513. retcode = flash_status_check (info, sector, tout, prompt);
  514. switch (info->vendor) {
  515. case CFI_CMDSET_INTEL_PROG_REGIONS:
  516. case CFI_CMDSET_INTEL_EXTENDED:
  517. case CFI_CMDSET_INTEL_STANDARD:
  518. if ((retcode != ERR_OK)
  519. && !flash_isequal (info, sector, 0, FLASH_STATUS_DONE)) {
  520. retcode = ERR_INVAL;
  521. printf ("Flash %s error at address %lx\n", prompt,
  522. info->start[sector]);
  523. if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS |
  524. FLASH_STATUS_PSLBS)) {
  525. puts ("Command Sequence Error.\n");
  526. } else if (flash_isset (info, sector, 0,
  527. FLASH_STATUS_ECLBS)) {
  528. puts ("Block Erase Error.\n");
  529. retcode = ERR_NOT_ERASED;
  530. } else if (flash_isset (info, sector, 0,
  531. FLASH_STATUS_PSLBS)) {
  532. puts ("Locking Error\n");
  533. }
  534. if (flash_isset (info, sector, 0, FLASH_STATUS_DPS)) {
  535. puts ("Block locked.\n");
  536. retcode = ERR_PROTECTED;
  537. }
  538. if (flash_isset (info, sector, 0, FLASH_STATUS_VPENS))
  539. puts ("Vpp Low Error.\n");
  540. }
  541. flash_write_cmd (info, sector, 0, info->cmd_reset);
  542. break;
  543. default:
  544. break;
  545. }
  546. return retcode;
  547. }
  548. static int use_flash_status_poll(flash_info_t *info)
  549. {
  550. #ifdef CONFIG_SYS_CFI_FLASH_STATUS_POLL
  551. if (info->vendor == CFI_CMDSET_AMD_EXTENDED ||
  552. info->vendor == CFI_CMDSET_AMD_STANDARD)
  553. return 1;
  554. #endif
  555. return 0;
  556. }
  557. static int flash_status_poll(flash_info_t *info, void *src, void *dst,
  558. ulong tout, char *prompt)
  559. {
  560. #ifdef CONFIG_SYS_CFI_FLASH_STATUS_POLL
  561. ulong start;
  562. int ready;
  563. #if CONFIG_SYS_HZ != 1000
  564. if ((ulong)CONFIG_SYS_HZ > 100000)
  565. tout *= (ulong)CONFIG_SYS_HZ / 1000; /* for a big HZ, avoid overflow */
  566. else
  567. tout = DIV_ROUND_UP(tout * (ulong)CONFIG_SYS_HZ, 1000);
  568. #endif
  569. /* Wait for command completion */
  570. reset_timer();
  571. start = get_timer(0);
  572. while (1) {
  573. switch (info->portwidth) {
  574. case FLASH_CFI_8BIT:
  575. ready = flash_read8(dst) == flash_read8(src);
  576. break;
  577. case FLASH_CFI_16BIT:
  578. ready = flash_read16(dst) == flash_read16(src);
  579. break;
  580. case FLASH_CFI_32BIT:
  581. ready = flash_read32(dst) == flash_read32(src);
  582. break;
  583. case FLASH_CFI_64BIT:
  584. ready = flash_read64(dst) == flash_read64(src);
  585. break;
  586. default:
  587. ready = 0;
  588. break;
  589. }
  590. if (ready)
  591. break;
  592. if (get_timer(start) > tout) {
  593. printf("Flash %s timeout at address %lx data %lx\n",
  594. prompt, (ulong)dst, (ulong)flash_read8(dst));
  595. return ERR_TIMOUT;
  596. }
  597. udelay(1); /* also triggers watchdog */
  598. }
  599. #endif /* CONFIG_SYS_CFI_FLASH_STATUS_POLL */
  600. return ERR_OK;
  601. }
  602. /*-----------------------------------------------------------------------
  603. */
  604. static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c)
  605. {
  606. #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  607. unsigned short w;
  608. unsigned int l;
  609. unsigned long long ll;
  610. #endif
  611. switch (info->portwidth) {
  612. case FLASH_CFI_8BIT:
  613. cword->c = c;
  614. break;
  615. case FLASH_CFI_16BIT:
  616. #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  617. w = c;
  618. w <<= 8;
  619. cword->w = (cword->w >> 8) | w;
  620. #else
  621. cword->w = (cword->w << 8) | c;
  622. #endif
  623. break;
  624. case FLASH_CFI_32BIT:
  625. #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  626. l = c;
  627. l <<= 24;
  628. cword->l = (cword->l >> 8) | l;
  629. #else
  630. cword->l = (cword->l << 8) | c;
  631. #endif
  632. break;
  633. case FLASH_CFI_64BIT:
  634. #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  635. ll = c;
  636. ll <<= 56;
  637. cword->ll = (cword->ll >> 8) | ll;
  638. #else
  639. cword->ll = (cword->ll << 8) | c;
  640. #endif
  641. break;
  642. }
  643. }
  644. /*
  645. * Loop through the sector table starting from the previously found sector.
  646. * Searches forwards or backwards, dependent on the passed address.
  647. */
  648. static flash_sect_t find_sector (flash_info_t * info, ulong addr)
  649. {
  650. static flash_sect_t saved_sector = 0; /* previously found sector */
  651. flash_sect_t sector = saved_sector;
  652. while ((info->start[sector] < addr)
  653. && (sector < info->sector_count - 1))
  654. sector++;
  655. while ((info->start[sector] > addr) && (sector > 0))
  656. /*
  657. * also decrements the sector in case of an overshot
  658. * in the first loop
  659. */
  660. sector--;
  661. saved_sector = sector;
  662. return sector;
  663. }
  664. /*-----------------------------------------------------------------------
  665. */
  666. static int flash_write_cfiword (flash_info_t * info, ulong dest,
  667. cfiword_t cword)
  668. {
  669. void *dstaddr = (void *)dest;
  670. int flag;
  671. flash_sect_t sect = 0;
  672. char sect_found = 0;
  673. /* Check if Flash is (sufficiently) erased */
  674. switch (info->portwidth) {
  675. case FLASH_CFI_8BIT:
  676. flag = ((flash_read8(dstaddr) & cword.c) == cword.c);
  677. break;
  678. case FLASH_CFI_16BIT:
  679. flag = ((flash_read16(dstaddr) & cword.w) == cword.w);
  680. break;
  681. case FLASH_CFI_32BIT:
  682. flag = ((flash_read32(dstaddr) & cword.l) == cword.l);
  683. break;
  684. case FLASH_CFI_64BIT:
  685. flag = ((flash_read64(dstaddr) & cword.ll) == cword.ll);
  686. break;
  687. default:
  688. flag = 0;
  689. break;
  690. }
  691. if (!flag)
  692. return ERR_NOT_ERASED;
  693. /* Disable interrupts which might cause a timeout here */
  694. flag = disable_interrupts ();
  695. switch (info->vendor) {
  696. case CFI_CMDSET_INTEL_PROG_REGIONS:
  697. case CFI_CMDSET_INTEL_EXTENDED:
  698. case CFI_CMDSET_INTEL_STANDARD:
  699. flash_write_cmd (info, 0, 0, FLASH_CMD_CLEAR_STATUS);
  700. flash_write_cmd (info, 0, 0, FLASH_CMD_WRITE);
  701. break;
  702. case CFI_CMDSET_AMD_EXTENDED:
  703. case CFI_CMDSET_AMD_STANDARD:
  704. sect = find_sector(info, dest);
  705. flash_unlock_seq (info, sect);
  706. flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_WRITE);
  707. sect_found = 1;
  708. break;
  709. #ifdef CONFIG_FLASH_CFI_LEGACY
  710. case CFI_CMDSET_AMD_LEGACY:
  711. sect = find_sector(info, dest);
  712. flash_unlock_seq (info, 0);
  713. flash_write_cmd (info, 0, info->addr_unlock1, AMD_CMD_WRITE);
  714. sect_found = 1;
  715. break;
  716. #endif
  717. }
  718. switch (info->portwidth) {
  719. case FLASH_CFI_8BIT:
  720. flash_write8(cword.c, dstaddr);
  721. break;
  722. case FLASH_CFI_16BIT:
  723. flash_write16(cword.w, dstaddr);
  724. break;
  725. case FLASH_CFI_32BIT:
  726. flash_write32(cword.l, dstaddr);
  727. break;
  728. case FLASH_CFI_64BIT:
  729. flash_write64(cword.ll, dstaddr);
  730. break;
  731. }
  732. /* re-enable interrupts if necessary */
  733. if (flag)
  734. enable_interrupts ();
  735. if (!sect_found)
  736. sect = find_sector (info, dest);
  737. if (use_flash_status_poll(info))
  738. return flash_status_poll(info, &cword, dstaddr,
  739. info->write_tout, "write");
  740. else
  741. return flash_full_status_check(info, sect,
  742. info->write_tout, "write");
  743. }
  744. #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
  745. static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp,
  746. int len)
  747. {
  748. flash_sect_t sector;
  749. int cnt;
  750. int retcode;
  751. void *src = cp;
  752. void *dst = (void *)dest;
  753. void *dst2 = dst;
  754. int flag = 0;
  755. uint offset = 0;
  756. unsigned int shift;
  757. uchar write_cmd;
  758. switch (info->portwidth) {
  759. case FLASH_CFI_8BIT:
  760. shift = 0;
  761. break;
  762. case FLASH_CFI_16BIT:
  763. shift = 1;
  764. break;
  765. case FLASH_CFI_32BIT:
  766. shift = 2;
  767. break;
  768. case FLASH_CFI_64BIT:
  769. shift = 3;
  770. break;
  771. default:
  772. retcode = ERR_INVAL;
  773. goto out_unmap;
  774. }
  775. cnt = len >> shift;
  776. while ((cnt-- > 0) && (flag == 0)) {
  777. switch (info->portwidth) {
  778. case FLASH_CFI_8BIT:
  779. flag = ((flash_read8(dst2) & flash_read8(src)) ==
  780. flash_read8(src));
  781. src += 1, dst2 += 1;
  782. break;
  783. case FLASH_CFI_16BIT:
  784. flag = ((flash_read16(dst2) & flash_read16(src)) ==
  785. flash_read16(src));
  786. src += 2, dst2 += 2;
  787. break;
  788. case FLASH_CFI_32BIT:
  789. flag = ((flash_read32(dst2) & flash_read32(src)) ==
  790. flash_read32(src));
  791. src += 4, dst2 += 4;
  792. break;
  793. case FLASH_CFI_64BIT:
  794. flag = ((flash_read64(dst2) & flash_read64(src)) ==
  795. flash_read64(src));
  796. src += 8, dst2 += 8;
  797. break;
  798. }
  799. }
  800. if (!flag) {
  801. retcode = ERR_NOT_ERASED;
  802. goto out_unmap;
  803. }
  804. src = cp;
  805. sector = find_sector (info, dest);
  806. switch (info->vendor) {
  807. case CFI_CMDSET_INTEL_PROG_REGIONS:
  808. case CFI_CMDSET_INTEL_STANDARD:
  809. case CFI_CMDSET_INTEL_EXTENDED:
  810. write_cmd = (info->vendor == CFI_CMDSET_INTEL_PROG_REGIONS) ?
  811. FLASH_CMD_WRITE_BUFFER_PROG : FLASH_CMD_WRITE_TO_BUFFER;
  812. flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
  813. flash_write_cmd (info, sector, 0, FLASH_CMD_READ_STATUS);
  814. flash_write_cmd (info, sector, 0, write_cmd);
  815. retcode = flash_status_check (info, sector,
  816. info->buffer_write_tout,
  817. "write to buffer");
  818. if (retcode == ERR_OK) {
  819. /* reduce the number of loops by the width of
  820. * the port */
  821. cnt = len >> shift;
  822. flash_write_cmd (info, sector, 0, cnt - 1);
  823. while (cnt-- > 0) {
  824. switch (info->portwidth) {
  825. case FLASH_CFI_8BIT:
  826. flash_write8(flash_read8(src), dst);
  827. src += 1, dst += 1;
  828. break;
  829. case FLASH_CFI_16BIT:
  830. flash_write16(flash_read16(src), dst);
  831. src += 2, dst += 2;
  832. break;
  833. case FLASH_CFI_32BIT:
  834. flash_write32(flash_read32(src), dst);
  835. src += 4, dst += 4;
  836. break;
  837. case FLASH_CFI_64BIT:
  838. flash_write64(flash_read64(src), dst);
  839. src += 8, dst += 8;
  840. break;
  841. default:
  842. retcode = ERR_INVAL;
  843. goto out_unmap;
  844. }
  845. }
  846. flash_write_cmd (info, sector, 0,
  847. FLASH_CMD_WRITE_BUFFER_CONFIRM);
  848. retcode = flash_full_status_check (
  849. info, sector, info->buffer_write_tout,
  850. "buffer write");
  851. }
  852. break;
  853. case CFI_CMDSET_AMD_STANDARD:
  854. case CFI_CMDSET_AMD_EXTENDED:
  855. flash_unlock_seq(info,0);
  856. #ifdef CONFIG_FLASH_SPANSION_S29WS_N
  857. offset = ((unsigned long)dst - info->start[sector]) >> shift;
  858. #endif
  859. flash_write_cmd(info, sector, offset, AMD_CMD_WRITE_TO_BUFFER);
  860. cnt = len >> shift;
  861. flash_write_cmd(info, sector, offset, cnt - 1);
  862. switch (info->portwidth) {
  863. case FLASH_CFI_8BIT:
  864. while (cnt-- > 0) {
  865. flash_write8(flash_read8(src), dst);
  866. src += 1, dst += 1;
  867. }
  868. break;
  869. case FLASH_CFI_16BIT:
  870. while (cnt-- > 0) {
  871. flash_write16(flash_read16(src), dst);
  872. src += 2, dst += 2;
  873. }
  874. break;
  875. case FLASH_CFI_32BIT:
  876. while (cnt-- > 0) {
  877. flash_write32(flash_read32(src), dst);
  878. src += 4, dst += 4;
  879. }
  880. break;
  881. case FLASH_CFI_64BIT:
  882. while (cnt-- > 0) {
  883. flash_write64(flash_read64(src), dst);
  884. src += 8, dst += 8;
  885. }
  886. break;
  887. default:
  888. retcode = ERR_INVAL;
  889. goto out_unmap;
  890. }
  891. flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_BUFFER_CONFIRM);
  892. if (use_flash_status_poll(info))
  893. retcode = flash_status_poll(info, src - (1 << shift),
  894. dst - (1 << shift),
  895. info->buffer_write_tout,
  896. "buffer write");
  897. else
  898. retcode = flash_full_status_check(info, sector,
  899. info->buffer_write_tout,
  900. "buffer write");
  901. break;
  902. default:
  903. debug ("Unknown Command Set\n");
  904. retcode = ERR_INVAL;
  905. break;
  906. }
  907. out_unmap:
  908. return retcode;
  909. }
  910. #endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
  911. /*-----------------------------------------------------------------------
  912. */
  913. int flash_erase (flash_info_t * info, int s_first, int s_last)
  914. {
  915. int rcode = 0;
  916. int prot;
  917. flash_sect_t sect;
  918. int st;
  919. if (info->flash_id != FLASH_MAN_CFI) {
  920. puts ("Can't erase unknown flash type - aborted\n");
  921. return 1;
  922. }
  923. if ((s_first < 0) || (s_first > s_last)) {
  924. puts ("- no sectors to erase\n");
  925. return 1;
  926. }
  927. prot = 0;
  928. for (sect = s_first; sect <= s_last; ++sect) {
  929. if (info->protect[sect]) {
  930. prot++;
  931. }
  932. }
  933. if (prot) {
  934. printf ("- Warning: %d protected sectors will not be erased!\n",
  935. prot);
  936. } else if (flash_verbose) {
  937. putc ('\n');
  938. }
  939. for (sect = s_first; sect <= s_last; sect++) {
  940. if (info->protect[sect] == 0) { /* not protected */
  941. switch (info->vendor) {
  942. case CFI_CMDSET_INTEL_PROG_REGIONS:
  943. case CFI_CMDSET_INTEL_STANDARD:
  944. case CFI_CMDSET_INTEL_EXTENDED:
  945. flash_write_cmd (info, sect, 0,
  946. FLASH_CMD_CLEAR_STATUS);
  947. flash_write_cmd (info, sect, 0,
  948. FLASH_CMD_BLOCK_ERASE);
  949. flash_write_cmd (info, sect, 0,
  950. FLASH_CMD_ERASE_CONFIRM);
  951. break;
  952. case CFI_CMDSET_AMD_STANDARD:
  953. case CFI_CMDSET_AMD_EXTENDED:
  954. flash_unlock_seq (info, sect);
  955. flash_write_cmd (info, sect,
  956. info->addr_unlock1,
  957. AMD_CMD_ERASE_START);
  958. flash_unlock_seq (info, sect);
  959. flash_write_cmd (info, sect, 0,
  960. AMD_CMD_ERASE_SECTOR);
  961. break;
  962. #ifdef CONFIG_FLASH_CFI_LEGACY
  963. case CFI_CMDSET_AMD_LEGACY:
  964. flash_unlock_seq (info, 0);
  965. flash_write_cmd (info, 0, info->addr_unlock1,
  966. AMD_CMD_ERASE_START);
  967. flash_unlock_seq (info, 0);
  968. flash_write_cmd (info, sect, 0,
  969. AMD_CMD_ERASE_SECTOR);
  970. break;
  971. #endif
  972. default:
  973. debug ("Unkown flash vendor %d\n",
  974. info->vendor);
  975. break;
  976. }
  977. if (use_flash_status_poll(info)) {
  978. cfiword_t cword = (cfiword_t)0xffffffffffffffffULL;
  979. void *dest;
  980. dest = flash_map(info, sect, 0);
  981. st = flash_status_poll(info, &cword, dest,
  982. info->erase_blk_tout, "erase");
  983. flash_unmap(info, sect, 0, dest);
  984. } else
  985. st = flash_full_status_check(info, sect,
  986. info->erase_blk_tout,
  987. "erase");
  988. if (st)
  989. rcode = 1;
  990. else if (flash_verbose)
  991. putc ('.');
  992. }
  993. }
  994. if (flash_verbose)
  995. puts (" done\n");
  996. return rcode;
  997. }
  998. #ifdef CONFIG_SYS_FLASH_EMPTY_INFO
  999. static int sector_erased(flash_info_t *info, int i)
  1000. {
  1001. int k;
  1002. int size;
  1003. volatile unsigned long *flash;
  1004. /*
  1005. * Check if whole sector is erased
  1006. */
  1007. size = flash_sector_size(info, i);
  1008. flash = (volatile unsigned long *) info->start[i];
  1009. /* divide by 4 for longword access */
  1010. size = size >> 2;
  1011. for (k = 0; k < size; k++) {
  1012. if (*flash++ != 0xffffffff)
  1013. return 0; /* not erased */
  1014. }
  1015. return 1; /* erased */
  1016. }
  1017. #endif /* CONFIG_SYS_FLASH_EMPTY_INFO */
  1018. void flash_print_info (flash_info_t * info)
  1019. {
  1020. int i;
  1021. if (info->flash_id != FLASH_MAN_CFI) {
  1022. puts ("missing or unknown FLASH type\n");
  1023. return;
  1024. }
  1025. printf ("%s FLASH (%d x %d)",
  1026. info->name,
  1027. (info->portwidth << 3), (info->chipwidth << 3));
  1028. if (info->size < 1024*1024)
  1029. printf (" Size: %ld kB in %d Sectors\n",
  1030. info->size >> 10, info->sector_count);
  1031. else
  1032. printf (" Size: %ld MB in %d Sectors\n",
  1033. info->size >> 20, info->sector_count);
  1034. printf (" ");
  1035. switch (info->vendor) {
  1036. case CFI_CMDSET_INTEL_PROG_REGIONS:
  1037. printf ("Intel Prog Regions");
  1038. break;
  1039. case CFI_CMDSET_INTEL_STANDARD:
  1040. printf ("Intel Standard");
  1041. break;
  1042. case CFI_CMDSET_INTEL_EXTENDED:
  1043. printf ("Intel Extended");
  1044. break;
  1045. case CFI_CMDSET_AMD_STANDARD:
  1046. printf ("AMD Standard");
  1047. break;
  1048. case CFI_CMDSET_AMD_EXTENDED:
  1049. printf ("AMD Extended");
  1050. break;
  1051. #ifdef CONFIG_FLASH_CFI_LEGACY
  1052. case CFI_CMDSET_AMD_LEGACY:
  1053. printf ("AMD Legacy");
  1054. break;
  1055. #endif
  1056. default:
  1057. printf ("Unknown (%d)", info->vendor);
  1058. break;
  1059. }
  1060. printf (" command set, Manufacturer ID: 0x%02X, Device ID: 0x",
  1061. info->manufacturer_id);
  1062. printf (info->chipwidth == FLASH_CFI_16BIT ? "%04X" : "%02X",
  1063. info->device_id);
  1064. if (info->device_id == 0x7E) {
  1065. printf("%04X", info->device_id2);
  1066. }
  1067. printf ("\n Erase timeout: %ld ms, write timeout: %ld ms\n",
  1068. info->erase_blk_tout,
  1069. info->write_tout);
  1070. if (info->buffer_size > 1) {
  1071. printf (" Buffer write timeout: %ld ms, "
  1072. "buffer size: %d bytes\n",
  1073. info->buffer_write_tout,
  1074. info->buffer_size);
  1075. }
  1076. puts ("\n Sector Start Addresses:");
  1077. for (i = 0; i < info->sector_count; ++i) {
  1078. if (ctrlc())
  1079. break;
  1080. if ((i % 5) == 0)
  1081. putc('\n');
  1082. #ifdef CONFIG_SYS_FLASH_EMPTY_INFO
  1083. /* print empty and read-only info */
  1084. printf (" %08lX %c %s ",
  1085. info->start[i],
  1086. sector_erased(info, i) ? 'E' : ' ',
  1087. info->protect[i] ? "RO" : " ");
  1088. #else /* ! CONFIG_SYS_FLASH_EMPTY_INFO */
  1089. printf (" %08lX %s ",
  1090. info->start[i],
  1091. info->protect[i] ? "RO" : " ");
  1092. #endif
  1093. }
  1094. putc ('\n');
  1095. return;
  1096. }
  1097. /*-----------------------------------------------------------------------
  1098. * This is used in a few places in write_buf() to show programming
  1099. * progress. Making it a function is nasty because it needs to do side
  1100. * effect updates to digit and dots. Repeated code is nasty too, so
  1101. * we define it once here.
  1102. */
  1103. #ifdef CONFIG_FLASH_SHOW_PROGRESS
  1104. #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub) \
  1105. if (flash_verbose) { \
  1106. dots -= dots_sub; \
  1107. if ((scale > 0) && (dots <= 0)) { \
  1108. if ((digit % 5) == 0) \
  1109. printf ("%d", digit / 5); \
  1110. else \
  1111. putc ('.'); \
  1112. digit--; \
  1113. dots += scale; \
  1114. } \
  1115. }
  1116. #else
  1117. #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub)
  1118. #endif
  1119. /*-----------------------------------------------------------------------
  1120. * Copy memory to flash, returns:
  1121. * 0 - OK
  1122. * 1 - write timeout
  1123. * 2 - Flash not erased
  1124. */
  1125. int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
  1126. {
  1127. ulong wp;
  1128. uchar *p;
  1129. int aln;
  1130. cfiword_t cword;
  1131. int i, rc;
  1132. #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
  1133. int buffered_size;
  1134. #endif
  1135. #ifdef CONFIG_FLASH_SHOW_PROGRESS
  1136. int digit = CONFIG_FLASH_SHOW_PROGRESS;
  1137. int scale = 0;
  1138. int dots = 0;
  1139. /*
  1140. * Suppress if there are fewer than CONFIG_FLASH_SHOW_PROGRESS writes.
  1141. */
  1142. if (cnt >= CONFIG_FLASH_SHOW_PROGRESS) {
  1143. scale = (int)((cnt + CONFIG_FLASH_SHOW_PROGRESS - 1) /
  1144. CONFIG_FLASH_SHOW_PROGRESS);
  1145. }
  1146. #endif
  1147. /* get lower aligned address */
  1148. wp = (addr & ~(info->portwidth - 1));
  1149. /* handle unaligned start */
  1150. if ((aln = addr - wp) != 0) {
  1151. cword.l = 0;
  1152. p = (uchar *)wp;
  1153. for (i = 0; i < aln; ++i)
  1154. flash_add_byte (info, &cword, flash_read8(p + i));
  1155. for (; (i < info->portwidth) && (cnt > 0); i++) {
  1156. flash_add_byte (info, &cword, *src++);
  1157. cnt--;
  1158. }
  1159. for (; (cnt == 0) && (i < info->portwidth); ++i)
  1160. flash_add_byte (info, &cword, flash_read8(p + i));
  1161. rc = flash_write_cfiword (info, wp, cword);
  1162. if (rc != 0)
  1163. return rc;
  1164. wp += i;
  1165. FLASH_SHOW_PROGRESS(scale, dots, digit, i);
  1166. }
  1167. /* handle the aligned part */
  1168. #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
  1169. buffered_size = (info->portwidth / info->chipwidth);
  1170. buffered_size *= info->buffer_size;
  1171. while (cnt >= info->portwidth) {
  1172. /* prohibit buffer write when buffer_size is 1 */
  1173. if (info->buffer_size == 1) {
  1174. cword.l = 0;
  1175. for (i = 0; i < info->portwidth; i++)
  1176. flash_add_byte (info, &cword, *src++);
  1177. if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
  1178. return rc;
  1179. wp += info->portwidth;
  1180. cnt -= info->portwidth;
  1181. continue;
  1182. }
  1183. /* write buffer until next buffered_size aligned boundary */
  1184. i = buffered_size - (wp % buffered_size);
  1185. if (i > cnt)
  1186. i = cnt;
  1187. if ((rc = flash_write_cfibuffer (info, wp, src, i)) != ERR_OK)
  1188. return rc;
  1189. i -= i & (info->portwidth - 1);
  1190. wp += i;
  1191. src += i;
  1192. cnt -= i;
  1193. FLASH_SHOW_PROGRESS(scale, dots, digit, i);
  1194. }
  1195. #else
  1196. while (cnt >= info->portwidth) {
  1197. cword.l = 0;
  1198. for (i = 0; i < info->portwidth; i++) {
  1199. flash_add_byte (info, &cword, *src++);
  1200. }
  1201. if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
  1202. return rc;
  1203. wp += info->portwidth;
  1204. cnt -= info->portwidth;
  1205. FLASH_SHOW_PROGRESS(scale, dots, digit, info->portwidth);
  1206. }
  1207. #endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
  1208. if (cnt == 0) {
  1209. return (0);
  1210. }
  1211. /*
  1212. * handle unaligned tail bytes
  1213. */
  1214. cword.l = 0;
  1215. p = (uchar *)wp;
  1216. for (i = 0; (i < info->portwidth) && (cnt > 0); ++i) {
  1217. flash_add_byte (info, &cword, *src++);
  1218. --cnt;
  1219. }
  1220. for (; i < info->portwidth; ++i)
  1221. flash_add_byte (info, &cword, flash_read8(p + i));
  1222. return flash_write_cfiword (info, wp, cword);
  1223. }
  1224. /*-----------------------------------------------------------------------
  1225. */
  1226. #ifdef CONFIG_SYS_FLASH_PROTECTION
  1227. int flash_real_protect (flash_info_t * info, long sector, int prot)
  1228. {
  1229. int retcode = 0;
  1230. switch (info->vendor) {
  1231. case CFI_CMDSET_INTEL_PROG_REGIONS:
  1232. case CFI_CMDSET_INTEL_STANDARD:
  1233. case CFI_CMDSET_INTEL_EXTENDED:
  1234. /*
  1235. * see errata called
  1236. * "Numonyx Axcell P33/P30 Specification Update" :)
  1237. */
  1238. flash_write_cmd (info, sector, 0, FLASH_CMD_READ_ID);
  1239. if (!flash_isequal (info, sector, FLASH_OFFSET_PROTECT,
  1240. prot)) {
  1241. /*
  1242. * cmd must come before FLASH_CMD_PROTECT + 20us
  1243. * Disable interrupts which might cause a timeout here.
  1244. */
  1245. int flag = disable_interrupts ();
  1246. unsigned short cmd;
  1247. if (prot)
  1248. cmd = FLASH_CMD_PROTECT_SET;
  1249. else
  1250. cmd = FLASH_CMD_PROTECT_CLEAR;
  1251. flash_write_cmd (info, sector, 0,
  1252. FLASH_CMD_PROTECT);
  1253. flash_write_cmd (info, sector, 0, cmd);
  1254. /* re-enable interrupts if necessary */
  1255. if (flag)
  1256. enable_interrupts ();
  1257. }
  1258. break;
  1259. case CFI_CMDSET_AMD_EXTENDED:
  1260. case CFI_CMDSET_AMD_STANDARD:
  1261. /* U-Boot only checks the first byte */
  1262. if (info->manufacturer_id == (uchar)ATM_MANUFACT) {
  1263. if (prot) {
  1264. flash_unlock_seq (info, 0);
  1265. flash_write_cmd (info, 0,
  1266. info->addr_unlock1,
  1267. ATM_CMD_SOFTLOCK_START);
  1268. flash_unlock_seq (info, 0);
  1269. flash_write_cmd (info, sector, 0,
  1270. ATM_CMD_LOCK_SECT);
  1271. } else {
  1272. flash_write_cmd (info, 0,
  1273. info->addr_unlock1,
  1274. AMD_CMD_UNLOCK_START);
  1275. if (info->device_id == ATM_ID_BV6416)
  1276. flash_write_cmd (info, sector,
  1277. 0, ATM_CMD_UNLOCK_SECT);
  1278. }
  1279. }
  1280. break;
  1281. #ifdef CONFIG_FLASH_CFI_LEGACY
  1282. case CFI_CMDSET_AMD_LEGACY:
  1283. flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
  1284. flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT);
  1285. if (prot)
  1286. flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_SET);
  1287. else
  1288. flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_CLEAR);
  1289. #endif
  1290. };
  1291. if ((retcode =
  1292. flash_full_status_check (info, sector, info->erase_blk_tout,
  1293. prot ? "protect" : "unprotect")) == 0) {
  1294. info->protect[sector] = prot;
  1295. /*
  1296. * On some of Intel's flash chips (marked via legacy_unlock)
  1297. * unprotect unprotects all locking.
  1298. */
  1299. if ((prot == 0) && (info->legacy_unlock)) {
  1300. flash_sect_t i;
  1301. for (i = 0; i < info->sector_count; i++) {
  1302. if (info->protect[i])
  1303. flash_real_protect (info, i, 1);
  1304. }
  1305. }
  1306. }
  1307. return retcode;
  1308. }
  1309. /*-----------------------------------------------------------------------
  1310. * flash_read_user_serial - read the OneTimeProgramming cells
  1311. */
  1312. void flash_read_user_serial (flash_info_t * info, void *buffer, int offset,
  1313. int len)
  1314. {
  1315. uchar *src;
  1316. uchar *dst;
  1317. dst = buffer;
  1318. src = flash_map (info, 0, FLASH_OFFSET_USER_PROTECTION);
  1319. flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
  1320. memcpy (dst, src + offset, len);
  1321. flash_write_cmd (info, 0, 0, info->cmd_reset);
  1322. flash_unmap(info, 0, FLASH_OFFSET_USER_PROTECTION, src);
  1323. }
  1324. /*
  1325. * flash_read_factory_serial - read the device Id from the protection area
  1326. */
  1327. void flash_read_factory_serial (flash_info_t * info, void *buffer, int offset,
  1328. int len)
  1329. {
  1330. uchar *src;
  1331. src = flash_map (info, 0, FLASH_OFFSET_INTEL_PROTECTION);
  1332. flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
  1333. memcpy (buffer, src + offset, len);
  1334. flash_write_cmd (info, 0, 0, info->cmd_reset);
  1335. flash_unmap(info, 0, FLASH_OFFSET_INTEL_PROTECTION, src);
  1336. }
  1337. #endif /* CONFIG_SYS_FLASH_PROTECTION */
  1338. /*-----------------------------------------------------------------------
  1339. * Reverse the order of the erase regions in the CFI QRY structure.
  1340. * This is needed for chips that are either a) correctly detected as
  1341. * top-boot, or b) buggy.
  1342. */
  1343. static void cfi_reverse_geometry(struct cfi_qry *qry)
  1344. {
  1345. unsigned int i, j;
  1346. u32 tmp;
  1347. for (i = 0, j = qry->num_erase_regions - 1; i < j; i++, j--) {
  1348. tmp = qry->erase_region_info[i];
  1349. qry->erase_region_info[i] = qry->erase_region_info[j];
  1350. qry->erase_region_info[j] = tmp;
  1351. }
  1352. }
  1353. /*-----------------------------------------------------------------------
  1354. * read jedec ids from device and set corresponding fields in info struct
  1355. *
  1356. * Note: assume cfi->vendor, cfi->portwidth and cfi->chipwidth are correct
  1357. *
  1358. */
  1359. static void cmdset_intel_read_jedec_ids(flash_info_t *info)
  1360. {
  1361. flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
  1362. flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
  1363. udelay(1000); /* some flash are slow to respond */
  1364. info->manufacturer_id = flash_read_uchar (info,
  1365. FLASH_OFFSET_MANUFACTURER_ID);
  1366. info->device_id = (info->chipwidth == FLASH_CFI_16BIT) ?
  1367. flash_read_word (info, FLASH_OFFSET_DEVICE_ID) :
  1368. flash_read_uchar (info, FLASH_OFFSET_DEVICE_ID);
  1369. flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
  1370. }
  1371. static int cmdset_intel_init(flash_info_t *info, struct cfi_qry *qry)
  1372. {
  1373. info->cmd_reset = FLASH_CMD_RESET;
  1374. cmdset_intel_read_jedec_ids(info);
  1375. flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
  1376. #ifdef CONFIG_SYS_FLASH_PROTECTION
  1377. /* read legacy lock/unlock bit from intel flash */
  1378. if (info->ext_addr) {
  1379. info->legacy_unlock = flash_read_uchar (info,
  1380. info->ext_addr + 5) & 0x08;
  1381. }
  1382. #endif
  1383. return 0;
  1384. }
  1385. static void cmdset_amd_read_jedec_ids(flash_info_t *info)
  1386. {
  1387. ushort bankId = 0;
  1388. uchar manuId;
  1389. flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
  1390. flash_unlock_seq(info, 0);
  1391. flash_write_cmd(info, 0, info->addr_unlock1, FLASH_CMD_READ_ID);
  1392. udelay(1000); /* some flash are slow to respond */
  1393. manuId = flash_read_uchar (info, FLASH_OFFSET_MANUFACTURER_ID);
  1394. /* JEDEC JEP106Z specifies ID codes up to bank 7 */
  1395. while (manuId == FLASH_CONTINUATION_CODE && bankId < 0x800) {
  1396. bankId += 0x100;
  1397. manuId = flash_read_uchar (info,
  1398. bankId | FLASH_OFFSET_MANUFACTURER_ID);
  1399. }
  1400. info->manufacturer_id = manuId;
  1401. switch (info->chipwidth){
  1402. case FLASH_CFI_8BIT:
  1403. info->device_id = flash_read_uchar (info,
  1404. FLASH_OFFSET_DEVICE_ID);
  1405. if (info->device_id == 0x7E) {
  1406. /* AMD 3-byte (expanded) device ids */
  1407. info->device_id2 = flash_read_uchar (info,
  1408. FLASH_OFFSET_DEVICE_ID2);
  1409. info->device_id2 <<= 8;
  1410. info->device_id2 |= flash_read_uchar (info,
  1411. FLASH_OFFSET_DEVICE_ID3);
  1412. }
  1413. break;
  1414. case FLASH_CFI_16BIT:
  1415. info->device_id = flash_read_word (info,
  1416. FLASH_OFFSET_DEVICE_ID);
  1417. break;
  1418. default:
  1419. break;
  1420. }
  1421. flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
  1422. }
  1423. static int cmdset_amd_init(flash_info_t *info, struct cfi_qry *qry)
  1424. {
  1425. info->cmd_reset = AMD_CMD_RESET;
  1426. cmdset_amd_read_jedec_ids(info);
  1427. flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
  1428. return 0;
  1429. }
  1430. #ifdef CONFIG_FLASH_CFI_LEGACY
  1431. static void flash_read_jedec_ids (flash_info_t * info)
  1432. {
  1433. info->manufacturer_id = 0;
  1434. info->device_id = 0;
  1435. info->device_id2 = 0;
  1436. switch (info->vendor) {
  1437. case CFI_CMDSET_INTEL_PROG_REGIONS:
  1438. case CFI_CMDSET_INTEL_STANDARD:
  1439. case CFI_CMDSET_INTEL_EXTENDED:
  1440. cmdset_intel_read_jedec_ids(info);
  1441. break;
  1442. case CFI_CMDSET_AMD_STANDARD:
  1443. case CFI_CMDSET_AMD_EXTENDED:
  1444. cmdset_amd_read_jedec_ids(info);
  1445. break;
  1446. default:
  1447. break;
  1448. }
  1449. }
  1450. /*-----------------------------------------------------------------------
  1451. * Call board code to request info about non-CFI flash.
  1452. * board_flash_get_legacy needs to fill in at least:
  1453. * info->portwidth, info->chipwidth and info->interface for Jedec probing.
  1454. */
  1455. static int flash_detect_legacy(phys_addr_t base, int banknum)
  1456. {
  1457. flash_info_t *info = &flash_info[banknum];
  1458. if (board_flash_get_legacy(base, banknum, info)) {
  1459. /* board code may have filled info completely. If not, we
  1460. use JEDEC ID probing. */
  1461. if (!info->vendor) {
  1462. int modes[] = {
  1463. CFI_CMDSET_AMD_STANDARD,
  1464. CFI_CMDSET_INTEL_STANDARD
  1465. };
  1466. int i;
  1467. for (i = 0; i < sizeof(modes) / sizeof(modes[0]); i++) {
  1468. info->vendor = modes[i];
  1469. info->start[0] =
  1470. (ulong)map_physmem(base,
  1471. info->portwidth,
  1472. MAP_NOCACHE);
  1473. if (info->portwidth == FLASH_CFI_8BIT
  1474. && info->interface == FLASH_CFI_X8X16) {
  1475. info->addr_unlock1 = 0x2AAA;
  1476. info->addr_unlock2 = 0x5555;
  1477. } else {
  1478. info->addr_unlock1 = 0x5555;
  1479. info->addr_unlock2 = 0x2AAA;
  1480. }
  1481. flash_read_jedec_ids(info);
  1482. debug("JEDEC PROBE: ID %x %x %x\n",
  1483. info->manufacturer_id,
  1484. info->device_id,
  1485. info->device_id2);
  1486. if (jedec_flash_match(info, info->start[0]))
  1487. break;
  1488. else
  1489. unmap_physmem((void *)info->start[0],
  1490. MAP_NOCACHE);
  1491. }
  1492. }
  1493. switch(info->vendor) {
  1494. case CFI_CMDSET_INTEL_PROG_REGIONS:
  1495. case CFI_CMDSET_INTEL_STANDARD:
  1496. case CFI_CMDSET_INTEL_EXTENDED:
  1497. info->cmd_reset = FLASH_CMD_RESET;
  1498. break;
  1499. case CFI_CMDSET_AMD_STANDARD:
  1500. case CFI_CMDSET_AMD_EXTENDED:
  1501. case CFI_CMDSET_AMD_LEGACY:
  1502. info->cmd_reset = AMD_CMD_RESET;
  1503. break;
  1504. }
  1505. info->flash_id = FLASH_MAN_CFI;
  1506. return 1;
  1507. }
  1508. return 0; /* use CFI */
  1509. }
  1510. #else
  1511. static inline int flash_detect_legacy(phys_addr_t base, int banknum)
  1512. {
  1513. return 0; /* use CFI */
  1514. }
  1515. #endif
  1516. /*-----------------------------------------------------------------------
  1517. * detect if flash is compatible with the Common Flash Interface (CFI)
  1518. * http://www.jedec.org/download/search/jesd68.pdf
  1519. */
  1520. static void flash_read_cfi (flash_info_t *info, void *buf,
  1521. unsigned int start, size_t len)
  1522. {
  1523. u8 *p = buf;
  1524. unsigned int i;
  1525. for (i = 0; i < len; i++)
  1526. p[i] = flash_read_uchar(info, start + i);
  1527. }
  1528. void __flash_cmd_reset(flash_info_t *info)
  1529. {
  1530. /*
  1531. * We do not yet know what kind of commandset to use, so we issue
  1532. * the reset command in both Intel and AMD variants, in the hope
  1533. * that AMD flash roms ignore the Intel command.
  1534. */
  1535. flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
  1536. flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
  1537. }
  1538. void flash_cmd_reset(flash_info_t *info)
  1539. __attribute__((weak,alias("__flash_cmd_reset")));
  1540. static int __flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry)
  1541. {
  1542. int cfi_offset;
  1543. /* Issue FLASH reset command */
  1544. flash_cmd_reset(info);
  1545. for (cfi_offset=0;
  1546. cfi_offset < sizeof(flash_offset_cfi) / sizeof(uint);
  1547. cfi_offset++) {
  1548. flash_write_cmd (info, 0, flash_offset_cfi[cfi_offset],
  1549. FLASH_CMD_CFI);
  1550. if (flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP, 'Q')
  1551. && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R')
  1552. && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) {
  1553. flash_read_cfi(info, qry, FLASH_OFFSET_CFI_RESP,
  1554. sizeof(struct cfi_qry));
  1555. info->interface = le16_to_cpu(qry->interface_desc);
  1556. info->cfi_offset = flash_offset_cfi[cfi_offset];
  1557. debug ("device interface is %d\n",
  1558. info->interface);
  1559. debug ("found port %d chip %d ",
  1560. info->portwidth, info->chipwidth);
  1561. debug ("port %d bits chip %d bits\n",
  1562. info->portwidth << CFI_FLASH_SHIFT_WIDTH,
  1563. info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
  1564. /* calculate command offsets as in the Linux driver */
  1565. info->addr_unlock1 = 0x555;
  1566. info->addr_unlock2 = 0x2aa;
  1567. /*
  1568. * modify the unlock address if we are
  1569. * in compatibility mode
  1570. */
  1571. if ( /* x8/x16 in x8 mode */
  1572. ((info->chipwidth == FLASH_CFI_BY8) &&
  1573. (info->interface == FLASH_CFI_X8X16)) ||
  1574. /* x16/x32 in x16 mode */
  1575. ((info->chipwidth == FLASH_CFI_BY16) &&
  1576. (info->interface == FLASH_CFI_X16X32)))
  1577. {
  1578. info->addr_unlock1 = 0xaaa;
  1579. info->addr_unlock2 = 0x555;
  1580. }
  1581. info->name = "CFI conformant";
  1582. return 1;
  1583. }
  1584. }
  1585. return 0;
  1586. }
  1587. static int flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry)
  1588. {
  1589. debug ("flash detect cfi\n");
  1590. for (info->portwidth = CONFIG_SYS_FLASH_CFI_WIDTH;
  1591. info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) {
  1592. for (info->chipwidth = FLASH_CFI_BY8;
  1593. info->chipwidth <= info->portwidth;
  1594. info->chipwidth <<= 1)
  1595. if (__flash_detect_cfi(info, qry))
  1596. return 1;
  1597. }
  1598. debug ("not found\n");
  1599. return 0;
  1600. }
  1601. /*
  1602. * Manufacturer-specific quirks. Add workarounds for geometry
  1603. * reversal, etc. here.
  1604. */
  1605. static void flash_fixup_amd(flash_info_t *info, struct cfi_qry *qry)
  1606. {
  1607. /* check if flash geometry needs reversal */
  1608. if (qry->num_erase_regions > 1) {
  1609. /* reverse geometry if top boot part */
  1610. if (info->cfi_version < 0x3131) {
  1611. /* CFI < 1.1, try to guess from device id */
  1612. if ((info->device_id & 0x80) != 0)
  1613. cfi_reverse_geometry(qry);
  1614. } else if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) {
  1615. /* CFI >= 1.1, deduct from top/bottom flag */
  1616. /* note: ext_addr is valid since cfi_version > 0 */
  1617. cfi_reverse_geometry(qry);
  1618. }
  1619. }
  1620. }
  1621. static void flash_fixup_atmel(flash_info_t *info, struct cfi_qry *qry)
  1622. {
  1623. int reverse_geometry = 0;
  1624. /* Check the "top boot" bit in the PRI */
  1625. if (info->ext_addr && !(flash_read_uchar(info, info->ext_addr + 6) & 1))
  1626. reverse_geometry = 1;
  1627. /* AT49BV6416(T) list the erase regions in the wrong order.
  1628. * However, the device ID is identical with the non-broken
  1629. * AT49BV642D they differ in the high byte.
  1630. */
  1631. if (info->device_id == 0xd6 || info->device_id == 0xd2)
  1632. reverse_geometry = !reverse_geometry;
  1633. if (reverse_geometry)
  1634. cfi_reverse_geometry(qry);
  1635. }
  1636. static void flash_fixup_stm(flash_info_t *info, struct cfi_qry *qry)
  1637. {
  1638. /* check if flash geometry needs reversal */
  1639. if (qry->num_erase_regions > 1) {
  1640. /* reverse geometry if top boot part */
  1641. if (info->cfi_version < 0x3131) {
  1642. /* CFI < 1.1, guess by device id (M29W320{DT,ET} only) */
  1643. if (info->device_id == 0x22CA ||
  1644. info->device_id == 0x2256) {
  1645. cfi_reverse_geometry(qry);
  1646. }
  1647. }
  1648. }
  1649. }
  1650. /*
  1651. * The following code cannot be run from FLASH!
  1652. *
  1653. */
  1654. ulong flash_get_size (phys_addr_t base, int banknum)
  1655. {
  1656. flash_info_t *info = &flash_info[banknum];
  1657. int i, j;
  1658. flash_sect_t sect_cnt;
  1659. phys_addr_t sector;
  1660. unsigned long tmp;
  1661. int size_ratio;
  1662. uchar num_erase_regions;
  1663. int erase_region_size;
  1664. int erase_region_count;
  1665. struct cfi_qry qry;
  1666. memset(&qry, 0, sizeof(qry));
  1667. info->ext_addr = 0;
  1668. info->cfi_version = 0;
  1669. #ifdef CONFIG_SYS_FLASH_PROTECTION
  1670. info->legacy_unlock = 0;
  1671. #endif
  1672. info->start[0] = (ulong)map_physmem(base, info->portwidth, MAP_NOCACHE);
  1673. if (flash_detect_cfi (info, &qry)) {
  1674. info->vendor = le16_to_cpu(qry.p_id);
  1675. info->ext_addr = le16_to_cpu(qry.p_adr);
  1676. num_erase_regions = qry.num_erase_regions;
  1677. if (info->ext_addr) {
  1678. info->cfi_version = (ushort) flash_read_uchar (info,
  1679. info->ext_addr + 3) << 8;
  1680. info->cfi_version |= (ushort) flash_read_uchar (info,
  1681. info->ext_addr + 4);
  1682. }
  1683. #ifdef DEBUG
  1684. flash_printqry (&qry);
  1685. #endif
  1686. switch (info->vendor) {
  1687. case CFI_CMDSET_INTEL_PROG_REGIONS:
  1688. case CFI_CMDSET_INTEL_STANDARD:
  1689. case CFI_CMDSET_INTEL_EXTENDED:
  1690. cmdset_intel_init(info, &qry);
  1691. break;
  1692. case CFI_CMDSET_AMD_STANDARD:
  1693. case CFI_CMDSET_AMD_EXTENDED:
  1694. cmdset_amd_init(info, &qry);
  1695. break;
  1696. default:
  1697. printf("CFI: Unknown command set 0x%x\n",
  1698. info->vendor);
  1699. /*
  1700. * Unfortunately, this means we don't know how
  1701. * to get the chip back to Read mode. Might
  1702. * as well try an Intel-style reset...
  1703. */
  1704. flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
  1705. return 0;
  1706. }
  1707. /* Do manufacturer-specific fixups */
  1708. switch (info->manufacturer_id) {
  1709. case 0x0001:
  1710. flash_fixup_amd(info, &qry);
  1711. break;
  1712. case 0x001f:
  1713. flash_fixup_atmel(info, &qry);
  1714. break;
  1715. case 0x0020:
  1716. flash_fixup_stm(info, &qry);
  1717. break;
  1718. }
  1719. debug ("manufacturer is %d\n", info->vendor);
  1720. debug ("manufacturer id is 0x%x\n", info->manufacturer_id);
  1721. debug ("device id is 0x%x\n", info->device_id);
  1722. debug ("device id2 is 0x%x\n", info->device_id2);
  1723. debug ("cfi version is 0x%04x\n", info->cfi_version);
  1724. size_ratio = info->portwidth / info->chipwidth;
  1725. /* if the chip is x8/x16 reduce the ratio by half */
  1726. if ((info->interface == FLASH_CFI_X8X16)
  1727. && (info->chipwidth == FLASH_CFI_BY8)) {
  1728. size_ratio >>= 1;
  1729. }
  1730. debug ("size_ratio %d port %d bits chip %d bits\n",
  1731. size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH,
  1732. info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
  1733. debug ("found %d erase regions\n", num_erase_regions);
  1734. sect_cnt = 0;
  1735. sector = base;
  1736. for (i = 0; i < num_erase_regions; i++) {
  1737. if (i > NUM_ERASE_REGIONS) {
  1738. printf ("%d erase regions found, only %d used\n",
  1739. num_erase_regions, NUM_ERASE_REGIONS);
  1740. break;
  1741. }
  1742. tmp = le32_to_cpu(qry.erase_region_info[i]);
  1743. debug("erase region %u: 0x%08lx\n", i, tmp);
  1744. erase_region_count = (tmp & 0xffff) + 1;
  1745. tmp >>= 16;
  1746. erase_region_size =
  1747. (tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128;
  1748. debug ("erase_region_count = %d erase_region_size = %d\n",
  1749. erase_region_count, erase_region_size);
  1750. for (j = 0; j < erase_region_count; j++) {
  1751. if (sect_cnt >= CONFIG_SYS_MAX_FLASH_SECT) {
  1752. printf("ERROR: too many flash sectors\n");
  1753. break;
  1754. }
  1755. info->start[sect_cnt] =
  1756. (ulong)map_physmem(sector,
  1757. info->portwidth,
  1758. MAP_NOCACHE);
  1759. sector += (erase_region_size * size_ratio);
  1760. /*
  1761. * Only read protection status from
  1762. * supported devices (intel...)
  1763. */
  1764. switch (info->vendor) {
  1765. case CFI_CMDSET_INTEL_PROG_REGIONS:
  1766. case CFI_CMDSET_INTEL_EXTENDED:
  1767. case CFI_CMDSET_INTEL_STANDARD:
  1768. info->protect[sect_cnt] =
  1769. flash_isset (info, sect_cnt,
  1770. FLASH_OFFSET_PROTECT,
  1771. FLASH_STATUS_PROTECT);
  1772. break;
  1773. default:
  1774. /* default: not protected */
  1775. info->protect[sect_cnt] = 0;
  1776. }
  1777. sect_cnt++;
  1778. }
  1779. }
  1780. info->sector_count = sect_cnt;
  1781. info->size = 1 << qry.dev_size;
  1782. /* multiply the size by the number of chips */
  1783. info->size *= size_ratio;
  1784. info->buffer_size = 1 << le16_to_cpu(qry.max_buf_write_size);
  1785. tmp = 1 << qry.block_erase_timeout_typ;
  1786. info->erase_blk_tout = tmp *
  1787. (1 << qry.block_erase_timeout_max);
  1788. tmp = (1 << qry.buf_write_timeout_typ) *
  1789. (1 << qry.buf_write_timeout_max);
  1790. /* round up when converting to ms */
  1791. info->buffer_write_tout = (tmp + 999) / 1000;
  1792. tmp = (1 << qry.word_write_timeout_typ) *
  1793. (1 << qry.word_write_timeout_max);
  1794. /* round up when converting to ms */
  1795. info->write_tout = (tmp + 999) / 1000;
  1796. info->flash_id = FLASH_MAN_CFI;
  1797. if ((info->interface == FLASH_CFI_X8X16) &&
  1798. (info->chipwidth == FLASH_CFI_BY8)) {
  1799. /* XXX - Need to test on x8/x16 in parallel. */
  1800. info->portwidth >>= 1;
  1801. }
  1802. flash_write_cmd (info, 0, 0, info->cmd_reset);
  1803. }
  1804. return (info->size);
  1805. }
  1806. void flash_set_verbose(uint v)
  1807. {
  1808. flash_verbose = v;
  1809. }
  1810. /*-----------------------------------------------------------------------
  1811. */
  1812. unsigned long flash_init (void)
  1813. {
  1814. unsigned long size = 0;
  1815. int i;
  1816. #if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST)
  1817. struct apl_s {
  1818. ulong start;
  1819. ulong size;
  1820. } apl[] = CONFIG_SYS_FLASH_AUTOPROTECT_LIST;
  1821. #endif
  1822. #ifdef CONFIG_SYS_FLASH_PROTECTION
  1823. /* read environment from EEPROM */
  1824. char s[64];
  1825. getenv_f("unlock", s, sizeof(s));
  1826. #endif
  1827. /* Init: no FLASHes known */
  1828. for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
  1829. flash_info[i].flash_id = FLASH_UNKNOWN;
  1830. if (!flash_detect_legacy(cfi_flash_bank_addr(i), i))
  1831. flash_get_size(cfi_flash_bank_addr(i), i);
  1832. size += flash_info[i].size;
  1833. if (flash_info[i].flash_id == FLASH_UNKNOWN) {
  1834. #ifndef CONFIG_SYS_FLASH_QUIET_TEST
  1835. printf ("## Unknown FLASH on Bank %d "
  1836. "- Size = 0x%08lx = %ld MB\n",
  1837. i+1, flash_info[i].size,
  1838. flash_info[i].size << 20);
  1839. #endif /* CONFIG_SYS_FLASH_QUIET_TEST */
  1840. }
  1841. #ifdef CONFIG_SYS_FLASH_PROTECTION
  1842. else if ((s != NULL) && (strcmp(s, "yes") == 0)) {
  1843. /*
  1844. * Only the U-Boot image and it's environment
  1845. * is protected, all other sectors are
  1846. * unprotected (unlocked) if flash hardware
  1847. * protection is used (CONFIG_SYS_FLASH_PROTECTION)
  1848. * and the environment variable "unlock" is
  1849. * set to "yes".
  1850. */
  1851. if (flash_info[i].legacy_unlock) {
  1852. int k;
  1853. /*
  1854. * Disable legacy_unlock temporarily,
  1855. * since flash_real_protect would
  1856. * relock all other sectors again
  1857. * otherwise.
  1858. */
  1859. flash_info[i].legacy_unlock = 0;
  1860. /*
  1861. * Legacy unlocking (e.g. Intel J3) ->
  1862. * unlock only one sector. This will
  1863. * unlock all sectors.
  1864. */
  1865. flash_real_protect (&flash_info[i], 0, 0);
  1866. flash_info[i].legacy_unlock = 1;
  1867. /*
  1868. * Manually mark other sectors as
  1869. * unlocked (unprotected)
  1870. */
  1871. for (k = 1; k < flash_info[i].sector_count; k++)
  1872. flash_info[i].protect[k] = 0;
  1873. } else {
  1874. /*
  1875. * No legancy unlocking -> unlock all sectors
  1876. */
  1877. flash_protect (FLAG_PROTECT_CLEAR,
  1878. flash_info[i].start[0],
  1879. flash_info[i].start[0]
  1880. + flash_info[i].size - 1,
  1881. &flash_info[i]);
  1882. }
  1883. }
  1884. #endif /* CONFIG_SYS_FLASH_PROTECTION */
  1885. }
  1886. /* Monitor protection ON by default */
  1887. #if (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE) && \
  1888. (!defined(CONFIG_MONITOR_IS_IN_RAM))
  1889. flash_protect (FLAG_PROTECT_SET,
  1890. CONFIG_SYS_MONITOR_BASE,
  1891. CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1,
  1892. flash_get_info(CONFIG_SYS_MONITOR_BASE));
  1893. #endif
  1894. /* Environment protection ON by default */
  1895. #ifdef CONFIG_ENV_IS_IN_FLASH
  1896. flash_protect (FLAG_PROTECT_SET,
  1897. CONFIG_ENV_ADDR,
  1898. CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1,
  1899. flash_get_info(CONFIG_ENV_ADDR));
  1900. #endif
  1901. /* Redundant environment protection ON by default */
  1902. #ifdef CONFIG_ENV_ADDR_REDUND
  1903. flash_protect (FLAG_PROTECT_SET,
  1904. CONFIG_ENV_ADDR_REDUND,
  1905. CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1,
  1906. flash_get_info(CONFIG_ENV_ADDR_REDUND));
  1907. #endif
  1908. #if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST)
  1909. for (i = 0; i < (sizeof(apl) / sizeof(struct apl_s)); i++) {
  1910. debug("autoprotecting from %08x to %08x\n",
  1911. apl[i].start, apl[i].start + apl[i].size - 1);
  1912. flash_protect (FLAG_PROTECT_SET,
  1913. apl[i].start,
  1914. apl[i].start + apl[i].size - 1,
  1915. flash_get_info(apl[i].start));
  1916. }
  1917. #endif
  1918. #ifdef CONFIG_FLASH_CFI_MTD
  1919. cfi_mtd_init();
  1920. #endif
  1921. return (size);
  1922. }