flash.c 24 KB

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  1. /*
  2. * (C) Copyright 2000, 2001
  3. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. */
  23. /*
  24. * Modified 4/5/2001
  25. * Wait for completion of each sector erase command issued
  26. * 4/5/2001
  27. * Chris Hallinan - DS4.COM, Inc. - clh@net1plus.com
  28. */
  29. /*
  30. * Modified 3/7/2001
  31. * - adapted for pip405, Denis Peter, MPL AG Switzerland
  32. * TODO:
  33. * clean-up
  34. */
  35. #include <common.h>
  36. #if !defined(CONFIG_PATI)
  37. #include <asm/ppc4xx.h>
  38. #include <asm/processor.h>
  39. #include "common_util.h"
  40. #if defined(CONFIG_MIP405)
  41. #include "../mip405/mip405.h"
  42. #endif
  43. #if defined(CONFIG_PIP405)
  44. #include "../pip405/pip405.h"
  45. #endif
  46. #include <asm/4xx_pci.h>
  47. #else /* defined(CONFIG_PATI) */
  48. #include <mpc5xx.h>
  49. #endif
  50. flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */
  51. /*-----------------------------------------------------------------------
  52. * Functions
  53. */
  54. static ulong flash_get_size (vu_long *addr, flash_info_t *info);
  55. static int write_word (flash_info_t *info, ulong dest, ulong data);
  56. void unlock_intel_sectors(flash_info_t *info,ulong addr,ulong cnt);
  57. #define ADDR0 0x5555
  58. #define ADDR1 0x2aaa
  59. #define FLASH_WORD_SIZE unsigned short
  60. #define FALSE 0
  61. #define TRUE 1
  62. #if !defined(CONFIG_PATI)
  63. /*-----------------------------------------------------------------------
  64. * Some CS switching routines:
  65. *
  66. * On PIP/MIP405 we have 3 (4) possible boot mode
  67. *
  68. * - Boot from Flash (Flash CS = CS0, MPS CS = CS1)
  69. * - Boot from MPS (Flash CS = CS1, MPS CS = CS0)
  70. * - Boot from PCI with Flash map (Flash CS = CS0, MPS CS = CS1)
  71. * - Boot from PCI with MPS map (Flash CS = CS1, MPS CS = CS0)
  72. * The flash init is the first board specific routine which is called
  73. * after code relocation (running from SDRAM)
  74. * The first thing we do is to map the Flash CS to the Flash area and
  75. * the MPS CS to the MPS area. Since the flash size is unknown at this
  76. * point, we use the max flash size and the lowest flash address as base.
  77. *
  78. * After flash detection we adjust the size of the CS area accordingly.
  79. * The board_init_r will fill in wrong values in the board init structure,
  80. * but this will be fixed in the misc_init_r routine:
  81. * bd->bi_flashstart=0-flash_info[0].size
  82. * bd->bi_flashsize=flash_info[0].size-CONFIG_SYS_MONITOR_LEN
  83. * bd->bi_flashoffset=0
  84. *
  85. */
  86. int get_boot_mode(void)
  87. {
  88. unsigned long pbcr;
  89. int res = 0;
  90. pbcr = mfdcr (CPC0_PSR);
  91. if ((pbcr & PSR_ROM_WIDTH_MASK) == 0)
  92. /* boot via MPS or MPS mapping */
  93. res = BOOT_MPS;
  94. if(pbcr & PSR_ROM_LOC)
  95. /* boot via PCI.. */
  96. res |= BOOT_PCI;
  97. return res;
  98. }
  99. /* Map the flash high (in boot area)
  100. This code can only be executed from SDRAM (after relocation).
  101. */
  102. void setup_cs_reloc(void)
  103. {
  104. int mode;
  105. /* Since we are relocated, we can set-up the CS finaly
  106. * but first of all, switch off PCI mapping (in case it was a PCI boot) */
  107. out32r(PMM0MA,0L);
  108. icache_enable (); /* we are relocated */
  109. /* get boot mode */
  110. mode=get_boot_mode();
  111. /* we map the flash high in every case */
  112. /* first findout on which cs the flash is */
  113. if(mode & BOOT_MPS) {
  114. /* map flash high on CS1 and MPS on CS0 */
  115. mtdcr (EBC0_CFGADDR, PB0AP);
  116. mtdcr (EBC0_CFGDATA, MPS_AP);
  117. mtdcr (EBC0_CFGADDR, PB0CR);
  118. mtdcr (EBC0_CFGDATA, MPS_CR);
  119. /* we use the default values (max values) for the flash
  120. * because its real size is not yet known */
  121. mtdcr (EBC0_CFGADDR, PB1AP);
  122. mtdcr (EBC0_CFGDATA, FLASH_AP);
  123. mtdcr (EBC0_CFGADDR, PB1CR);
  124. mtdcr (EBC0_CFGDATA, FLASH_CR_B);
  125. }
  126. else {
  127. /* map flash high on CS0 and MPS on CS1 */
  128. mtdcr (EBC0_CFGADDR, PB1AP);
  129. mtdcr (EBC0_CFGDATA, MPS_AP);
  130. mtdcr (EBC0_CFGADDR, PB1CR);
  131. mtdcr (EBC0_CFGDATA, MPS_CR);
  132. /* we use the default values (max values) for the flash
  133. * because its real size is not yet known */
  134. mtdcr (EBC0_CFGADDR, PB0AP);
  135. mtdcr (EBC0_CFGDATA, FLASH_AP);
  136. mtdcr (EBC0_CFGADDR, PB0CR);
  137. mtdcr (EBC0_CFGDATA, FLASH_CR_B);
  138. }
  139. }
  140. #endif /* #if !defined(CONFIG_PATI) */
  141. unsigned long flash_init (void)
  142. {
  143. unsigned long size_b0;
  144. int i;
  145. #if !defined(CONFIG_PATI)
  146. unsigned long flashcr,size_reg;
  147. int mode;
  148. extern char version_string;
  149. char *p = &version_string;
  150. /* Since we are relocated, we can set-up the CS finally */
  151. setup_cs_reloc();
  152. /* get and display boot mode */
  153. mode=get_boot_mode();
  154. if(mode & BOOT_PCI)
  155. printf("(PCI Boot %s Map) ",(mode & BOOT_MPS) ?
  156. "MPS" : "Flash");
  157. else
  158. printf("(%s Boot) ",(mode & BOOT_MPS) ?
  159. "MPS" : "Flash");
  160. #endif /* #if !defined(CONFIG_PATI) */
  161. /* Init: no FLASHes known */
  162. for (i=0; i<CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
  163. flash_info[i].flash_id = FLASH_UNKNOWN;
  164. }
  165. /* Static FLASH Bank configuration here - FIXME XXX */
  166. size_b0 = flash_get_size((vu_long *)CONFIG_SYS_MONITOR_BASE, &flash_info[0]);
  167. if (flash_info[0].flash_id == FLASH_UNKNOWN) {
  168. printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
  169. size_b0, size_b0<<20);
  170. }
  171. /* protect the bootloader */
  172. /* Monitor protection ON by default */
  173. #if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE
  174. flash_protect(FLAG_PROTECT_SET,
  175. CONFIG_SYS_MONITOR_BASE,
  176. CONFIG_SYS_MONITOR_BASE+monitor_flash_len-1,
  177. &flash_info[0]);
  178. #endif
  179. #if !defined(CONFIG_PATI)
  180. /* protect reset vector */
  181. flash_info[0].protect[flash_info[0].sector_count-1] = 1;
  182. flash_info[0].size = size_b0;
  183. /* set up flash cs according to the size */
  184. size_reg=(flash_info[0].size >>20);
  185. switch (size_reg) {
  186. case 0:
  187. case 1: i=0; break; /* <= 1MB */
  188. case 2: i=1; break; /* = 2MB */
  189. case 4: i=2; break; /* = 4MB */
  190. case 8: i=3; break; /* = 8MB */
  191. case 16: i=4; break; /* = 16MB */
  192. case 32: i=5; break; /* = 32MB */
  193. case 64: i=6; break; /* = 64MB */
  194. case 128: i=7; break; /*= 128MB */
  195. default:
  196. printf("\n #### ERROR, wrong size %ld MByte reset board #####\n",size_reg);
  197. while(1);
  198. }
  199. if(mode & BOOT_MPS) {
  200. /* flash is on CS1 */
  201. mtdcr(EBC0_CFGADDR, PB1CR);
  202. flashcr = mfdcr (EBC0_CFGDATA);
  203. /* we map the flash high in every case */
  204. flashcr&=0x0001FFFF; /* mask out address bits */
  205. flashcr|= ((0-flash_info[0].size) & 0xFFF00000); /* start addr */
  206. flashcr|= (i << 17); /* size addr */
  207. mtdcr(EBC0_CFGADDR, PB1CR);
  208. mtdcr(EBC0_CFGDATA, flashcr);
  209. }
  210. else {
  211. /* flash is on CS0 */
  212. mtdcr(EBC0_CFGADDR, PB0CR);
  213. flashcr = mfdcr (EBC0_CFGDATA);
  214. /* we map the flash high in every case */
  215. flashcr&=0x0001FFFF; /* mask out address bits */
  216. flashcr|= ((0-flash_info[0].size) & 0xFFF00000); /* start addr */
  217. flashcr|= (i << 17); /* size addr */
  218. mtdcr(EBC0_CFGADDR, PB0CR);
  219. mtdcr(EBC0_CFGDATA, flashcr);
  220. }
  221. #if 0
  222. /* enable this (PIP405/MIP405 only) if you want to test if
  223. the relocation has be done ok.
  224. This will disable both Chipselects */
  225. mtdcr (EBC0_CFGADDR, PB0CR);
  226. mtdcr (EBC0_CFGDATA, 0L);
  227. mtdcr (EBC0_CFGADDR, PB1CR);
  228. mtdcr (EBC0_CFGDATA, 0L);
  229. printf("CS0 & CS1 switched off for test\n");
  230. #endif
  231. /* patch version_string */
  232. for(i=0;i<0x100;i++) {
  233. if(*p=='\n') {
  234. *p=0;
  235. break;
  236. }
  237. p++;
  238. }
  239. #else /* #if !defined(CONFIG_PATI) */
  240. #ifdef CONFIG_ENV_IS_IN_FLASH
  241. /* ENV protection ON by default */
  242. flash_protect(FLAG_PROTECT_SET,
  243. CONFIG_ENV_ADDR,
  244. CONFIG_ENV_ADDR+CONFIG_ENV_SECT_SIZE-1,
  245. &flash_info[0]);
  246. #endif
  247. #endif /* #if !defined(CONFIG_PATI) */
  248. return (size_b0);
  249. }
  250. /*-----------------------------------------------------------------------
  251. */
  252. void flash_print_info (flash_info_t *info)
  253. {
  254. int i;
  255. int k;
  256. int size;
  257. int erased;
  258. volatile unsigned long *flash;
  259. if (info->flash_id == FLASH_UNKNOWN) {
  260. printf ("missing or unknown FLASH type\n");
  261. return;
  262. }
  263. switch (info->flash_id & FLASH_VENDMASK) {
  264. case FLASH_MAN_AMD: printf ("AMD "); break;
  265. case FLASH_MAN_FUJ: printf ("FUJITSU "); break;
  266. case FLASH_MAN_SST: printf ("SST "); break;
  267. case FLASH_MAN_INTEL: printf ("Intel "); break;
  268. default: printf ("Unknown Vendor "); break;
  269. }
  270. switch (info->flash_id & FLASH_TYPEMASK) {
  271. case FLASH_AM040: printf ("AM29F040 (512 Kbit, uniform sector size)\n");
  272. break;
  273. case FLASH_AM400B: printf ("AM29LV400B (4 Mbit, bottom boot sect)\n");
  274. break;
  275. case FLASH_AM400T: printf ("AM29LV400T (4 Mbit, top boot sector)\n");
  276. break;
  277. case FLASH_AM800B: printf ("AM29LV800B (8 Mbit, bottom boot sect)\n");
  278. break;
  279. case FLASH_AM800T: printf ("AM29LV800T (8 Mbit, top boot sector)\n");
  280. break;
  281. case FLASH_AM160B: printf ("AM29LV160B (16 Mbit, bottom boot sect)\n");
  282. break;
  283. case FLASH_AM160T: printf ("AM29LV160T (16 Mbit, top boot sector)\n");
  284. break;
  285. case FLASH_AM320B: printf ("AM29LV320B (32 Mbit, bottom boot sect)\n");
  286. break;
  287. case FLASH_AM320T: printf ("AM29LV320T (32 Mbit, top boot sector)\n");
  288. break;
  289. case FLASH_SST800A: printf ("SST39LF/VF800 (8 Mbit, uniform sector size)\n");
  290. break;
  291. case FLASH_SST160A: printf ("SST39LF/VF160 (16 Mbit, uniform sector size)\n");
  292. break;
  293. case FLASH_INTEL320T: printf ("TE28F320C3 (32 Mbit, top sector size)\n");
  294. break;
  295. case FLASH_AM640U: printf ("AM29LV640U (64 Mbit, uniform sector size)\n");
  296. break;
  297. default: printf ("Unknown Chip Type\n");
  298. break;
  299. }
  300. printf (" Size: %ld KB in %d Sectors\n",
  301. info->size >> 10, info->sector_count);
  302. printf (" Sector Start Addresses:");
  303. for (i=0; i<info->sector_count; ++i) {
  304. /*
  305. * Check if whole sector is erased
  306. */
  307. if (i != (info->sector_count-1))
  308. size = info->start[i+1] - info->start[i];
  309. else
  310. size = info->start[0] + info->size - info->start[i];
  311. erased = 1;
  312. flash = (volatile unsigned long *)info->start[i];
  313. size = size >> 2; /* divide by 4 for longword access */
  314. for (k=0; k<size; k++) {
  315. if (*flash++ != 0xffffffff) {
  316. erased = 0;
  317. break;
  318. }
  319. }
  320. if ((i % 5) == 0)
  321. printf ("\n ");
  322. printf (" %08lX%s%s",
  323. info->start[i],
  324. erased ? " E" : " ",
  325. info->protect[i] ? "RO " : " ");
  326. }
  327. printf ("\n");
  328. }
  329. /*-----------------------------------------------------------------------
  330. */
  331. /*-----------------------------------------------------------------------
  332. */
  333. /*
  334. * The following code cannot be run from FLASH!
  335. */
  336. static ulong flash_get_size (vu_long *addr, flash_info_t *info)
  337. {
  338. short i;
  339. FLASH_WORD_SIZE value;
  340. ulong base;
  341. volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *)addr;
  342. /* Write auto select command: read Manufacturer ID */
  343. addr2[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
  344. addr2[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
  345. addr2[ADDR0] = (FLASH_WORD_SIZE)0x00900090;
  346. value = addr2[0];
  347. /* printf("flash_get_size value: %x\n",value); */
  348. switch (value) {
  349. case (FLASH_WORD_SIZE)AMD_MANUFACT:
  350. info->flash_id = FLASH_MAN_AMD;
  351. break;
  352. case (FLASH_WORD_SIZE)FUJ_MANUFACT:
  353. info->flash_id = FLASH_MAN_FUJ;
  354. break;
  355. case (FLASH_WORD_SIZE)INTEL_MANUFACT:
  356. info->flash_id = FLASH_MAN_INTEL;
  357. break;
  358. case (FLASH_WORD_SIZE)SST_MANUFACT:
  359. info->flash_id = FLASH_MAN_SST;
  360. break;
  361. default:
  362. info->flash_id = FLASH_UNKNOWN;
  363. info->sector_count = 0;
  364. info->size = 0;
  365. return (0); /* no or unknown flash */
  366. }
  367. value = addr2[1]; /* device ID */
  368. /* printf("Device value %x\n",value); */
  369. switch (value) {
  370. case (FLASH_WORD_SIZE)AMD_ID_F040B:
  371. info->flash_id += FLASH_AM040;
  372. info->sector_count = 8;
  373. info->size = 0x0080000; /* => 512 ko */
  374. break;
  375. case (FLASH_WORD_SIZE)AMD_ID_LV400T:
  376. info->flash_id += FLASH_AM400T;
  377. info->sector_count = 11;
  378. info->size = 0x00080000;
  379. break; /* => 0.5 MB */
  380. case (FLASH_WORD_SIZE)AMD_ID_LV400B:
  381. info->flash_id += FLASH_AM400B;
  382. info->sector_count = 11;
  383. info->size = 0x00080000;
  384. break; /* => 0.5 MB */
  385. case (FLASH_WORD_SIZE)AMD_ID_LV800T:
  386. info->flash_id += FLASH_AM800T;
  387. info->sector_count = 19;
  388. info->size = 0x00100000;
  389. break; /* => 1 MB */
  390. case (FLASH_WORD_SIZE)AMD_ID_LV800B:
  391. info->flash_id += FLASH_AM800B;
  392. info->sector_count = 19;
  393. info->size = 0x00100000;
  394. break; /* => 1 MB */
  395. case (FLASH_WORD_SIZE)AMD_ID_LV160T:
  396. info->flash_id += FLASH_AM160T;
  397. info->sector_count = 35;
  398. info->size = 0x00200000;
  399. break; /* => 2 MB */
  400. case (FLASH_WORD_SIZE)AMD_ID_LV160B:
  401. info->flash_id += FLASH_AM160B;
  402. info->sector_count = 35;
  403. info->size = 0x00200000;
  404. break; /* => 2 MB */
  405. case (FLASH_WORD_SIZE)AMD_ID_LV320T:
  406. info->flash_id += FLASH_AM320T;
  407. info->sector_count = 67;
  408. info->size = 0x00400000;
  409. break; /* => 4 MB */
  410. case (FLASH_WORD_SIZE)AMD_ID_LV640U:
  411. info->flash_id += FLASH_AM640U;
  412. info->sector_count = 128;
  413. info->size = 0x00800000;
  414. break; /* => 8 MB */
  415. #if 0 /* enable when device IDs are available */
  416. case (FLASH_WORD_SIZE)AMD_ID_LV320B:
  417. info->flash_id += FLASH_AM320B;
  418. info->sector_count = 67;
  419. info->size = 0x00400000;
  420. break; /* => 4 MB */
  421. #endif
  422. case (FLASH_WORD_SIZE)SST_ID_xF800A:
  423. info->flash_id += FLASH_SST800A;
  424. info->sector_count = 16;
  425. info->size = 0x00100000;
  426. break; /* => 1 MB */
  427. case (FLASH_WORD_SIZE)INTEL_ID_28F320C3T:
  428. info->flash_id += FLASH_INTEL320T;
  429. info->sector_count = 71;
  430. info->size = 0x00400000;
  431. break; /* => 4 MB */
  432. case (FLASH_WORD_SIZE)SST_ID_xF160A:
  433. info->flash_id += FLASH_SST160A;
  434. info->sector_count = 32;
  435. info->size = 0x00200000;
  436. break; /* => 2 MB */
  437. default:
  438. info->flash_id = FLASH_UNKNOWN;
  439. return (0); /* => no or unknown flash */
  440. }
  441. /* base address calculation */
  442. base=0-info->size;
  443. /* set up sector start address table */
  444. if (((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) ||
  445. (info->flash_id == FLASH_AM040) ||
  446. (info->flash_id == FLASH_AM640U)){
  447. for (i = 0; i < info->sector_count; i++)
  448. info->start[i] = base + (i * 0x00010000);
  449. }
  450. else {
  451. if (info->flash_id & FLASH_BTYPE) {
  452. /* set sector offsets for bottom boot block type */
  453. info->start[0] = base + 0x00000000;
  454. info->start[1] = base + 0x00004000;
  455. info->start[2] = base + 0x00006000;
  456. info->start[3] = base + 0x00008000;
  457. for (i = 4; i < info->sector_count; i++)
  458. info->start[i] = base + (i * 0x00010000) - 0x00030000;
  459. }
  460. else {
  461. /* set sector offsets for top boot block type */
  462. i = info->sector_count - 1;
  463. if(info->sector_count==71) {
  464. info->start[i--] = base + info->size - 0x00002000;
  465. info->start[i--] = base + info->size - 0x00004000;
  466. info->start[i--] = base + info->size - 0x00006000;
  467. info->start[i--] = base + info->size - 0x00008000;
  468. info->start[i--] = base + info->size - 0x0000A000;
  469. info->start[i--] = base + info->size - 0x0000C000;
  470. info->start[i--] = base + info->size - 0x0000E000;
  471. for (; i >= 0; i--)
  472. info->start[i] = base + i * 0x000010000;
  473. }
  474. else {
  475. info->start[i--] = base + info->size - 0x00004000;
  476. info->start[i--] = base + info->size - 0x00006000;
  477. info->start[i--] = base + info->size - 0x00008000;
  478. for (; i >= 0; i--)
  479. info->start[i] = base + i * 0x00010000;
  480. }
  481. }
  482. }
  483. /* check for protected sectors */
  484. for (i = 0; i < info->sector_count; i++) {
  485. /* read sector protection at sector address, (A7 .. A0) = 0x02 */
  486. /* D0 = 1 if protected */
  487. addr2 = (volatile FLASH_WORD_SIZE *)(info->start[i]);
  488. if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL)
  489. info->protect[i] = 0;
  490. else
  491. info->protect[i] = addr2[2] & 1;
  492. }
  493. /*
  494. * Prevent writes to uninitialized FLASH.
  495. */
  496. if (info->flash_id != FLASH_UNKNOWN) {
  497. addr2 = (FLASH_WORD_SIZE *)info->start[0];
  498. *addr2 = (FLASH_WORD_SIZE)0x00F000F0; /* reset bank */
  499. }
  500. return (info->size);
  501. }
  502. int wait_for_DQ7(flash_info_t *info, int sect)
  503. {
  504. ulong start, now, last;
  505. volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *)(info->start[sect]);
  506. start = get_timer (0);
  507. last = start;
  508. while ((addr[0] & (FLASH_WORD_SIZE)0x00800080) != (FLASH_WORD_SIZE)0x00800080) {
  509. if ((now = get_timer(start)) > CONFIG_SYS_FLASH_ERASE_TOUT) {
  510. printf ("Timeout\n");
  511. return ERR_TIMOUT;
  512. }
  513. /* show that we're waiting */
  514. if ((now - last) > 1000) { /* every second */
  515. putc ('.');
  516. last = now;
  517. }
  518. }
  519. return ERR_OK;
  520. }
  521. int intel_wait_for_DQ7(flash_info_t *info, int sect)
  522. {
  523. ulong start, now, last, status;
  524. volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *)(info->start[sect]);
  525. start = get_timer (0);
  526. last = start;
  527. while ((addr[0] & (FLASH_WORD_SIZE)0x00800080) != (FLASH_WORD_SIZE)0x00800080) {
  528. if ((now = get_timer(start)) > CONFIG_SYS_FLASH_ERASE_TOUT) {
  529. printf ("Timeout\n");
  530. return ERR_TIMOUT;
  531. }
  532. /* show that we're waiting */
  533. if ((now - last) > 1000) { /* every second */
  534. putc ('.');
  535. last = now;
  536. }
  537. }
  538. status = addr[0] & (FLASH_WORD_SIZE)0x00280028;
  539. /* clear status register */
  540. addr[0] = (FLASH_WORD_SIZE)0x00500050;
  541. /* check status for block erase fail and VPP low */
  542. return (status == 0 ? ERR_OK : ERR_NOT_ERASED);
  543. }
  544. /*-----------------------------------------------------------------------
  545. */
  546. int flash_erase (flash_info_t *info, int s_first, int s_last)
  547. {
  548. volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *)(info->start[0]);
  549. volatile FLASH_WORD_SIZE *addr2;
  550. int flag, prot, sect;
  551. int i, rcode = 0;
  552. if ((s_first < 0) || (s_first > s_last)) {
  553. if (info->flash_id == FLASH_UNKNOWN) {
  554. printf ("- missing\n");
  555. } else {
  556. printf ("- no sectors to erase\n");
  557. }
  558. return 1;
  559. }
  560. if (info->flash_id == FLASH_UNKNOWN) {
  561. printf ("Can't erase unknown flash type - aborted\n");
  562. return 1;
  563. }
  564. prot = 0;
  565. for (sect=s_first; sect<=s_last; ++sect) {
  566. if (info->protect[sect]) {
  567. prot++;
  568. }
  569. }
  570. if (prot) {
  571. printf ("- Warning: %d protected sectors will not be erased!\n",
  572. prot);
  573. } else {
  574. printf ("\n");
  575. }
  576. /* Disable interrupts which might cause a timeout here */
  577. flag = disable_interrupts();
  578. /* Start erase on unprotected sectors */
  579. for (sect = s_first; sect<=s_last; sect++) {
  580. if (info->protect[sect] == 0) { /* not protected */
  581. addr2 = (FLASH_WORD_SIZE *)(info->start[sect]);
  582. /* printf("Erasing sector %p\n", addr2); */ /* CLH */
  583. if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) {
  584. addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
  585. addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
  586. addr[ADDR0] = (FLASH_WORD_SIZE)0x00800080;
  587. addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
  588. addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
  589. addr2[0] = (FLASH_WORD_SIZE)0x00500050; /* block erase */
  590. for (i=0; i<50; i++)
  591. udelay(1000); /* wait 1 ms */
  592. rcode |= wait_for_DQ7(info, sect);
  593. }
  594. else {
  595. if((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL){
  596. addr2[0] = (FLASH_WORD_SIZE)0x00600060; /* unlock sector */
  597. addr2[0] = (FLASH_WORD_SIZE)0x00D000D0; /* sector erase */
  598. intel_wait_for_DQ7(info, sect);
  599. addr2[0] = (FLASH_WORD_SIZE)0x00200020; /* sector erase */
  600. addr2[0] = (FLASH_WORD_SIZE)0x00D000D0; /* sector erase */
  601. rcode |= intel_wait_for_DQ7(info, sect);
  602. }
  603. else {
  604. addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
  605. addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
  606. addr[ADDR0] = (FLASH_WORD_SIZE)0x00800080;
  607. addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
  608. addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
  609. addr2[0] = (FLASH_WORD_SIZE)0x00300030; /* sector erase */
  610. rcode |= wait_for_DQ7(info, sect);
  611. }
  612. }
  613. /*
  614. * Wait for each sector to complete, it's more
  615. * reliable. According to AMD Spec, you must
  616. * issue all erase commands within a specified
  617. * timeout. This has been seen to fail, especially
  618. * if printf()s are included (for debug)!!
  619. */
  620. /* wait_for_DQ7(info, sect); */
  621. }
  622. }
  623. /* re-enable interrupts if necessary */
  624. if (flag)
  625. enable_interrupts();
  626. /* wait at least 80us - let's wait 1 ms */
  627. udelay (1000);
  628. /* reset to read mode */
  629. addr = (FLASH_WORD_SIZE *)info->start[0];
  630. addr[0] = (FLASH_WORD_SIZE)0x00F000F0; /* reset bank */
  631. if (!rcode)
  632. printf (" done\n");
  633. return rcode;
  634. }
  635. void unlock_intel_sectors(flash_info_t *info,ulong addr,ulong cnt)
  636. {
  637. int i;
  638. volatile FLASH_WORD_SIZE *addr2;
  639. long c;
  640. c= (long)cnt;
  641. for(i=info->sector_count-1;i>0;i--)
  642. {
  643. if(addr>=info->start[i])
  644. break;
  645. }
  646. do {
  647. addr2 = (FLASH_WORD_SIZE *)(info->start[i]);
  648. addr2[0] = (FLASH_WORD_SIZE)0x00600060; /* unlock sector setup */
  649. addr2[0] = (FLASH_WORD_SIZE)0x00D000D0; /* unlock sector */
  650. intel_wait_for_DQ7(info, i);
  651. i++;
  652. c-=(info->start[i]-info->start[i-1]);
  653. }while(c>0);
  654. }
  655. /*-----------------------------------------------------------------------
  656. * Copy memory to flash, returns:
  657. * 0 - OK
  658. * 1 - write timeout
  659. * 2 - Flash not erased
  660. */
  661. int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
  662. {
  663. ulong cp, wp, data;
  664. int i, l, rc;
  665. if((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL){
  666. unlock_intel_sectors(info,addr,cnt);
  667. }
  668. wp = (addr & ~3); /* get lower word aligned address */
  669. /*
  670. * handle unaligned start bytes
  671. */
  672. if ((l = addr - wp) != 0) {
  673. data = 0;
  674. for (i=0, cp=wp; i<l; ++i, ++cp) {
  675. data = (data << 8) | (*(uchar *)cp);
  676. }
  677. for (; i<4 && cnt>0; ++i) {
  678. data = (data << 8) | *src++;
  679. --cnt;
  680. ++cp;
  681. }
  682. for (; cnt==0 && i<4; ++i, ++cp) {
  683. data = (data << 8) | (*(uchar *)cp);
  684. }
  685. if ((rc = write_word(info, wp, data)) != 0) {
  686. return (rc);
  687. }
  688. wp += 4;
  689. }
  690. /*
  691. * handle word aligned part
  692. */
  693. while (cnt >= 4) {
  694. data = 0;
  695. for (i=0; i<4; ++i) {
  696. data = (data << 8) | *src++;
  697. }
  698. if ((rc = write_word(info, wp, data)) != 0) {
  699. return (rc);
  700. }
  701. wp += 4;
  702. if((wp % 0x10000)==0)
  703. printf("."); /* show Progress */
  704. cnt -= 4;
  705. }
  706. if (cnt == 0) {
  707. return (0);
  708. }
  709. /*
  710. * handle unaligned tail bytes
  711. */
  712. data = 0;
  713. for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
  714. data = (data << 8) | *src++;
  715. --cnt;
  716. }
  717. for (; i<4; ++i, ++cp) {
  718. data = (data << 8) | (*(uchar *)cp);
  719. }
  720. rc=write_word(info, wp, data);
  721. return rc;
  722. }
  723. /*-----------------------------------------------------------------------
  724. * Write a word to Flash, returns:
  725. * 0 - OK
  726. * 1 - write timeout
  727. * 2 - Flash not erased
  728. */
  729. static FLASH_WORD_SIZE *read_val = (FLASH_WORD_SIZE *)0x200000;
  730. static int write_word (flash_info_t *info, ulong dest, ulong data)
  731. {
  732. volatile FLASH_WORD_SIZE *addr2 = (volatile FLASH_WORD_SIZE *)(info->start[0]);
  733. volatile FLASH_WORD_SIZE *dest2 = (volatile FLASH_WORD_SIZE *)dest;
  734. volatile FLASH_WORD_SIZE *data2;
  735. ulong start;
  736. ulong *data_p;
  737. int flag;
  738. int i;
  739. data_p = &data;
  740. data2 = (volatile FLASH_WORD_SIZE *)data_p;
  741. /* Check if Flash is (sufficiently) erased */
  742. if ((*((volatile FLASH_WORD_SIZE *)dest) &
  743. (FLASH_WORD_SIZE)data) != (FLASH_WORD_SIZE)data) {
  744. return (2);
  745. }
  746. /* Disable interrupts which might cause a timeout here */
  747. flag = disable_interrupts();
  748. for (i=0; i<4/sizeof(FLASH_WORD_SIZE); i++)
  749. {
  750. if((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL){
  751. /* intel style writting */
  752. dest2[i] = (FLASH_WORD_SIZE)0x00500050;
  753. dest2[i] = (FLASH_WORD_SIZE)0x00400040;
  754. *read_val++ = data2[i];
  755. dest2[i] = data2[i];
  756. if (flag)
  757. enable_interrupts();
  758. /* data polling for D7 */
  759. start = get_timer (0);
  760. udelay(10);
  761. while ((dest2[i] & (FLASH_WORD_SIZE)0x00800080) != (FLASH_WORD_SIZE)0x00800080)
  762. {
  763. if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT)
  764. return (1);
  765. }
  766. dest2[i] = (FLASH_WORD_SIZE)0x00FF00FF; /* return to read mode */
  767. udelay(10);
  768. dest2[i] = (FLASH_WORD_SIZE)0x00FF00FF; /* return to read mode */
  769. if(dest2[i]!=data2[i])
  770. printf("Error at %p 0x%04X != 0x%04X\n",&dest2[i],dest2[i],data2[i]);
  771. }
  772. else {
  773. addr2[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
  774. addr2[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
  775. addr2[ADDR0] = (FLASH_WORD_SIZE)0x00A000A0;
  776. dest2[i] = data2[i];
  777. /* re-enable interrupts if necessary */
  778. if (flag)
  779. enable_interrupts();
  780. /* data polling for D7 */
  781. start = get_timer (0);
  782. while ((dest2[i] & (FLASH_WORD_SIZE)0x00800080) !=
  783. (data2[i] & (FLASH_WORD_SIZE)0x00800080)) {
  784. if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
  785. return (1);
  786. }
  787. }
  788. }
  789. }
  790. return (0);
  791. }
  792. /*-----------------------------------------------------------------------
  793. */