usb_ohci.c 47 KB

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  1. /*
  2. * URB OHCI HCD (Host Controller Driver) for USB on the AT91RM9200.
  3. *
  4. * (C) Copyright 2003
  5. * Gary Jennejohn, DENX Software Engineering <gj@denx.de>
  6. *
  7. * Note: Much of this code has been derived from Linux 2.4
  8. * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
  9. * (C) Copyright 2000-2002 David Brownell
  10. *
  11. * Modified for the MP2USB by (C) Copyright 2005 Eric Benard
  12. * ebenard@eukrea.com - based on s3c24x0's driver
  13. *
  14. * See file CREDITS for list of people who contributed to this
  15. * project.
  16. *
  17. * This program is free software; you can redistribute it and/or
  18. * modify it under the terms of the GNU General Public License as
  19. * published by the Free Software Foundation; either version 2 of
  20. * the License, or (at your option) any later version.
  21. *
  22. * This program is distributed in the hope that it will be useful,
  23. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  24. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  25. * GNU General Public License for more details.
  26. *
  27. * You should have received a copy of the GNU General Public License
  28. * along with this program; if not, write to the Free Software
  29. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  30. * MA 02111-1307 USA
  31. *
  32. */
  33. /*
  34. * IMPORTANT NOTES
  35. * 1 - you MUST define LITTLEENDIAN in the configuration file for the
  36. * board or this driver will NOT work!
  37. * 2 - this driver is intended for use with USB Mass Storage Devices
  38. * (BBB) ONLY. There is NO support for Interrupt or Isochronous pipes!
  39. * 3 - when running on a PQFP208 AT91RM9200, define CONFIG_AT91C_PQFP_UHPBUG
  40. * to activate workaround for bug #41 or this driver will NOT work!
  41. */
  42. #include <common.h>
  43. /* #include <pci.h> no PCI on the S3C24X0 */
  44. #ifdef CONFIG_USB_OHCI_NEW
  45. /* mk: are these really required? */
  46. #if defined(CONFIG_S3C2400)
  47. # include <s3c2400.h>
  48. #elif defined(CONFIG_S3C2410)
  49. # include <s3c2410.h>
  50. #elif defined(CONFIG_ARM920T)
  51. # include <asm/arch/hardware.h>
  52. #elif defined(CONFIG_CPU_MONAHANS)
  53. # include <asm/arch/pxa-regs.h>
  54. #elif defined(CONFIG_MPC5200)
  55. # include <mpc5xxx.h>
  56. #endif
  57. #include <malloc.h>
  58. #include <usb.h>
  59. #include "usb_ohci.h"
  60. #define S3C24X0_merge
  61. #if defined(CONFIG_ARM920T) || \
  62. defined(CONFIG_S3C2400) || \
  63. defined(CONFIG_S3C2410) || \
  64. defined(CONFIG_440EP) || \
  65. defined(CONFIG_MPC5200)
  66. # define OHCI_USE_NPS /* force NoPowerSwitching mode */
  67. #endif
  68. #undef OHCI_VERBOSE_DEBUG /* not always helpful */
  69. #undef DEBUG
  70. #undef SHOW_INFO
  71. #undef OHCI_FILL_TRACE
  72. /* For initializing controller (mask in an HCFS mode too) */
  73. #define OHCI_CONTROL_INIT \
  74. (OHCI_CTRL_CBSR & 0x3) | OHCI_CTRL_IE | OHCI_CTRL_PLE
  75. #define readl(a) (*((vu_long *)(a)))
  76. #define writel(a, b) (*((vu_long *)(b)) = ((vu_long)a))
  77. #define min_t(type,x,y) ({ type __x = (x); type __y = (y); __x < __y ? __x: __y; })
  78. #undef DEBUG
  79. #ifdef DEBUG
  80. #define dbg(format, arg...) printf("DEBUG: " format "\n", ## arg)
  81. #else
  82. #define dbg(format, arg...) do {} while(0)
  83. #endif /* DEBUG */
  84. #define err(format, arg...) printf("ERROR: " format "\n", ## arg)
  85. #undef SHOW_INFO
  86. #ifdef SHOW_INFO
  87. #define info(format, arg...) printf("INFO: " format "\n", ## arg)
  88. #else
  89. #define info(format, arg...) do {} while(0)
  90. #endif
  91. #if defined(CONFIG_440EP) || defined(CONFIG_MPC5200)
  92. # define m16_swap(x) (x)
  93. # define m32_swap(x) (x)
  94. #else
  95. # define m16_swap(x) swap_16(x)
  96. # define m32_swap(x) swap_32(x)
  97. #endif
  98. /* global ohci_t */
  99. static ohci_t gohci;
  100. /* this must be aligned to a 256 byte boundary */
  101. struct ohci_hcca ghcca[1];
  102. /* a pointer to the aligned storage */
  103. struct ohci_hcca *phcca;
  104. /* this allocates EDs for all possible endpoints */
  105. struct ohci_device ohci_dev;
  106. /* urb_priv */
  107. urb_priv_t urb_priv;
  108. /* RHSC flag */
  109. int got_rhsc;
  110. /* device which was disconnected */
  111. struct usb_device *devgone;
  112. #ifdef S3C24X0_merge
  113. /* flag guarding URB transation */
  114. int urb_finished = 0;
  115. #endif
  116. /*-------------------------------------------------------------------------*/
  117. /* AMD-756 (D2 rev) reports corrupt register contents in some cases.
  118. * The erratum (#4) description is incorrect. AMD's workaround waits
  119. * till some bits (mostly reserved) are clear; ok for all revs.
  120. */
  121. #define OHCI_QUIRK_AMD756 0xabcd
  122. #define read_roothub(hc, register, mask) ({ \
  123. u32 temp = readl (&hc->regs->roothub.register); \
  124. if (hc->flags & OHCI_QUIRK_AMD756) \
  125. while (temp & mask) \
  126. temp = readl (&hc->regs->roothub.register); \
  127. temp; })
  128. static u32 roothub_a (struct ohci *hc)
  129. { return read_roothub (hc, a, 0xfc0fe000); }
  130. static inline u32 roothub_b (struct ohci *hc)
  131. { return readl (&hc->regs->roothub.b); }
  132. static inline u32 roothub_status (struct ohci *hc)
  133. { return readl (&hc->regs->roothub.status); }
  134. static u32 roothub_portstatus (struct ohci *hc, int i)
  135. { return read_roothub (hc, portstatus [i], 0xffe0fce0); }
  136. /* forward declaration */
  137. static int hc_interrupt (void);
  138. static void
  139. td_submit_job (struct usb_device * dev, unsigned long pipe, void * buffer,
  140. int transfer_len, struct devrequest * setup, urb_priv_t * urb, int interval);
  141. /*-------------------------------------------------------------------------*
  142. * URB support functions
  143. *-------------------------------------------------------------------------*/
  144. /* free HCD-private data associated with this URB */
  145. static void urb_free_priv (urb_priv_t * urb)
  146. {
  147. int i;
  148. int last;
  149. struct td * td;
  150. last = urb->length - 1;
  151. if (last >= 0) {
  152. for (i = 0; i <= last; i++) {
  153. td = urb->td[i];
  154. if (td) {
  155. td->usb_dev = NULL;
  156. urb->td[i] = NULL;
  157. }
  158. }
  159. }
  160. }
  161. /*-------------------------------------------------------------------------*/
  162. #ifdef DEBUG
  163. static int sohci_get_current_frame_number (struct usb_device * dev);
  164. /* debug| print the main components of an URB
  165. * small: 0) header + data packets 1) just header */
  166. static void pkt_print (struct usb_device * dev, unsigned long pipe, void * buffer,
  167. int transfer_len, struct devrequest * setup, char * str, int small)
  168. {
  169. urb_priv_t * purb = &urb_priv;
  170. dbg("%s URB:[%4x] dev:%2d,ep:%2d-%c,type:%s,len:%d/%d stat:%#lx",
  171. str,
  172. sohci_get_current_frame_number (dev),
  173. usb_pipedevice (pipe),
  174. usb_pipeendpoint (pipe),
  175. usb_pipeout (pipe)? 'O': 'I',
  176. usb_pipetype (pipe) < 2? (usb_pipeint (pipe)? "INTR": "ISOC"):
  177. (usb_pipecontrol (pipe)? "CTRL": "BULK"),
  178. purb->actual_length,
  179. transfer_len, dev->status);
  180. #ifdef OHCI_VERBOSE_DEBUG
  181. if (!small) {
  182. int i, len;
  183. if (usb_pipecontrol (pipe)) {
  184. printf (__FILE__ ": cmd(8):");
  185. for (i = 0; i < 8 ; i++)
  186. printf (" %02x", ((__u8 *) setup) [i]);
  187. printf ("\n");
  188. }
  189. if (transfer_len > 0 && buffer) {
  190. printf (__FILE__ ": data(%d/%d):",
  191. purb->actual_length,
  192. transfer_len);
  193. len = usb_pipeout (pipe)?
  194. transfer_len: purb->actual_length;
  195. for (i = 0; i < 16 && i < len; i++)
  196. printf (" %02x", ((__u8 *) buffer) [i]);
  197. printf ("%s\n", i < len? "...": "");
  198. }
  199. }
  200. #endif
  201. }
  202. /* just for debugging; prints non-empty branches of the int ed tree inclusive iso eds*/
  203. void ep_print_int_eds (ohci_t *ohci, char * str) {
  204. int i, j;
  205. __u32 * ed_p;
  206. for (i= 0; i < 32; i++) {
  207. j = 5;
  208. ed_p = &(ohci->hcca->int_table [i]);
  209. if (*ed_p == 0)
  210. continue;
  211. printf (__FILE__ ": %s branch int %2d(%2x):", str, i, i);
  212. while (*ed_p != 0 && j--) {
  213. ed_t *ed = (ed_t *)m32_swap(ed_p);
  214. printf (" ed: %4x;", ed->hwINFO);
  215. ed_p = &ed->hwNextED;
  216. }
  217. printf ("\n");
  218. }
  219. }
  220. static void ohci_dump_intr_mask (char *label, __u32 mask)
  221. {
  222. dbg ("%s: 0x%08x%s%s%s%s%s%s%s%s%s",
  223. label,
  224. mask,
  225. (mask & OHCI_INTR_MIE) ? " MIE" : "",
  226. (mask & OHCI_INTR_OC) ? " OC" : "",
  227. (mask & OHCI_INTR_RHSC) ? " RHSC" : "",
  228. (mask & OHCI_INTR_FNO) ? " FNO" : "",
  229. (mask & OHCI_INTR_UE) ? " UE" : "",
  230. (mask & OHCI_INTR_RD) ? " RD" : "",
  231. (mask & OHCI_INTR_SF) ? " SF" : "",
  232. (mask & OHCI_INTR_WDH) ? " WDH" : "",
  233. (mask & OHCI_INTR_SO) ? " SO" : ""
  234. );
  235. }
  236. static void maybe_print_eds (char *label, __u32 value)
  237. {
  238. ed_t *edp = (ed_t *)value;
  239. if (value) {
  240. dbg ("%s %08x", label, value);
  241. dbg ("%08x", edp->hwINFO);
  242. dbg ("%08x", edp->hwTailP);
  243. dbg ("%08x", edp->hwHeadP);
  244. dbg ("%08x", edp->hwNextED);
  245. }
  246. }
  247. static char * hcfs2string (int state)
  248. {
  249. switch (state) {
  250. case OHCI_USB_RESET: return "reset";
  251. case OHCI_USB_RESUME: return "resume";
  252. case OHCI_USB_OPER: return "operational";
  253. case OHCI_USB_SUSPEND: return "suspend";
  254. }
  255. return "?";
  256. }
  257. /* dump control and status registers */
  258. static void ohci_dump_status (ohci_t *controller)
  259. {
  260. struct ohci_regs *regs = controller->regs;
  261. __u32 temp;
  262. temp = readl (&regs->revision) & 0xff;
  263. if (temp != 0x10)
  264. dbg ("spec %d.%d", (temp >> 4), (temp & 0x0f));
  265. temp = readl (&regs->control);
  266. dbg ("control: 0x%08x%s%s%s HCFS=%s%s%s%s%s CBSR=%d", temp,
  267. (temp & OHCI_CTRL_RWE) ? " RWE" : "",
  268. (temp & OHCI_CTRL_RWC) ? " RWC" : "",
  269. (temp & OHCI_CTRL_IR) ? " IR" : "",
  270. hcfs2string (temp & OHCI_CTRL_HCFS),
  271. (temp & OHCI_CTRL_BLE) ? " BLE" : "",
  272. (temp & OHCI_CTRL_CLE) ? " CLE" : "",
  273. (temp & OHCI_CTRL_IE) ? " IE" : "",
  274. (temp & OHCI_CTRL_PLE) ? " PLE" : "",
  275. temp & OHCI_CTRL_CBSR
  276. );
  277. temp = readl (&regs->cmdstatus);
  278. dbg ("cmdstatus: 0x%08x SOC=%d%s%s%s%s", temp,
  279. (temp & OHCI_SOC) >> 16,
  280. (temp & OHCI_OCR) ? " OCR" : "",
  281. (temp & OHCI_BLF) ? " BLF" : "",
  282. (temp & OHCI_CLF) ? " CLF" : "",
  283. (temp & OHCI_HCR) ? " HCR" : ""
  284. );
  285. ohci_dump_intr_mask ("intrstatus", readl (&regs->intrstatus));
  286. ohci_dump_intr_mask ("intrenable", readl (&regs->intrenable));
  287. maybe_print_eds ("ed_periodcurrent", readl (&regs->ed_periodcurrent));
  288. maybe_print_eds ("ed_controlhead", readl (&regs->ed_controlhead));
  289. maybe_print_eds ("ed_controlcurrent", readl (&regs->ed_controlcurrent));
  290. maybe_print_eds ("ed_bulkhead", readl (&regs->ed_bulkhead));
  291. maybe_print_eds ("ed_bulkcurrent", readl (&regs->ed_bulkcurrent));
  292. maybe_print_eds ("donehead", readl (&regs->donehead));
  293. }
  294. static void ohci_dump_roothub (ohci_t *controller, int verbose)
  295. {
  296. __u32 temp, ndp, i;
  297. temp = roothub_a (controller);
  298. ndp = (temp & RH_A_NDP);
  299. #ifdef CONFIG_AT91C_PQFP_UHPBUG
  300. ndp = (ndp == 2) ? 1:0;
  301. #endif
  302. if (verbose) {
  303. dbg ("roothub.a: %08x POTPGT=%d%s%s%s%s%s NDP=%d", temp,
  304. ((temp & RH_A_POTPGT) >> 24) & 0xff,
  305. (temp & RH_A_NOCP) ? " NOCP" : "",
  306. (temp & RH_A_OCPM) ? " OCPM" : "",
  307. (temp & RH_A_DT) ? " DT" : "",
  308. (temp & RH_A_NPS) ? " NPS" : "",
  309. (temp & RH_A_PSM) ? " PSM" : "",
  310. ndp
  311. );
  312. temp = roothub_b (controller);
  313. dbg ("roothub.b: %08x PPCM=%04x DR=%04x",
  314. temp,
  315. (temp & RH_B_PPCM) >> 16,
  316. (temp & RH_B_DR)
  317. );
  318. temp = roothub_status (controller);
  319. dbg ("roothub.status: %08x%s%s%s%s%s%s",
  320. temp,
  321. (temp & RH_HS_CRWE) ? " CRWE" : "",
  322. (temp & RH_HS_OCIC) ? " OCIC" : "",
  323. (temp & RH_HS_LPSC) ? " LPSC" : "",
  324. (temp & RH_HS_DRWE) ? " DRWE" : "",
  325. (temp & RH_HS_OCI) ? " OCI" : "",
  326. (temp & RH_HS_LPS) ? " LPS" : ""
  327. );
  328. }
  329. for (i = 0; i < ndp; i++) {
  330. temp = roothub_portstatus (controller, i);
  331. dbg ("roothub.portstatus [%d] = 0x%08x%s%s%s%s%s%s%s%s%s%s%s%s",
  332. i,
  333. temp,
  334. (temp & RH_PS_PRSC) ? " PRSC" : "",
  335. (temp & RH_PS_OCIC) ? " OCIC" : "",
  336. (temp & RH_PS_PSSC) ? " PSSC" : "",
  337. (temp & RH_PS_PESC) ? " PESC" : "",
  338. (temp & RH_PS_CSC) ? " CSC" : "",
  339. (temp & RH_PS_LSDA) ? " LSDA" : "",
  340. (temp & RH_PS_PPS) ? " PPS" : "",
  341. (temp & RH_PS_PRS) ? " PRS" : "",
  342. (temp & RH_PS_POCI) ? " POCI" : "",
  343. (temp & RH_PS_PSS) ? " PSS" : "",
  344. (temp & RH_PS_PES) ? " PES" : "",
  345. (temp & RH_PS_CCS) ? " CCS" : ""
  346. );
  347. }
  348. }
  349. static void ohci_dump (ohci_t *controller, int verbose)
  350. {
  351. dbg ("OHCI controller usb-%s state", controller->slot_name);
  352. /* dumps some of the state we know about */
  353. ohci_dump_status (controller);
  354. if (verbose)
  355. ep_print_int_eds (controller, "hcca");
  356. dbg ("hcca frame #%04x", controller->hcca->frame_no);
  357. ohci_dump_roothub (controller, 1);
  358. }
  359. #endif /* DEBUG */
  360. /*-------------------------------------------------------------------------*
  361. * Interface functions (URB)
  362. *-------------------------------------------------------------------------*/
  363. /* get a transfer request */
  364. int sohci_submit_job(struct usb_device *dev, unsigned long pipe, void *buffer,
  365. int transfer_len, struct devrequest *setup, int interval)
  366. {
  367. ohci_t *ohci;
  368. ed_t * ed;
  369. urb_priv_t *purb_priv;
  370. int i, size = 0;
  371. ohci = &gohci;
  372. /* when controller's hung, permit only roothub cleanup attempts
  373. * such as powering down ports */
  374. if (ohci->disabled) {
  375. err("sohci_submit_job: EPIPE");
  376. return -1;
  377. }
  378. #ifdef S3C24X0_merge
  379. /* if we have an unfinished URB from previous transaction let's
  380. * fail and scream as quickly as possible so as not to corrupt
  381. * further communication */
  382. if (!urb_finished) {
  383. err("sohci_submit_job: URB NOT FINISHED");
  384. return -1;
  385. }
  386. /* we're about to begin a new transaction here so mark the URB unfinished */
  387. urb_finished = 0;
  388. #endif
  389. /* every endpoint has a ed, locate and fill it */
  390. if (!(ed = ep_add_ed (dev, pipe))) {
  391. err("sohci_submit_job: ENOMEM");
  392. return -1;
  393. }
  394. /* for the private part of the URB we need the number of TDs (size) */
  395. switch (usb_pipetype (pipe)) {
  396. case PIPE_BULK: /* one TD for every 4096 Byte */
  397. size = (transfer_len - 1) / 4096 + 1;
  398. break;
  399. case PIPE_CONTROL: /* 1 TD for setup, 1 for ACK and 1 for every 4096 B */
  400. size = (transfer_len == 0)? 2:
  401. (transfer_len - 1) / 4096 + 3;
  402. break;
  403. }
  404. if (size >= (N_URB_TD - 1)) {
  405. err("need %d TDs, only have %d", size, N_URB_TD);
  406. return -1;
  407. }
  408. purb_priv = &urb_priv;
  409. purb_priv->pipe = pipe;
  410. /* fill the private part of the URB */
  411. purb_priv->length = size;
  412. purb_priv->ed = ed;
  413. purb_priv->actual_length = 0;
  414. /* allocate the TDs */
  415. /* note that td[0] was allocated in ep_add_ed */
  416. for (i = 0; i < size; i++) {
  417. purb_priv->td[i] = td_alloc (dev);
  418. if (!purb_priv->td[i]) {
  419. purb_priv->length = i;
  420. urb_free_priv (purb_priv);
  421. err("sohci_submit_job: ENOMEM");
  422. return -1;
  423. }
  424. }
  425. if (ed->state == ED_NEW || (ed->state & ED_DEL)) {
  426. urb_free_priv (purb_priv);
  427. err("sohci_submit_job: EINVAL");
  428. return -1;
  429. }
  430. /* link the ed into a chain if is not already */
  431. if (ed->state != ED_OPER)
  432. ep_link (ohci, ed);
  433. /* fill the TDs and link it to the ed */
  434. td_submit_job(dev, pipe, buffer, transfer_len, setup, purb_priv, interval);
  435. return 0;
  436. }
  437. /*-------------------------------------------------------------------------*/
  438. #ifdef DEBUG
  439. /* tell us the current USB frame number */
  440. static int sohci_get_current_frame_number (struct usb_device *usb_dev)
  441. {
  442. ohci_t *ohci = &gohci;
  443. return m16_swap (ohci->hcca->frame_no);
  444. }
  445. #endif
  446. /*-------------------------------------------------------------------------*
  447. * ED handling functions
  448. *-------------------------------------------------------------------------*/
  449. /* link an ed into one of the HC chains */
  450. static int ep_link (ohci_t *ohci, ed_t *edi)
  451. {
  452. volatile ed_t *ed = edi;
  453. ed->state = ED_OPER;
  454. switch (ed->type) {
  455. case PIPE_CONTROL:
  456. ed->hwNextED = 0;
  457. if (ohci->ed_controltail == NULL) {
  458. writel (ed, &ohci->regs->ed_controlhead);
  459. } else {
  460. ohci->ed_controltail->hwNextED = m32_swap ((unsigned long)ed);
  461. }
  462. ed->ed_prev = ohci->ed_controltail;
  463. if (!ohci->ed_controltail && !ohci->ed_rm_list[0] &&
  464. !ohci->ed_rm_list[1] && !ohci->sleeping) {
  465. ohci->hc_control |= OHCI_CTRL_CLE;
  466. writel (ohci->hc_control, &ohci->regs->control);
  467. }
  468. ohci->ed_controltail = edi;
  469. break;
  470. case PIPE_BULK:
  471. ed->hwNextED = 0;
  472. if (ohci->ed_bulktail == NULL) {
  473. writel (ed, &ohci->regs->ed_bulkhead);
  474. } else {
  475. ohci->ed_bulktail->hwNextED = m32_swap ((unsigned long)ed);
  476. }
  477. ed->ed_prev = ohci->ed_bulktail;
  478. if (!ohci->ed_bulktail && !ohci->ed_rm_list[0] &&
  479. !ohci->ed_rm_list[1] && !ohci->sleeping) {
  480. ohci->hc_control |= OHCI_CTRL_BLE;
  481. writel (ohci->hc_control, &ohci->regs->control);
  482. }
  483. ohci->ed_bulktail = edi;
  484. break;
  485. }
  486. return 0;
  487. }
  488. /*-------------------------------------------------------------------------*/
  489. /* unlink an ed from one of the HC chains.
  490. * just the link to the ed is unlinked.
  491. * the link from the ed still points to another operational ed or 0
  492. * so the HC can eventually finish the processing of the unlinked ed */
  493. static int ep_unlink (ohci_t *ohci, ed_t *edi)
  494. {
  495. volatile ed_t *ed = edi;
  496. ed->hwINFO |= m32_swap (OHCI_ED_SKIP);
  497. switch (ed->type) {
  498. case PIPE_CONTROL:
  499. if (ed->ed_prev == NULL) {
  500. if (!ed->hwNextED) {
  501. ohci->hc_control &= ~OHCI_CTRL_CLE;
  502. writel (ohci->hc_control, &ohci->regs->control);
  503. }
  504. writel (m32_swap (*((__u32 *)&ed->hwNextED)), &ohci->regs->ed_controlhead);
  505. } else {
  506. ed->ed_prev->hwNextED = ed->hwNextED;
  507. }
  508. if (ohci->ed_controltail == ed) {
  509. ohci->ed_controltail = ed->ed_prev;
  510. } else {
  511. ((ed_t *)m32_swap (*((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
  512. }
  513. break;
  514. case PIPE_BULK:
  515. if (ed->ed_prev == NULL) {
  516. if (!ed->hwNextED) {
  517. ohci->hc_control &= ~OHCI_CTRL_BLE;
  518. writel (ohci->hc_control, &ohci->regs->control);
  519. }
  520. writel (m32_swap (*((__u32 *)&ed->hwNextED)), &ohci->regs->ed_bulkhead);
  521. } else {
  522. ed->ed_prev->hwNextED = ed->hwNextED;
  523. }
  524. if (ohci->ed_bulktail == ed) {
  525. ohci->ed_bulktail = ed->ed_prev;
  526. } else {
  527. ((ed_t *)m32_swap (*((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
  528. }
  529. break;
  530. }
  531. ed->state = ED_UNLINK;
  532. return 0;
  533. }
  534. /*-------------------------------------------------------------------------*/
  535. /* add/reinit an endpoint; this should be done once at the
  536. * usb_set_configuration command, but the USB stack is a little bit
  537. * stateless so we do it at every transaction if the state of the ed
  538. * is ED_NEW then a dummy td is added and the state is changed to
  539. * ED_UNLINK in all other cases the state is left unchanged the ed
  540. * info fields are setted anyway even though most of them should not
  541. * change
  542. */
  543. static ed_t * ep_add_ed (struct usb_device *usb_dev, unsigned long pipe)
  544. {
  545. td_t *td;
  546. ed_t *ed_ret;
  547. volatile ed_t *ed;
  548. ed = ed_ret = &ohci_dev.ed[(usb_pipeendpoint (pipe) << 1) |
  549. (usb_pipecontrol (pipe)? 0: usb_pipeout (pipe))];
  550. if ((ed->state & ED_DEL) || (ed->state & ED_URB_DEL)) {
  551. err("ep_add_ed: pending delete");
  552. /* pending delete request */
  553. return NULL;
  554. }
  555. if (ed->state == ED_NEW) {
  556. ed->hwINFO = m32_swap (OHCI_ED_SKIP); /* skip ed */
  557. /* dummy td; end of td list for ed */
  558. td = td_alloc (usb_dev);
  559. ed->hwTailP = m32_swap ((unsigned long)td);
  560. ed->hwHeadP = ed->hwTailP;
  561. ed->state = ED_UNLINK;
  562. ed->type = usb_pipetype (pipe);
  563. ohci_dev.ed_cnt++;
  564. }
  565. ed->hwINFO = m32_swap (usb_pipedevice (pipe)
  566. | usb_pipeendpoint (pipe) << 7
  567. | (usb_pipeisoc (pipe)? 0x8000: 0)
  568. | (usb_pipecontrol (pipe)? 0: (usb_pipeout (pipe)? 0x800: 0x1000))
  569. | usb_pipeslow (pipe) << 13
  570. | usb_maxpacket (usb_dev, pipe) << 16);
  571. return ed_ret;
  572. }
  573. /*-------------------------------------------------------------------------*
  574. * TD handling functions
  575. *-------------------------------------------------------------------------*/
  576. /* enqueue next TD for this URB (OHCI spec 5.2.8.2) */
  577. static void td_fill (ohci_t *ohci, unsigned int info,
  578. void *data, int len,
  579. struct usb_device *dev, int index, urb_priv_t *urb_priv)
  580. {
  581. volatile td_t *td, *td_pt;
  582. #ifdef OHCI_FILL_TRACE
  583. int i;
  584. #endif
  585. if (index > urb_priv->length) {
  586. err("index > length");
  587. return;
  588. }
  589. /* use this td as the next dummy */
  590. td_pt = urb_priv->td [index];
  591. td_pt->hwNextTD = 0;
  592. /* fill the old dummy TD */
  593. td = urb_priv->td [index] = (td_t *)(m32_swap (urb_priv->ed->hwTailP) & ~0xf);
  594. td->ed = urb_priv->ed;
  595. td->next_dl_td = NULL;
  596. td->index = index;
  597. td->data = (__u32)data;
  598. #ifdef OHCI_FILL_TRACE
  599. if ((usb_pipetype(urb_priv->pipe) == PIPE_BULK) && usb_pipeout(urb_priv->pipe)) {
  600. for (i = 0; i < len; i++)
  601. printf("td->data[%d] %#2x ",i, ((unsigned char *)td->data)[i]);
  602. printf("\n");
  603. }
  604. #endif
  605. if (!len)
  606. data = 0;
  607. td->hwINFO = m32_swap (info);
  608. td->hwCBP = m32_swap ((unsigned long)data);
  609. if (data)
  610. td->hwBE = m32_swap ((unsigned long)(data + len - 1));
  611. else
  612. td->hwBE = 0;
  613. td->hwNextTD = m32_swap ((unsigned long)td_pt);
  614. #ifndef S3C24X0_merge
  615. td->hwPSW [0] = m16_swap (((__u32)data & 0x0FFF) | 0xE000);
  616. #endif
  617. /* append to queue */
  618. td->ed->hwTailP = td->hwNextTD;
  619. }
  620. /*-------------------------------------------------------------------------*/
  621. /* prepare all TDs of a transfer */
  622. static void td_submit_job (struct usb_device *dev, unsigned long pipe, void *buffer,
  623. int transfer_len, struct devrequest *setup, urb_priv_t *urb, int interval)
  624. {
  625. ohci_t *ohci = &gohci;
  626. int data_len = transfer_len;
  627. void *data;
  628. int cnt = 0;
  629. __u32 info = 0;
  630. unsigned int toggle = 0;
  631. /* OHCI handles the DATA-toggles itself, we just use the USB-toggle bits for reseting */
  632. if(usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe))) {
  633. toggle = TD_T_TOGGLE;
  634. } else {
  635. toggle = TD_T_DATA0;
  636. usb_settoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe), 1);
  637. }
  638. urb->td_cnt = 0;
  639. if (data_len)
  640. data = buffer;
  641. else
  642. data = 0;
  643. switch (usb_pipetype (pipe)) {
  644. case PIPE_BULK:
  645. info = usb_pipeout (pipe)?
  646. TD_CC | TD_DP_OUT : TD_CC | TD_DP_IN ;
  647. while(data_len > 4096) {
  648. td_fill (ohci, info | (cnt? TD_T_TOGGLE:toggle), data, 4096, dev, cnt, urb);
  649. data += 4096; data_len -= 4096; cnt++;
  650. }
  651. info = usb_pipeout (pipe)?
  652. TD_CC | TD_DP_OUT : TD_CC | TD_R | TD_DP_IN ;
  653. td_fill (ohci, info | (cnt? TD_T_TOGGLE:toggle), data, data_len, dev, cnt, urb);
  654. cnt++;
  655. if (!ohci->sleeping)
  656. writel (OHCI_BLF, &ohci->regs->cmdstatus); /* start bulk list */
  657. break;
  658. case PIPE_CONTROL:
  659. info = TD_CC | TD_DP_SETUP | TD_T_DATA0;
  660. td_fill (ohci, info, setup, 8, dev, cnt++, urb);
  661. if (data_len > 0) {
  662. info = usb_pipeout (pipe)?
  663. TD_CC | TD_R | TD_DP_OUT | TD_T_DATA1 : TD_CC | TD_R | TD_DP_IN | TD_T_DATA1;
  664. /* NOTE: mishandles transfers >8K, some >4K */
  665. td_fill (ohci, info, data, data_len, dev, cnt++, urb);
  666. }
  667. info = usb_pipeout (pipe)?
  668. TD_CC | TD_DP_IN | TD_T_DATA1: TD_CC | TD_DP_OUT | TD_T_DATA1;
  669. td_fill (ohci, info, data, 0, dev, cnt++, urb);
  670. if (!ohci->sleeping)
  671. writel (OHCI_CLF, &ohci->regs->cmdstatus); /* start Control list */
  672. break;
  673. }
  674. if (urb->length != cnt)
  675. dbg("TD LENGTH %d != CNT %d", urb->length, cnt);
  676. }
  677. /*-------------------------------------------------------------------------*
  678. * Done List handling functions
  679. *-------------------------------------------------------------------------*/
  680. /* calculate the transfer length and update the urb */
  681. static void dl_transfer_length(td_t * td)
  682. {
  683. __u32 tdINFO, tdBE, tdCBP;
  684. urb_priv_t *lurb_priv = &urb_priv;
  685. tdINFO = m32_swap (td->hwINFO);
  686. tdBE = m32_swap (td->hwBE);
  687. tdCBP = m32_swap (td->hwCBP);
  688. if (!(usb_pipetype (lurb_priv->pipe) == PIPE_CONTROL &&
  689. ((td->index == 0) || (td->index == lurb_priv->length - 1)))) {
  690. if (tdBE != 0) {
  691. if (td->hwCBP == 0)
  692. lurb_priv->actual_length += tdBE - td->data + 1;
  693. else
  694. lurb_priv->actual_length += tdCBP - td->data;
  695. }
  696. }
  697. }
  698. /*-------------------------------------------------------------------------*/
  699. /* replies to the request have to be on a FIFO basis so
  700. * we reverse the reversed done-list */
  701. static td_t * dl_reverse_done_list (ohci_t *ohci)
  702. {
  703. __u32 td_list_hc;
  704. td_t *td_rev = NULL;
  705. td_t *td_list = NULL;
  706. urb_priv_t *lurb_priv = NULL;
  707. td_list_hc = m32_swap (ohci->hcca->done_head) & 0xfffffff0;
  708. ohci->hcca->done_head = 0;
  709. while (td_list_hc) {
  710. td_list = (td_t *)td_list_hc;
  711. if (TD_CC_GET (m32_swap (td_list->hwINFO))) {
  712. lurb_priv = &urb_priv;
  713. dbg(" USB-error/status: %x : %p",
  714. TD_CC_GET (m32_swap (td_list->hwINFO)), td_list);
  715. if (td_list->ed->hwHeadP & m32_swap (0x1)) {
  716. if (lurb_priv && ((td_list->index + 1) < lurb_priv->length)) {
  717. td_list->ed->hwHeadP =
  718. (lurb_priv->td[lurb_priv->length - 1]->hwNextTD & m32_swap (0xfffffff0)) |
  719. (td_list->ed->hwHeadP & m32_swap (0x2));
  720. lurb_priv->td_cnt += lurb_priv->length - td_list->index - 1;
  721. } else
  722. td_list->ed->hwHeadP &= m32_swap (0xfffffff2);
  723. }
  724. #ifdef CONFIG_MPC5200
  725. td_list->hwNextTD = 0;
  726. #endif
  727. }
  728. td_list->next_dl_td = td_rev;
  729. td_rev = td_list;
  730. td_list_hc = m32_swap (td_list->hwNextTD) & 0xfffffff0;
  731. }
  732. return td_list;
  733. }
  734. /*-------------------------------------------------------------------------*/
  735. /* td done list */
  736. static int dl_done_list (ohci_t *ohci, td_t *td_list)
  737. {
  738. td_t *td_list_next = NULL;
  739. ed_t *ed;
  740. int cc = 0;
  741. int stat = 0;
  742. /* urb_t *urb; */
  743. urb_priv_t *lurb_priv;
  744. __u32 tdINFO, edHeadP, edTailP;
  745. while (td_list) {
  746. td_list_next = td_list->next_dl_td;
  747. lurb_priv = &urb_priv;
  748. tdINFO = m32_swap (td_list->hwINFO);
  749. ed = td_list->ed;
  750. dl_transfer_length(td_list);
  751. /* error code of transfer */
  752. cc = TD_CC_GET (tdINFO);
  753. if (cc != 0) {
  754. dbg("ConditionCode %#x", cc);
  755. stat = cc_to_error[cc];
  756. }
  757. #ifdef S3C24X0_merge
  758. /* see if this done list makes for all TD's of current URB,
  759. * and mark the URB finished if so */
  760. if (++(lurb_priv->td_cnt) == lurb_priv->length) {
  761. #if 1
  762. if ((ed->state & (ED_OPER | ED_UNLINK)) &&
  763. (lurb_priv->state != URB_DEL))
  764. #else
  765. if ((ed->state & (ED_OPER | ED_UNLINK)))
  766. #endif
  767. urb_finished = 1;
  768. else
  769. dbg("dl_done_list: strange.., ED state %x, ed->state\n");
  770. } else
  771. dbg("dl_done_list: processing TD %x, len %x\n", lurb_priv->td_cnt,
  772. lurb_priv->length);
  773. #endif
  774. if (ed->state != ED_NEW) {
  775. edHeadP = m32_swap (ed->hwHeadP) & 0xfffffff0;
  776. edTailP = m32_swap (ed->hwTailP);
  777. /* unlink eds if they are not busy */
  778. if ((edHeadP == edTailP) && (ed->state == ED_OPER))
  779. ep_unlink (ohci, ed);
  780. }
  781. td_list = td_list_next;
  782. }
  783. return stat;
  784. }
  785. /*-------------------------------------------------------------------------*
  786. * Virtual Root Hub
  787. *-------------------------------------------------------------------------*/
  788. /* Device descriptor */
  789. static __u8 root_hub_dev_des[] =
  790. {
  791. 0x12, /* __u8 bLength; */
  792. 0x01, /* __u8 bDescriptorType; Device */
  793. 0x10, /* __u16 bcdUSB; v1.1 */
  794. 0x01,
  795. 0x09, /* __u8 bDeviceClass; HUB_CLASSCODE */
  796. 0x00, /* __u8 bDeviceSubClass; */
  797. 0x00, /* __u8 bDeviceProtocol; */
  798. 0x08, /* __u8 bMaxPacketSize0; 8 Bytes */
  799. 0x00, /* __u16 idVendor; */
  800. 0x00,
  801. 0x00, /* __u16 idProduct; */
  802. 0x00,
  803. 0x00, /* __u16 bcdDevice; */
  804. 0x00,
  805. 0x00, /* __u8 iManufacturer; */
  806. 0x01, /* __u8 iProduct; */
  807. 0x00, /* __u8 iSerialNumber; */
  808. 0x01 /* __u8 bNumConfigurations; */
  809. };
  810. /* Configuration descriptor */
  811. static __u8 root_hub_config_des[] =
  812. {
  813. 0x09, /* __u8 bLength; */
  814. 0x02, /* __u8 bDescriptorType; Configuration */
  815. 0x19, /* __u16 wTotalLength; */
  816. 0x00,
  817. 0x01, /* __u8 bNumInterfaces; */
  818. 0x01, /* __u8 bConfigurationValue; */
  819. 0x00, /* __u8 iConfiguration; */
  820. 0x40, /* __u8 bmAttributes;
  821. Bit 7: Bus-powered, 6: Self-powered, 5 Remote-wakwup, 4..0: resvd */
  822. 0x00, /* __u8 MaxPower; */
  823. /* interface */
  824. 0x09, /* __u8 if_bLength; */
  825. 0x04, /* __u8 if_bDescriptorType; Interface */
  826. 0x00, /* __u8 if_bInterfaceNumber; */
  827. 0x00, /* __u8 if_bAlternateSetting; */
  828. 0x01, /* __u8 if_bNumEndpoints; */
  829. 0x09, /* __u8 if_bInterfaceClass; HUB_CLASSCODE */
  830. 0x00, /* __u8 if_bInterfaceSubClass; */
  831. 0x00, /* __u8 if_bInterfaceProtocol; */
  832. 0x00, /* __u8 if_iInterface; */
  833. /* endpoint */
  834. 0x07, /* __u8 ep_bLength; */
  835. 0x05, /* __u8 ep_bDescriptorType; Endpoint */
  836. 0x81, /* __u8 ep_bEndpointAddress; IN Endpoint 1 */
  837. 0x03, /* __u8 ep_bmAttributes; Interrupt */
  838. 0x02, /* __u16 ep_wMaxPacketSize; ((MAX_ROOT_PORTS + 1) / 8 */
  839. 0x00,
  840. 0xff /* __u8 ep_bInterval; 255 ms */
  841. };
  842. static unsigned char root_hub_str_index0[] =
  843. {
  844. 0x04, /* __u8 bLength; */
  845. 0x03, /* __u8 bDescriptorType; String-descriptor */
  846. 0x09, /* __u8 lang ID */
  847. 0x04, /* __u8 lang ID */
  848. };
  849. static unsigned char root_hub_str_index1[] =
  850. {
  851. 28, /* __u8 bLength; */
  852. 0x03, /* __u8 bDescriptorType; String-descriptor */
  853. 'O', /* __u8 Unicode */
  854. 0, /* __u8 Unicode */
  855. 'H', /* __u8 Unicode */
  856. 0, /* __u8 Unicode */
  857. 'C', /* __u8 Unicode */
  858. 0, /* __u8 Unicode */
  859. 'I', /* __u8 Unicode */
  860. 0, /* __u8 Unicode */
  861. ' ', /* __u8 Unicode */
  862. 0, /* __u8 Unicode */
  863. 'R', /* __u8 Unicode */
  864. 0, /* __u8 Unicode */
  865. 'o', /* __u8 Unicode */
  866. 0, /* __u8 Unicode */
  867. 'o', /* __u8 Unicode */
  868. 0, /* __u8 Unicode */
  869. 't', /* __u8 Unicode */
  870. 0, /* __u8 Unicode */
  871. ' ', /* __u8 Unicode */
  872. 0, /* __u8 Unicode */
  873. 'H', /* __u8 Unicode */
  874. 0, /* __u8 Unicode */
  875. 'u', /* __u8 Unicode */
  876. 0, /* __u8 Unicode */
  877. 'b', /* __u8 Unicode */
  878. 0, /* __u8 Unicode */
  879. };
  880. /* Hub class-specific descriptor is constructed dynamically */
  881. /*-------------------------------------------------------------------------*/
  882. #define OK(x) len = (x); break
  883. #ifdef DEBUG
  884. #define WR_RH_STAT(x) {info("WR:status %#8x", (x));writel((x), &gohci.regs->roothub.status);}
  885. #define WR_RH_PORTSTAT(x) {info("WR:portstatus[%d] %#8x", wIndex-1, (x));writel((x), &gohci.regs->roothub.portstatus[wIndex-1]);}
  886. #else
  887. #define WR_RH_STAT(x) writel((x), &gohci.regs->roothub.status)
  888. #define WR_RH_PORTSTAT(x) writel((x), &gohci.regs->roothub.portstatus[wIndex-1])
  889. #endif
  890. #define RD_RH_STAT roothub_status(&gohci)
  891. #define RD_RH_PORTSTAT roothub_portstatus(&gohci,wIndex-1)
  892. /* request to virtual root hub */
  893. int rh_check_port_status(ohci_t *controller)
  894. {
  895. __u32 temp, ndp, i;
  896. int res;
  897. res = -1;
  898. temp = roothub_a (controller);
  899. ndp = (temp & RH_A_NDP);
  900. #ifdef CONFIG_AT91C_PQFP_UHPBUG
  901. ndp = (ndp == 2) ? 1:0;
  902. #endif
  903. for (i = 0; i < ndp; i++) {
  904. temp = roothub_portstatus (controller, i);
  905. /* check for a device disconnect */
  906. if (((temp & (RH_PS_PESC | RH_PS_CSC)) ==
  907. (RH_PS_PESC | RH_PS_CSC)) &&
  908. ((temp & RH_PS_CCS) == 0)) {
  909. res = i;
  910. break;
  911. }
  912. }
  913. return res;
  914. }
  915. static int ohci_submit_rh_msg(struct usb_device *dev, unsigned long pipe,
  916. void *buffer, int transfer_len, struct devrequest *cmd)
  917. {
  918. void * data = buffer;
  919. int leni = transfer_len;
  920. int len = 0;
  921. int stat = 0;
  922. __u32 datab[4];
  923. __u8 *data_buf = (__u8 *)datab;
  924. __u16 bmRType_bReq;
  925. __u16 wValue;
  926. __u16 wIndex;
  927. __u16 wLength;
  928. #ifdef DEBUG
  929. urb_priv.actual_length = 0;
  930. pkt_print(dev, pipe, buffer, transfer_len, cmd, "SUB(rh)", usb_pipein(pipe));
  931. #else
  932. wait_ms(1);
  933. #endif
  934. if ((pipe & PIPE_INTERRUPT) == PIPE_INTERRUPT) {
  935. info("Root-Hub submit IRQ: NOT implemented");
  936. return 0;
  937. }
  938. bmRType_bReq = cmd->requesttype | (cmd->request << 8);
  939. #if defined(CONFIG_440EP) || defined(CONFIG_MPC5200)
  940. wValue = __swap_16(cmd->value);
  941. wIndex = __swap_16(cmd->index);
  942. wLength = __swap_16(cmd->length);
  943. #else
  944. wValue = m16_swap (cmd->value);
  945. wIndex = m16_swap (cmd->index);
  946. wLength = m16_swap (cmd->length);
  947. #endif /* CONFIG_440EP || CONFIG_MPC5200 */
  948. info("Root-Hub: adr: %2x cmd(%1x): %08x %04x %04x %04x",
  949. dev->devnum, 8, bmRType_bReq, wValue, wIndex, wLength);
  950. switch (bmRType_bReq) {
  951. /* Request Destination:
  952. without flags: Device,
  953. RH_INTERFACE: interface,
  954. RH_ENDPOINT: endpoint,
  955. RH_CLASS means HUB here,
  956. RH_OTHER | RH_CLASS almost ever means HUB_PORT here
  957. */
  958. #if defined(CONFIG_440EP) || defined(CONFIG_MPC5200)
  959. case RH_GET_STATUS:
  960. *(__u16 *) data_buf = __swap_16(1); OK (2);
  961. case RH_GET_STATUS | RH_INTERFACE:
  962. *(__u16 *) data_buf = __swap_16(0); OK (2);
  963. case RH_GET_STATUS | RH_ENDPOINT:
  964. *(__u16 *) data_buf = __swap_16(0); OK (2);
  965. case RH_GET_STATUS | RH_CLASS:
  966. *(__u32 *) data_buf = __swap_32(
  967. RD_RH_STAT & ~(RH_HS_CRWE | RH_HS_DRWE));
  968. OK (4);
  969. case RH_GET_STATUS | RH_OTHER | RH_CLASS:
  970. *(__u32 *) data_buf = __swap_32(RD_RH_PORTSTAT); OK (4);
  971. #else
  972. case RH_GET_STATUS:
  973. *(__u16 *) data_buf = m16_swap (1); OK (2);
  974. case RH_GET_STATUS | RH_INTERFACE:
  975. *(__u16 *) data_buf = m16_swap (0); OK (2);
  976. case RH_GET_STATUS | RH_ENDPOINT:
  977. *(__u16 *) data_buf = m16_swap (0); OK (2);
  978. case RH_GET_STATUS | RH_CLASS:
  979. *(__u32 *) data_buf = m32_swap (
  980. RD_RH_STAT & ~(RH_HS_CRWE | RH_HS_DRWE));
  981. OK (4);
  982. case RH_GET_STATUS | RH_OTHER | RH_CLASS:
  983. *(__u32 *) data_buf = m32_swap (RD_RH_PORTSTAT); OK (4);
  984. #endif /* CONFIG_440EP || CONFIG_MPC5200 */
  985. case RH_CLEAR_FEATURE | RH_ENDPOINT:
  986. switch (wValue) {
  987. case (RH_ENDPOINT_STALL): OK (0);
  988. }
  989. break;
  990. case RH_CLEAR_FEATURE | RH_CLASS:
  991. switch (wValue) {
  992. case RH_C_HUB_LOCAL_POWER:
  993. OK(0);
  994. case (RH_C_HUB_OVER_CURRENT):
  995. WR_RH_STAT(RH_HS_OCIC); OK (0);
  996. }
  997. break;
  998. case RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS:
  999. switch (wValue) {
  1000. case (RH_PORT_ENABLE):
  1001. WR_RH_PORTSTAT (RH_PS_CCS ); OK (0);
  1002. case (RH_PORT_SUSPEND):
  1003. WR_RH_PORTSTAT (RH_PS_POCI); OK (0);
  1004. case (RH_PORT_POWER):
  1005. WR_RH_PORTSTAT (RH_PS_LSDA); OK (0);
  1006. case (RH_C_PORT_CONNECTION):
  1007. WR_RH_PORTSTAT (RH_PS_CSC ); OK (0);
  1008. case (RH_C_PORT_ENABLE):
  1009. WR_RH_PORTSTAT (RH_PS_PESC); OK (0);
  1010. case (RH_C_PORT_SUSPEND):
  1011. WR_RH_PORTSTAT (RH_PS_PSSC); OK (0);
  1012. case (RH_C_PORT_OVER_CURRENT):
  1013. WR_RH_PORTSTAT (RH_PS_OCIC); OK (0);
  1014. case (RH_C_PORT_RESET):
  1015. WR_RH_PORTSTAT (RH_PS_PRSC); OK (0);
  1016. }
  1017. break;
  1018. case RH_SET_FEATURE | RH_OTHER | RH_CLASS:
  1019. switch (wValue) {
  1020. case (RH_PORT_SUSPEND):
  1021. WR_RH_PORTSTAT (RH_PS_PSS ); OK (0);
  1022. case (RH_PORT_RESET): /* BUG IN HUP CODE *********/
  1023. if (RD_RH_PORTSTAT & RH_PS_CCS)
  1024. WR_RH_PORTSTAT (RH_PS_PRS);
  1025. OK (0);
  1026. case (RH_PORT_POWER):
  1027. WR_RH_PORTSTAT (RH_PS_PPS ); OK (0);
  1028. case (RH_PORT_ENABLE): /* BUG IN HUP CODE *********/
  1029. if (RD_RH_PORTSTAT & RH_PS_CCS)
  1030. WR_RH_PORTSTAT (RH_PS_PES );
  1031. OK (0);
  1032. }
  1033. break;
  1034. case RH_SET_ADDRESS: gohci.rh.devnum = wValue; OK(0);
  1035. case RH_GET_DESCRIPTOR:
  1036. switch ((wValue & 0xff00) >> 8) {
  1037. case (0x01): /* device descriptor */
  1038. len = min_t(unsigned int,
  1039. leni,
  1040. min_t(unsigned int,
  1041. sizeof (root_hub_dev_des),
  1042. wLength));
  1043. data_buf = root_hub_dev_des; OK(len);
  1044. case (0x02): /* configuration descriptor */
  1045. len = min_t(unsigned int,
  1046. leni,
  1047. min_t(unsigned int,
  1048. sizeof (root_hub_config_des),
  1049. wLength));
  1050. data_buf = root_hub_config_des; OK(len);
  1051. case (0x03): /* string descriptors */
  1052. if(wValue==0x0300) {
  1053. len = min_t(unsigned int,
  1054. leni,
  1055. min_t(unsigned int,
  1056. sizeof (root_hub_str_index0),
  1057. wLength));
  1058. data_buf = root_hub_str_index0;
  1059. OK(len);
  1060. }
  1061. if(wValue==0x0301) {
  1062. len = min_t(unsigned int,
  1063. leni,
  1064. min_t(unsigned int,
  1065. sizeof (root_hub_str_index1),
  1066. wLength));
  1067. data_buf = root_hub_str_index1;
  1068. OK(len);
  1069. }
  1070. default:
  1071. stat = USB_ST_STALLED;
  1072. }
  1073. break;
  1074. case RH_GET_DESCRIPTOR | RH_CLASS:
  1075. {
  1076. __u32 temp = roothub_a (&gohci);
  1077. data_buf [0] = 9; /* min length; */
  1078. data_buf [1] = 0x29;
  1079. data_buf [2] = temp & RH_A_NDP;
  1080. #ifdef CONFIG_AT91C_PQFP_UHPBUG
  1081. data_buf [2] = (data_buf [2] == 2) ? 1:0;
  1082. #endif
  1083. data_buf [3] = 0;
  1084. if (temp & RH_A_PSM) /* per-port power switching? */
  1085. data_buf [3] |= 0x1;
  1086. if (temp & RH_A_NOCP) /* no overcurrent reporting? */
  1087. data_buf [3] |= 0x10;
  1088. else if (temp & RH_A_OCPM) /* per-port overcurrent reporting? */
  1089. data_buf [3] |= 0x8;
  1090. /* corresponds to data_buf[4-7] */
  1091. datab [1] = 0;
  1092. data_buf [5] = (temp & RH_A_POTPGT) >> 24;
  1093. temp = roothub_b (&gohci);
  1094. data_buf [7] = temp & RH_B_DR;
  1095. if (data_buf [2] < 7) {
  1096. data_buf [8] = 0xff;
  1097. } else {
  1098. data_buf [0] += 2;
  1099. data_buf [8] = (temp & RH_B_DR) >> 8;
  1100. data_buf [10] = data_buf [9] = 0xff;
  1101. }
  1102. len = min_t(unsigned int, leni,
  1103. min_t(unsigned int, data_buf [0], wLength));
  1104. OK (len);
  1105. }
  1106. case RH_GET_CONFIGURATION: *(__u8 *) data_buf = 0x01; OK (1);
  1107. case RH_SET_CONFIGURATION: WR_RH_STAT (0x10000); OK (0);
  1108. default:
  1109. dbg ("unsupported root hub command");
  1110. stat = USB_ST_STALLED;
  1111. }
  1112. #ifdef DEBUG
  1113. ohci_dump_roothub (&gohci, 1);
  1114. #else
  1115. wait_ms(1);
  1116. #endif
  1117. len = min_t(int, len, leni);
  1118. if (data != data_buf)
  1119. memcpy (data, data_buf, len);
  1120. dev->act_len = len;
  1121. dev->status = stat;
  1122. #ifdef DEBUG
  1123. if (transfer_len)
  1124. urb_priv.actual_length = transfer_len;
  1125. pkt_print(dev, pipe, buffer, transfer_len, cmd, "RET(rh)", 0/*usb_pipein(pipe)*/);
  1126. #else
  1127. wait_ms(1);
  1128. #endif
  1129. return stat;
  1130. }
  1131. /*-------------------------------------------------------------------------*/
  1132. /* common code for handling submit messages - used for all but root hub */
  1133. /* accesses. */
  1134. int submit_common_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
  1135. int transfer_len, struct devrequest *setup, int interval)
  1136. {
  1137. int stat = 0;
  1138. int maxsize = usb_maxpacket(dev, pipe);
  1139. int timeout;
  1140. /* device pulled? Shortcut the action. */
  1141. if (devgone == dev) {
  1142. dev->status = USB_ST_CRC_ERR;
  1143. return 0;
  1144. }
  1145. #ifdef DEBUG
  1146. urb_priv.actual_length = 0;
  1147. pkt_print(dev, pipe, buffer, transfer_len, setup, "SUB", usb_pipein(pipe));
  1148. #else
  1149. wait_ms(1);
  1150. #endif
  1151. if (!maxsize) {
  1152. err("submit_common_message: pipesize for pipe %lx is zero",
  1153. pipe);
  1154. return -1;
  1155. }
  1156. if (sohci_submit_job(dev, pipe, buffer, transfer_len, setup, interval) < 0) {
  1157. err("sohci_submit_job failed");
  1158. return -1;
  1159. }
  1160. #if 0
  1161. wait_ms(10);
  1162. /* ohci_dump_status(&gohci); */
  1163. #endif
  1164. /* allow more time for a BULK device to react - some are slow */
  1165. #define BULK_TO 5000 /* timeout in milliseconds */
  1166. if (usb_pipetype (pipe) == PIPE_BULK)
  1167. timeout = BULK_TO;
  1168. else
  1169. timeout = 100;
  1170. /* wait for it to complete */
  1171. for (;;) {
  1172. /* check whether the controller is done */
  1173. stat = hc_interrupt();
  1174. if (stat < 0) {
  1175. stat = USB_ST_CRC_ERR;
  1176. break;
  1177. }
  1178. #ifdef S3C24X0_merge
  1179. /* NOTE: since we are not interrupt driven in U-Boot and always
  1180. * handle only one URB at a time, we cannot assume the
  1181. * transaction finished on the first successful return from
  1182. * hc_interrupt().. unless the flag for current URB is set,
  1183. * meaning that all TD's to/from device got actually
  1184. * transferred and processed. If the current URB is not
  1185. * finished we need to re-iterate this loop so as
  1186. * hc_interrupt() gets called again as there needs to be some
  1187. * more TD's to process still */
  1188. if ((stat >= 0) && (stat != 0xff) && (urb_finished)) {
  1189. #else
  1190. if (stat >= 0 && stat != 0xff) {
  1191. #endif
  1192. /* 0xff is returned for an SF-interrupt */
  1193. break;
  1194. }
  1195. if (--timeout) {
  1196. wait_ms(1);
  1197. } else {
  1198. err("CTL:TIMEOUT ");
  1199. #ifdef S3C24X0_merge
  1200. dbg("submit_common_msg: TO status %x\n", stat);
  1201. stat = USB_ST_CRC_ERR;
  1202. urb_finished = 1;
  1203. #endif
  1204. stat = USB_ST_CRC_ERR;
  1205. break;
  1206. }
  1207. }
  1208. #ifndef S3C24X0_merge
  1209. /* we got an Root Hub Status Change interrupt */
  1210. if (got_rhsc) {
  1211. #ifdef DEBUG
  1212. ohci_dump_roothub (&gohci, 1);
  1213. #endif
  1214. got_rhsc = 0;
  1215. /* abuse timeout */
  1216. timeout = rh_check_port_status(&gohci);
  1217. if (timeout >= 0) {
  1218. #if 0 /* this does nothing useful, but leave it here in case that changes */
  1219. /* the called routine adds 1 to the passed value */
  1220. usb_hub_port_connect_change(gohci.rh.dev, timeout - 1);
  1221. #endif
  1222. /*
  1223. * XXX
  1224. * This is potentially dangerous because it assumes
  1225. * that only one device is ever plugged in!
  1226. */
  1227. devgone = dev;
  1228. }
  1229. }
  1230. #endif /* S3C24X0_merge */
  1231. dev->status = stat;
  1232. dev->act_len = transfer_len;
  1233. #ifdef DEBUG
  1234. pkt_print(dev, pipe, buffer, transfer_len, setup, "RET(ctlr)", usb_pipein(pipe));
  1235. #else
  1236. wait_ms(1);
  1237. #endif
  1238. /* free TDs in urb_priv */
  1239. urb_free_priv (&urb_priv);
  1240. return 0;
  1241. }
  1242. /* submit routines called from usb.c */
  1243. int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
  1244. int transfer_len)
  1245. {
  1246. info("submit_bulk_msg");
  1247. return submit_common_msg(dev, pipe, buffer, transfer_len, NULL, 0);
  1248. }
  1249. int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
  1250. int transfer_len, struct devrequest *setup)
  1251. {
  1252. int maxsize = usb_maxpacket(dev, pipe);
  1253. info("submit_control_msg");
  1254. #ifdef DEBUG
  1255. urb_priv.actual_length = 0;
  1256. pkt_print(dev, pipe, buffer, transfer_len, setup, "SUB", usb_pipein(pipe));
  1257. #else
  1258. wait_ms(1);
  1259. #endif
  1260. if (!maxsize) {
  1261. err("submit_control_message: pipesize for pipe %lx is zero",
  1262. pipe);
  1263. return -1;
  1264. }
  1265. if (((pipe >> 8) & 0x7f) == gohci.rh.devnum) {
  1266. gohci.rh.dev = dev;
  1267. /* root hub - redirect */
  1268. return ohci_submit_rh_msg(dev, pipe, buffer, transfer_len,
  1269. setup);
  1270. }
  1271. return submit_common_msg(dev, pipe, buffer, transfer_len, setup, 0);
  1272. }
  1273. int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
  1274. int transfer_len, int interval)
  1275. {
  1276. info("submit_int_msg");
  1277. return -1;
  1278. }
  1279. /*-------------------------------------------------------------------------*
  1280. * HC functions
  1281. *-------------------------------------------------------------------------*/
  1282. /* reset the HC and BUS */
  1283. static int hc_reset (ohci_t *ohci)
  1284. {
  1285. int timeout = 30;
  1286. int smm_timeout = 50; /* 0,5 sec */
  1287. dbg("%s\n", __FUNCTION__);
  1288. if (readl (&ohci->regs->control) & OHCI_CTRL_IR) { /* SMM owns the HC */
  1289. writel (OHCI_OCR, &ohci->regs->cmdstatus); /* request ownership */
  1290. info("USB HC TakeOver from SMM");
  1291. while (readl (&ohci->regs->control) & OHCI_CTRL_IR) {
  1292. wait_ms (10);
  1293. if (--smm_timeout == 0) {
  1294. err("USB HC TakeOver failed!");
  1295. return -1;
  1296. }
  1297. }
  1298. }
  1299. /* Disable HC interrupts */
  1300. writel (OHCI_INTR_MIE, &ohci->regs->intrdisable);
  1301. dbg("USB HC reset_hc usb-%s: ctrl = 0x%X ;\n",
  1302. ohci->slot_name,
  1303. readl(&ohci->regs->control));
  1304. /* Reset USB (needed by some controllers) */
  1305. ohci->hc_control = 0;
  1306. writel (ohci->hc_control, &ohci->regs->control);
  1307. /* HC Reset requires max 10 us delay */
  1308. writel (OHCI_HCR, &ohci->regs->cmdstatus);
  1309. while ((readl (&ohci->regs->cmdstatus) & OHCI_HCR) != 0) {
  1310. if (--timeout == 0) {
  1311. err("USB HC reset timed out!");
  1312. return -1;
  1313. }
  1314. udelay (1);
  1315. }
  1316. return 0;
  1317. }
  1318. /*-------------------------------------------------------------------------*/
  1319. /* Start an OHCI controller, set the BUS operational
  1320. * enable interrupts
  1321. * connect the virtual root hub */
  1322. static int hc_start (ohci_t * ohci)
  1323. {
  1324. __u32 mask;
  1325. unsigned int fminterval;
  1326. ohci->disabled = 1;
  1327. /* Tell the controller where the control and bulk lists are
  1328. * The lists are empty now. */
  1329. writel (0, &ohci->regs->ed_controlhead);
  1330. writel (0, &ohci->regs->ed_bulkhead);
  1331. writel ((__u32)ohci->hcca, &ohci->regs->hcca); /* a reset clears this */
  1332. fminterval = 0x2edf;
  1333. writel ((fminterval * 9) / 10, &ohci->regs->periodicstart);
  1334. fminterval |= ((((fminterval - 210) * 6) / 7) << 16);
  1335. writel (fminterval, &ohci->regs->fminterval);
  1336. writel (0x628, &ohci->regs->lsthresh);
  1337. /* start controller operations */
  1338. ohci->hc_control = OHCI_CONTROL_INIT | OHCI_USB_OPER;
  1339. ohci->disabled = 0;
  1340. writel (ohci->hc_control, &ohci->regs->control);
  1341. /* disable all interrupts */
  1342. mask = (OHCI_INTR_SO | OHCI_INTR_WDH | OHCI_INTR_SF | OHCI_INTR_RD |
  1343. OHCI_INTR_UE | OHCI_INTR_FNO | OHCI_INTR_RHSC |
  1344. OHCI_INTR_OC | OHCI_INTR_MIE);
  1345. writel (mask, &ohci->regs->intrdisable);
  1346. /* clear all interrupts */
  1347. mask &= ~OHCI_INTR_MIE;
  1348. writel (mask, &ohci->regs->intrstatus);
  1349. /* Choose the interrupts we care about now - but w/o MIE */
  1350. mask = OHCI_INTR_RHSC | OHCI_INTR_UE | OHCI_INTR_WDH | OHCI_INTR_SO;
  1351. writel (mask, &ohci->regs->intrenable);
  1352. #ifdef OHCI_USE_NPS
  1353. /* required for AMD-756 and some Mac platforms */
  1354. writel ((roothub_a (ohci) | RH_A_NPS) & ~RH_A_PSM,
  1355. &ohci->regs->roothub.a);
  1356. writel (RH_HS_LPSC, &ohci->regs->roothub.status);
  1357. #endif /* OHCI_USE_NPS */
  1358. #define mdelay(n) ({unsigned long msec=(n); while (msec--) udelay(1000);})
  1359. /* POTPGT delay is bits 24-31, in 2 ms units. */
  1360. mdelay ((roothub_a (ohci) >> 23) & 0x1fe);
  1361. /* connect the virtual root hub */
  1362. ohci->rh.devnum = 0;
  1363. return 0;
  1364. }
  1365. /*-------------------------------------------------------------------------*/
  1366. /* an interrupt happens */
  1367. static int hc_interrupt (void)
  1368. {
  1369. ohci_t *ohci = &gohci;
  1370. struct ohci_regs *regs = ohci->regs;
  1371. int ints;
  1372. int stat = -1;
  1373. #ifdef S3C24X0_merge
  1374. if ((ohci->hcca->done_head != 0) &&
  1375. !(m32_swap (ohci->hcca->done_head) & 0x01)) {
  1376. ints = OHCI_INTR_WDH;
  1377. } else if ((ints = readl (&regs->intrstatus)) == ~(u32)0) {
  1378. ohci->disabled++;
  1379. err ("%s device removed!", ohci->slot_name);
  1380. return -1;
  1381. } else if ((ints &= readl (&regs->intrenable)) == 0) {
  1382. dbg("hc_interrupt: returning..\n");
  1383. return 0xff;
  1384. }
  1385. #else
  1386. if ((ohci->hcca->done_head != 0) && !(m32_swap (ohci->hcca->done_head) & 0x01)) {
  1387. ints = OHCI_INTR_WDH;
  1388. } else {
  1389. ints = readl (&regs->intrstatus);
  1390. }
  1391. #endif
  1392. /* dbg("Interrupt: %x frame: %x", ints, le16_to_cpu (ohci->hcca->frame_no)); */
  1393. if (ints & OHCI_INTR_RHSC) {
  1394. got_rhsc = 1;
  1395. #ifdef S3C24X0_merge
  1396. stat = 0xff;
  1397. #endif
  1398. }
  1399. if (ints & OHCI_INTR_UE) {
  1400. ohci->disabled++;
  1401. err ("OHCI Unrecoverable Error, controller usb-%s disabled",
  1402. ohci->slot_name);
  1403. /* e.g. due to PCI Master/Target Abort */
  1404. #ifdef DEBUG
  1405. ohci_dump (ohci, 1);
  1406. #else
  1407. wait_ms(1);
  1408. #endif
  1409. /* FIXME: be optimistic, hope that bug won't repeat often. */
  1410. /* Make some non-interrupt context restart the controller. */
  1411. /* Count and limit the retries though; either hardware or */
  1412. /* software errors can go forever... */
  1413. hc_reset (ohci);
  1414. return -1;
  1415. }
  1416. if (ints & OHCI_INTR_WDH) {
  1417. wait_ms(1);
  1418. writel (OHCI_INTR_WDH, &regs->intrdisable);
  1419. stat = dl_done_list (&gohci, dl_reverse_done_list (&gohci));
  1420. writel (OHCI_INTR_WDH, &regs->intrenable);
  1421. }
  1422. if (ints & OHCI_INTR_SO) {
  1423. dbg("USB Schedule overrun\n");
  1424. writel (OHCI_INTR_SO, &regs->intrenable);
  1425. stat = -1;
  1426. }
  1427. /* FIXME: this assumes SOF (1/ms) interrupts don't get lost... */
  1428. if (ints & OHCI_INTR_SF) {
  1429. unsigned int frame = m16_swap (ohci->hcca->frame_no) & 1;
  1430. wait_ms(1);
  1431. writel (OHCI_INTR_SF, &regs->intrdisable);
  1432. if (ohci->ed_rm_list[frame] != NULL)
  1433. writel (OHCI_INTR_SF, &regs->intrenable);
  1434. stat = 0xff;
  1435. }
  1436. writel (ints, &regs->intrstatus);
  1437. return stat;
  1438. }
  1439. /*-------------------------------------------------------------------------*/
  1440. /*-------------------------------------------------------------------------*/
  1441. /* De-allocate all resources.. */
  1442. static void hc_release_ohci (ohci_t *ohci)
  1443. {
  1444. dbg ("USB HC release ohci usb-%s", ohci->slot_name);
  1445. if (!ohci->disabled)
  1446. hc_reset (ohci);
  1447. }
  1448. /*-------------------------------------------------------------------------*/
  1449. /*
  1450. * low level initalisation routine, called from usb.c
  1451. */
  1452. static char ohci_inited = 0;
  1453. int usb_lowlevel_init(void)
  1454. {
  1455. #ifdef CFG_USB_OHCI_CPU_INIT
  1456. /* cpu dependant init */
  1457. if(usb_cpu_init())
  1458. return -1;
  1459. #endif
  1460. #ifdef CFG_USB_OHCI_BOARD_INIT
  1461. /* board dependant init */
  1462. if(usb_board_init())
  1463. return -1;
  1464. #endif
  1465. memset (&gohci, 0, sizeof (ohci_t));
  1466. memset (&urb_priv, 0, sizeof (urb_priv_t));
  1467. /* align the storage */
  1468. if ((__u32)&ghcca[0] & 0xff) {
  1469. err("HCCA not aligned!!");
  1470. return -1;
  1471. }
  1472. phcca = &ghcca[0];
  1473. info("aligned ghcca %p", phcca);
  1474. memset(&ohci_dev, 0, sizeof(struct ohci_device));
  1475. if ((__u32)&ohci_dev.ed[0] & 0x7) {
  1476. err("EDs not aligned!!");
  1477. return -1;
  1478. }
  1479. memset(gtd, 0, sizeof(td_t) * (NUM_TD + 1));
  1480. if ((__u32)gtd & 0x7) {
  1481. err("TDs not aligned!!");
  1482. return -1;
  1483. }
  1484. ptd = gtd;
  1485. gohci.hcca = phcca;
  1486. memset (phcca, 0, sizeof (struct ohci_hcca));
  1487. gohci.disabled = 1;
  1488. gohci.sleeping = 0;
  1489. gohci.irq = -1;
  1490. gohci.regs = (struct ohci_regs *)CFG_USB_OHCI_REGS_BASE;
  1491. gohci.flags = 0;
  1492. gohci.slot_name = CFG_USB_OHCI_SLOT_NAME;
  1493. if (hc_reset (&gohci) < 0) {
  1494. hc_release_ohci (&gohci);
  1495. err ("can't reset usb-%s", gohci.slot_name);
  1496. #ifdef CFG_USB_OHCI_BOARD_INIT
  1497. /* board dependant cleanup */
  1498. usb_board_init_fail();
  1499. #endif
  1500. #ifdef CFG_USB_OHCI_CPU_INIT
  1501. /* cpu dependant cleanup */
  1502. usb_cpu_init_fail();
  1503. #endif
  1504. return -1;
  1505. }
  1506. /* FIXME this is a second HC reset; why?? */
  1507. /* writel(gohci.hc_control = OHCI_USB_RESET, &gohci.regs->control);
  1508. wait_ms(10); */
  1509. if (hc_start (&gohci) < 0) {
  1510. err ("can't start usb-%s", gohci.slot_name);
  1511. hc_release_ohci (&gohci);
  1512. /* Initialization failed */
  1513. #ifdef CFG_USB_OHCI_BOARD_INIT
  1514. /* board dependant cleanup */
  1515. usb_board_stop();
  1516. #endif
  1517. #ifdef CFG_USB_OHCI_CPU_INIT
  1518. /* cpu dependant cleanup */
  1519. usb_cpu_stop();
  1520. #endif
  1521. return -1;
  1522. }
  1523. #ifdef DEBUG
  1524. ohci_dump (&gohci, 1);
  1525. #else
  1526. wait_ms(1);
  1527. # ifdef S3C24X0_merge
  1528. urb_finished = 1;
  1529. # endif
  1530. #endif
  1531. ohci_inited = 1;
  1532. return 0;
  1533. }
  1534. int usb_lowlevel_stop(void)
  1535. {
  1536. /* this gets called really early - before the controller has */
  1537. /* even been initialized! */
  1538. if (!ohci_inited)
  1539. return 0;
  1540. /* TODO release any interrupts, etc. */
  1541. /* call hc_release_ohci() here ? */
  1542. hc_reset (&gohci);
  1543. #ifdef CFG_USB_OHCI_BOARD_INIT
  1544. /* board dependant cleanup */
  1545. if(usb_board_stop())
  1546. return -1;
  1547. #endif
  1548. #ifdef CFG_USB_OHCI_CPU_INIT
  1549. /* cpu dependant cleanup */
  1550. if(usb_cpu_stop())
  1551. return -1;
  1552. #endif
  1553. return 0;
  1554. }
  1555. #endif /* CONFIG_USB_OHCI_NEW */