macb.c 15 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589
  1. /*
  2. * Copyright (C) 2005-2006 Atmel Corporation
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License as published by
  6. * the Free Software Foundation; either version 2 of the License, or
  7. * (at your option) any later version.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. * GNU General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software
  16. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  17. */
  18. #include <common.h>
  19. /*
  20. * The u-boot networking stack is a little weird. It seems like the
  21. * networking core allocates receive buffers up front without any
  22. * regard to the hardware that's supposed to actually receive those
  23. * packets.
  24. *
  25. * The MACB receives packets into 128-byte receive buffers, so the
  26. * buffers allocated by the core isn't very practical to use. We'll
  27. * allocate our own, but we need one such buffer in case a packet
  28. * wraps around the DMA ring so that we have to copy it.
  29. *
  30. * Therefore, define CONFIG_SYS_RX_ETH_BUFFER to 1 in the board-specific
  31. * configuration header. This way, the core allocates one RX buffer
  32. * and one TX buffer, each of which can hold a ethernet packet of
  33. * maximum size.
  34. *
  35. * For some reason, the networking core unconditionally specifies a
  36. * 32-byte packet "alignment" (which really should be called
  37. * "padding"). MACB shouldn't need that, but we'll refrain from any
  38. * core modifications here...
  39. */
  40. #include <net.h>
  41. #include <netdev.h>
  42. #include <malloc.h>
  43. #include <miiphy.h>
  44. #include <linux/mii.h>
  45. #include <asm/io.h>
  46. #include <asm/dma-mapping.h>
  47. #include <asm/arch/clk.h>
  48. #include "macb.h"
  49. #define barrier() asm volatile("" ::: "memory")
  50. #define CONFIG_SYS_MACB_RX_BUFFER_SIZE 4096
  51. #define CONFIG_SYS_MACB_RX_RING_SIZE (CONFIG_SYS_MACB_RX_BUFFER_SIZE / 128)
  52. #define CONFIG_SYS_MACB_TX_RING_SIZE 16
  53. #define CONFIG_SYS_MACB_TX_TIMEOUT 1000
  54. #define CONFIG_SYS_MACB_AUTONEG_TIMEOUT 5000000
  55. struct macb_dma_desc {
  56. u32 addr;
  57. u32 ctrl;
  58. };
  59. #define RXADDR_USED 0x00000001
  60. #define RXADDR_WRAP 0x00000002
  61. #define RXBUF_FRMLEN_MASK 0x00000fff
  62. #define RXBUF_FRAME_START 0x00004000
  63. #define RXBUF_FRAME_END 0x00008000
  64. #define RXBUF_TYPEID_MATCH 0x00400000
  65. #define RXBUF_ADDR4_MATCH 0x00800000
  66. #define RXBUF_ADDR3_MATCH 0x01000000
  67. #define RXBUF_ADDR2_MATCH 0x02000000
  68. #define RXBUF_ADDR1_MATCH 0x04000000
  69. #define RXBUF_BROADCAST 0x80000000
  70. #define TXBUF_FRMLEN_MASK 0x000007ff
  71. #define TXBUF_FRAME_END 0x00008000
  72. #define TXBUF_NOCRC 0x00010000
  73. #define TXBUF_EXHAUSTED 0x08000000
  74. #define TXBUF_UNDERRUN 0x10000000
  75. #define TXBUF_MAXRETRY 0x20000000
  76. #define TXBUF_WRAP 0x40000000
  77. #define TXBUF_USED 0x80000000
  78. struct macb_device {
  79. void *regs;
  80. unsigned int rx_tail;
  81. unsigned int tx_head;
  82. unsigned int tx_tail;
  83. void *rx_buffer;
  84. void *tx_buffer;
  85. struct macb_dma_desc *rx_ring;
  86. struct macb_dma_desc *tx_ring;
  87. unsigned long rx_buffer_dma;
  88. unsigned long rx_ring_dma;
  89. unsigned long tx_ring_dma;
  90. const struct device *dev;
  91. struct eth_device netdev;
  92. unsigned short phy_addr;
  93. };
  94. #define to_macb(_nd) container_of(_nd, struct macb_device, netdev)
  95. static void macb_mdio_write(struct macb_device *macb, u8 reg, u16 value)
  96. {
  97. unsigned long netctl;
  98. unsigned long netstat;
  99. unsigned long frame;
  100. netctl = macb_readl(macb, NCR);
  101. netctl |= MACB_BIT(MPE);
  102. macb_writel(macb, NCR, netctl);
  103. frame = (MACB_BF(SOF, 1)
  104. | MACB_BF(RW, 1)
  105. | MACB_BF(PHYA, macb->phy_addr)
  106. | MACB_BF(REGA, reg)
  107. | MACB_BF(CODE, 2)
  108. | MACB_BF(DATA, value));
  109. macb_writel(macb, MAN, frame);
  110. do {
  111. netstat = macb_readl(macb, NSR);
  112. } while (!(netstat & MACB_BIT(IDLE)));
  113. netctl = macb_readl(macb, NCR);
  114. netctl &= ~MACB_BIT(MPE);
  115. macb_writel(macb, NCR, netctl);
  116. }
  117. static u16 macb_mdio_read(struct macb_device *macb, u8 reg)
  118. {
  119. unsigned long netctl;
  120. unsigned long netstat;
  121. unsigned long frame;
  122. netctl = macb_readl(macb, NCR);
  123. netctl |= MACB_BIT(MPE);
  124. macb_writel(macb, NCR, netctl);
  125. frame = (MACB_BF(SOF, 1)
  126. | MACB_BF(RW, 2)
  127. | MACB_BF(PHYA, macb->phy_addr)
  128. | MACB_BF(REGA, reg)
  129. | MACB_BF(CODE, 2));
  130. macb_writel(macb, MAN, frame);
  131. do {
  132. netstat = macb_readl(macb, NSR);
  133. } while (!(netstat & MACB_BIT(IDLE)));
  134. frame = macb_readl(macb, MAN);
  135. netctl = macb_readl(macb, NCR);
  136. netctl &= ~MACB_BIT(MPE);
  137. macb_writel(macb, NCR, netctl);
  138. return MACB_BFEXT(DATA, frame);
  139. }
  140. #if defined(CONFIG_CMD_MII)
  141. int macb_miiphy_read(const char *devname, u8 phy_adr, u8 reg, u16 *value)
  142. {
  143. struct eth_device *dev = eth_get_dev_by_name(devname);
  144. struct macb_device *macb = to_macb(dev);
  145. if ( macb->phy_addr != phy_adr )
  146. return -1;
  147. *value = macb_mdio_read(macb, reg);
  148. return 0;
  149. }
  150. int macb_miiphy_write(const char *devname, u8 phy_adr, u8 reg, u16 value)
  151. {
  152. struct eth_device *dev = eth_get_dev_by_name(devname);
  153. struct macb_device *macb = to_macb(dev);
  154. if ( macb->phy_addr != phy_adr )
  155. return -1;
  156. macb_mdio_write(macb, reg, value);
  157. return 0;
  158. }
  159. #endif
  160. #if defined(CONFIG_CMD_NET)
  161. static int macb_send(struct eth_device *netdev, volatile void *packet,
  162. int length)
  163. {
  164. struct macb_device *macb = to_macb(netdev);
  165. unsigned long paddr, ctrl;
  166. unsigned int tx_head = macb->tx_head;
  167. int i;
  168. paddr = dma_map_single(packet, length, DMA_TO_DEVICE);
  169. ctrl = length & TXBUF_FRMLEN_MASK;
  170. ctrl |= TXBUF_FRAME_END;
  171. if (tx_head == (CONFIG_SYS_MACB_TX_RING_SIZE - 1)) {
  172. ctrl |= TXBUF_WRAP;
  173. macb->tx_head = 0;
  174. } else
  175. macb->tx_head++;
  176. macb->tx_ring[tx_head].ctrl = ctrl;
  177. macb->tx_ring[tx_head].addr = paddr;
  178. barrier();
  179. macb_writel(macb, NCR, MACB_BIT(TE) | MACB_BIT(RE) | MACB_BIT(TSTART));
  180. /*
  181. * I guess this is necessary because the networking core may
  182. * re-use the transmit buffer as soon as we return...
  183. */
  184. for (i = 0; i <= CONFIG_SYS_MACB_TX_TIMEOUT; i++) {
  185. barrier();
  186. ctrl = macb->tx_ring[tx_head].ctrl;
  187. if (ctrl & TXBUF_USED)
  188. break;
  189. udelay(1);
  190. }
  191. dma_unmap_single(packet, length, paddr);
  192. if (i <= CONFIG_SYS_MACB_TX_TIMEOUT) {
  193. if (ctrl & TXBUF_UNDERRUN)
  194. printf("%s: TX underrun\n", netdev->name);
  195. if (ctrl & TXBUF_EXHAUSTED)
  196. printf("%s: TX buffers exhausted in mid frame\n",
  197. netdev->name);
  198. } else {
  199. printf("%s: TX timeout\n", netdev->name);
  200. }
  201. /* No one cares anyway */
  202. return 0;
  203. }
  204. static void reclaim_rx_buffers(struct macb_device *macb,
  205. unsigned int new_tail)
  206. {
  207. unsigned int i;
  208. i = macb->rx_tail;
  209. while (i > new_tail) {
  210. macb->rx_ring[i].addr &= ~RXADDR_USED;
  211. i++;
  212. if (i > CONFIG_SYS_MACB_RX_RING_SIZE)
  213. i = 0;
  214. }
  215. while (i < new_tail) {
  216. macb->rx_ring[i].addr &= ~RXADDR_USED;
  217. i++;
  218. }
  219. barrier();
  220. macb->rx_tail = new_tail;
  221. }
  222. static int macb_recv(struct eth_device *netdev)
  223. {
  224. struct macb_device *macb = to_macb(netdev);
  225. unsigned int rx_tail = macb->rx_tail;
  226. void *buffer;
  227. int length;
  228. int wrapped = 0;
  229. u32 status;
  230. for (;;) {
  231. if (!(macb->rx_ring[rx_tail].addr & RXADDR_USED))
  232. return -1;
  233. status = macb->rx_ring[rx_tail].ctrl;
  234. if (status & RXBUF_FRAME_START) {
  235. if (rx_tail != macb->rx_tail)
  236. reclaim_rx_buffers(macb, rx_tail);
  237. wrapped = 0;
  238. }
  239. if (status & RXBUF_FRAME_END) {
  240. buffer = macb->rx_buffer + 128 * macb->rx_tail;
  241. length = status & RXBUF_FRMLEN_MASK;
  242. if (wrapped) {
  243. unsigned int headlen, taillen;
  244. headlen = 128 * (CONFIG_SYS_MACB_RX_RING_SIZE
  245. - macb->rx_tail);
  246. taillen = length - headlen;
  247. memcpy((void *)NetRxPackets[0],
  248. buffer, headlen);
  249. memcpy((void *)NetRxPackets[0] + headlen,
  250. macb->rx_buffer, taillen);
  251. buffer = (void *)NetRxPackets[0];
  252. }
  253. NetReceive(buffer, length);
  254. if (++rx_tail >= CONFIG_SYS_MACB_RX_RING_SIZE)
  255. rx_tail = 0;
  256. reclaim_rx_buffers(macb, rx_tail);
  257. } else {
  258. if (++rx_tail >= CONFIG_SYS_MACB_RX_RING_SIZE) {
  259. wrapped = 1;
  260. rx_tail = 0;
  261. }
  262. }
  263. barrier();
  264. }
  265. return 0;
  266. }
  267. static void macb_phy_reset(struct macb_device *macb)
  268. {
  269. struct eth_device *netdev = &macb->netdev;
  270. int i;
  271. u16 status, adv;
  272. adv = ADVERTISE_CSMA | ADVERTISE_ALL;
  273. macb_mdio_write(macb, MII_ADVERTISE, adv);
  274. printf("%s: Starting autonegotiation...\n", netdev->name);
  275. macb_mdio_write(macb, MII_BMCR, (BMCR_ANENABLE
  276. | BMCR_ANRESTART));
  277. for (i = 0; i < CONFIG_SYS_MACB_AUTONEG_TIMEOUT / 100; i++) {
  278. status = macb_mdio_read(macb, MII_BMSR);
  279. if (status & BMSR_ANEGCOMPLETE)
  280. break;
  281. udelay(100);
  282. }
  283. if (status & BMSR_ANEGCOMPLETE)
  284. printf("%s: Autonegotiation complete\n", netdev->name);
  285. else
  286. printf("%s: Autonegotiation timed out (status=0x%04x)\n",
  287. netdev->name, status);
  288. }
  289. #ifdef CONFIG_MACB_SEARCH_PHY
  290. static int macb_phy_find(struct macb_device *macb)
  291. {
  292. int i;
  293. u16 phy_id;
  294. /* Search for PHY... */
  295. for (i = 0; i < 32; i++) {
  296. macb->phy_addr = i;
  297. phy_id = macb_mdio_read(macb, MII_PHYSID1);
  298. if (phy_id != 0xffff) {
  299. printf("%s: PHY present at %d\n", macb->netdev.name, i);
  300. return 1;
  301. }
  302. }
  303. /* PHY isn't up to snuff */
  304. printf("%s: PHY not found", macb->netdev.name);
  305. return 0;
  306. }
  307. #endif /* CONFIG_MACB_SEARCH_PHY */
  308. static int macb_phy_init(struct macb_device *macb)
  309. {
  310. struct eth_device *netdev = &macb->netdev;
  311. u32 ncfgr;
  312. u16 phy_id, status, adv, lpa;
  313. int media, speed, duplex;
  314. int i;
  315. #ifdef CONFIG_MACB_SEARCH_PHY
  316. /* Auto-detect phy_addr */
  317. if (!macb_phy_find(macb)) {
  318. return 0;
  319. }
  320. #endif /* CONFIG_MACB_SEARCH_PHY */
  321. /* Check if the PHY is up to snuff... */
  322. phy_id = macb_mdio_read(macb, MII_PHYSID1);
  323. if (phy_id == 0xffff) {
  324. printf("%s: No PHY present\n", netdev->name);
  325. return 0;
  326. }
  327. status = macb_mdio_read(macb, MII_BMSR);
  328. if (!(status & BMSR_LSTATUS)) {
  329. /* Try to re-negotiate if we don't have link already. */
  330. macb_phy_reset(macb);
  331. for (i = 0; i < CONFIG_SYS_MACB_AUTONEG_TIMEOUT / 100; i++) {
  332. status = macb_mdio_read(macb, MII_BMSR);
  333. if (status & BMSR_LSTATUS)
  334. break;
  335. udelay(100);
  336. }
  337. }
  338. if (!(status & BMSR_LSTATUS)) {
  339. printf("%s: link down (status: 0x%04x)\n",
  340. netdev->name, status);
  341. return 0;
  342. } else {
  343. adv = macb_mdio_read(macb, MII_ADVERTISE);
  344. lpa = macb_mdio_read(macb, MII_LPA);
  345. media = mii_nway_result(lpa & adv);
  346. speed = (media & (ADVERTISE_100FULL | ADVERTISE_100HALF)
  347. ? 1 : 0);
  348. duplex = (media & ADVERTISE_FULL) ? 1 : 0;
  349. printf("%s: link up, %sMbps %s-duplex (lpa: 0x%04x)\n",
  350. netdev->name,
  351. speed ? "100" : "10",
  352. duplex ? "full" : "half",
  353. lpa);
  354. ncfgr = macb_readl(macb, NCFGR);
  355. ncfgr &= ~(MACB_BIT(SPD) | MACB_BIT(FD));
  356. if (speed)
  357. ncfgr |= MACB_BIT(SPD);
  358. if (duplex)
  359. ncfgr |= MACB_BIT(FD);
  360. macb_writel(macb, NCFGR, ncfgr);
  361. return 1;
  362. }
  363. }
  364. static int macb_init(struct eth_device *netdev, bd_t *bd)
  365. {
  366. struct macb_device *macb = to_macb(netdev);
  367. unsigned long paddr;
  368. int i;
  369. /*
  370. * macb_halt should have been called at some point before now,
  371. * so we'll assume the controller is idle.
  372. */
  373. /* initialize DMA descriptors */
  374. paddr = macb->rx_buffer_dma;
  375. for (i = 0; i < CONFIG_SYS_MACB_RX_RING_SIZE; i++) {
  376. if (i == (CONFIG_SYS_MACB_RX_RING_SIZE - 1))
  377. paddr |= RXADDR_WRAP;
  378. macb->rx_ring[i].addr = paddr;
  379. macb->rx_ring[i].ctrl = 0;
  380. paddr += 128;
  381. }
  382. for (i = 0; i < CONFIG_SYS_MACB_TX_RING_SIZE; i++) {
  383. macb->tx_ring[i].addr = 0;
  384. if (i == (CONFIG_SYS_MACB_TX_RING_SIZE - 1))
  385. macb->tx_ring[i].ctrl = TXBUF_USED | TXBUF_WRAP;
  386. else
  387. macb->tx_ring[i].ctrl = TXBUF_USED;
  388. }
  389. macb->rx_tail = macb->tx_head = macb->tx_tail = 0;
  390. macb_writel(macb, RBQP, macb->rx_ring_dma);
  391. macb_writel(macb, TBQP, macb->tx_ring_dma);
  392. /* choose RMII or MII mode. This depends on the board */
  393. #ifdef CONFIG_RMII
  394. #if defined(CONFIG_AT91CAP9) || defined(CONFIG_AT91SAM9260) || \
  395. defined(CONFIG_AT91SAM9263) || defined(CONFIG_AT91SAM9G20) || \
  396. defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9M10G45)
  397. macb_writel(macb, USRIO, MACB_BIT(RMII) | MACB_BIT(CLKEN));
  398. #else
  399. macb_writel(macb, USRIO, 0);
  400. #endif
  401. #else
  402. #if defined(CONFIG_AT91CAP9) || defined(CONFIG_AT91SAM9260) || \
  403. defined(CONFIG_AT91SAM9263) || defined(CONFIG_AT91SAM9G20) || \
  404. defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9M10G45)
  405. macb_writel(macb, USRIO, MACB_BIT(CLKEN));
  406. #else
  407. macb_writel(macb, USRIO, MACB_BIT(MII));
  408. #endif
  409. #endif /* CONFIG_RMII */
  410. if (!macb_phy_init(macb))
  411. return -1;
  412. /* Enable TX and RX */
  413. macb_writel(macb, NCR, MACB_BIT(TE) | MACB_BIT(RE));
  414. return 0;
  415. }
  416. static void macb_halt(struct eth_device *netdev)
  417. {
  418. struct macb_device *macb = to_macb(netdev);
  419. u32 ncr, tsr;
  420. /* Halt the controller and wait for any ongoing transmission to end. */
  421. ncr = macb_readl(macb, NCR);
  422. ncr |= MACB_BIT(THALT);
  423. macb_writel(macb, NCR, ncr);
  424. do {
  425. tsr = macb_readl(macb, TSR);
  426. } while (tsr & MACB_BIT(TGO));
  427. /* Disable TX and RX, and clear statistics */
  428. macb_writel(macb, NCR, MACB_BIT(CLRSTAT));
  429. }
  430. static int macb_write_hwaddr(struct eth_device *dev)
  431. {
  432. struct macb_device *macb = to_macb(dev);
  433. u32 hwaddr_bottom;
  434. u16 hwaddr_top;
  435. /* set hardware address */
  436. hwaddr_bottom = cpu_to_le32(*((u32 *)dev->enetaddr));
  437. macb_writel(macb, SA1B, hwaddr_bottom);
  438. hwaddr_top = cpu_to_le16(*((u16 *)(dev->enetaddr + 4)));
  439. macb_writel(macb, SA1T, hwaddr_top);
  440. return 0;
  441. }
  442. int macb_eth_initialize(int id, void *regs, unsigned int phy_addr)
  443. {
  444. struct macb_device *macb;
  445. struct eth_device *netdev;
  446. unsigned long macb_hz;
  447. u32 ncfgr;
  448. macb = malloc(sizeof(struct macb_device));
  449. if (!macb) {
  450. printf("Error: Failed to allocate memory for MACB%d\n", id);
  451. return -1;
  452. }
  453. memset(macb, 0, sizeof(struct macb_device));
  454. netdev = &macb->netdev;
  455. macb->rx_buffer = dma_alloc_coherent(CONFIG_SYS_MACB_RX_BUFFER_SIZE,
  456. &macb->rx_buffer_dma);
  457. macb->rx_ring = dma_alloc_coherent(CONFIG_SYS_MACB_RX_RING_SIZE
  458. * sizeof(struct macb_dma_desc),
  459. &macb->rx_ring_dma);
  460. macb->tx_ring = dma_alloc_coherent(CONFIG_SYS_MACB_TX_RING_SIZE
  461. * sizeof(struct macb_dma_desc),
  462. &macb->tx_ring_dma);
  463. macb->regs = regs;
  464. macb->phy_addr = phy_addr;
  465. sprintf(netdev->name, "macb%d", id);
  466. netdev->init = macb_init;
  467. netdev->halt = macb_halt;
  468. netdev->send = macb_send;
  469. netdev->recv = macb_recv;
  470. netdev->write_hwaddr = macb_write_hwaddr;
  471. /*
  472. * Do some basic initialization so that we at least can talk
  473. * to the PHY
  474. */
  475. macb_hz = get_macb_pclk_rate(id);
  476. if (macb_hz < 20000000)
  477. ncfgr = MACB_BF(CLK, MACB_CLK_DIV8);
  478. else if (macb_hz < 40000000)
  479. ncfgr = MACB_BF(CLK, MACB_CLK_DIV16);
  480. else if (macb_hz < 80000000)
  481. ncfgr = MACB_BF(CLK, MACB_CLK_DIV32);
  482. else
  483. ncfgr = MACB_BF(CLK, MACB_CLK_DIV64);
  484. macb_writel(macb, NCFGR, ncfgr);
  485. eth_register(netdev);
  486. #if defined(CONFIG_CMD_MII)
  487. miiphy_register(netdev->name, macb_miiphy_read, macb_miiphy_write);
  488. #endif
  489. return 0;
  490. }
  491. #endif