cpu.c 1.9 KB

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  1. /*
  2. * (C) Copyright 2004 Texas Insturments
  3. *
  4. * (C) Copyright 2002
  5. * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
  6. * Marius Groeger <mgroeger@sysgo.de>
  7. *
  8. * (C) Copyright 2002
  9. * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
  10. *
  11. * See file CREDITS for list of people who contributed to this
  12. * project.
  13. *
  14. * This program is free software; you can redistribute it and/or
  15. * modify it under the terms of the GNU General Public License as
  16. * published by the Free Software Foundation; either version 2 of
  17. * the License, or (at your option) any later version.
  18. *
  19. * This program is distributed in the hope that it will be useful,
  20. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  21. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  22. * GNU General Public License for more details.
  23. *
  24. * You should have received a copy of the GNU General Public License
  25. * along with this program; if not, write to the Free Software
  26. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  27. * MA 02111-1307 USA
  28. */
  29. /*
  30. * CPU specific code
  31. */
  32. #include <common.h>
  33. #include <command.h>
  34. #include <asm/system.h>
  35. static void cache_flush(void);
  36. int cleanup_before_linux (void)
  37. {
  38. /*
  39. * this function is called just before we call linux
  40. * it prepares the processor for linux
  41. *
  42. * we turn off caches etc ...
  43. */
  44. disable_interrupts ();
  45. #ifdef CONFIG_LCD
  46. {
  47. extern void lcd_disable(void);
  48. extern void lcd_panel_disable(void);
  49. lcd_disable(); /* proper disable of lcd & panel */
  50. lcd_panel_disable();
  51. }
  52. #endif
  53. /* turn off I/D-cache */
  54. icache_disable();
  55. dcache_disable();
  56. /* flush I/D-cache */
  57. cache_flush();
  58. return 0;
  59. }
  60. static void cache_flush(void)
  61. {
  62. unsigned long i = 0;
  63. asm ("mcr p15, 0, %0, c7, c7, 0": :"r" (i)); /* invalidate both caches and flush btb */
  64. asm ("mcr p15, 0, %0, c7, c10, 4": :"r" (i)); /* mem barrier to sync things */
  65. }