bf518f-ezbrd.c 3.6 KB

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  1. /*
  2. * U-boot - main board file
  3. *
  4. * Copyright (c) 2008-2009 Analog Devices Inc.
  5. *
  6. * Licensed under the GPL-2 or later.
  7. */
  8. #include <common.h>
  9. #include <config.h>
  10. #include <command.h>
  11. #include <net.h>
  12. #include <netdev.h>
  13. #include <spi.h>
  14. #include <asm/blackfin.h>
  15. #include <asm/net.h>
  16. #include <asm/mach-common/bits/otp.h>
  17. DECLARE_GLOBAL_DATA_PTR;
  18. int checkboard(void)
  19. {
  20. printf("Board: ADI BF518F EZ-Board board\n");
  21. printf(" Support: http://blackfin.uclinux.org/\n");
  22. return 0;
  23. }
  24. phys_size_t initdram(int board_type)
  25. {
  26. gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
  27. gd->bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE;
  28. return gd->bd->bi_memsize;
  29. }
  30. #if defined(CONFIG_BFIN_MAC)
  31. static void board_init_enetaddr(uchar *mac_addr)
  32. {
  33. bool valid_mac = false;
  34. #if 0
  35. /* the MAC is stored in OTP memory page 0xDF */
  36. uint32_t ret;
  37. uint64_t otp_mac;
  38. ret = bfrom_OtpRead(0xDF, OTP_LOWER_HALF, &otp_mac);
  39. if (!(ret & OTP_MASTER_ERROR)) {
  40. uchar *otp_mac_p = (uchar *)&otp_mac;
  41. for (ret = 0; ret < 6; ++ret)
  42. mac_addr[ret] = otp_mac_p[5 - ret];
  43. if (is_valid_ether_addr(mac_addr))
  44. valid_mac = true;
  45. }
  46. #endif
  47. if (!valid_mac) {
  48. puts("Warning: Generating 'random' MAC address\n");
  49. bfin_gen_rand_mac(mac_addr);
  50. }
  51. eth_setenv_enetaddr("ethaddr", mac_addr);
  52. }
  53. #define KSZ_MAX_HZ 5000000
  54. #define KSZ_WRITE 0x02
  55. #define KSZ_READ 0x03
  56. #define KSZ_REG_STPID 0x01 /* Register 1: Chip ID1 / Start Switch */
  57. #define KSZ_REG_GC9 0x0b /* Register 11: Global Control 9 */
  58. #define KSZ_REG_P3C0 0x30 /* Register 48: Port 3 Control 0 */
  59. static int ksz8893m_transfer(struct spi_slave *slave, uchar dir, uchar reg,
  60. uchar data, uchar result[3])
  61. {
  62. unsigned char dout[3] = { dir, reg, data, };
  63. return spi_xfer(slave, sizeof(dout) * 8, dout, result, SPI_XFER_BEGIN | SPI_XFER_END);
  64. }
  65. static int ksz8893m_reg_set(struct spi_slave *slave, uchar reg, uchar data)
  66. {
  67. unsigned char din[3];
  68. return ksz8893m_transfer(slave, KSZ_WRITE, reg, data, din);
  69. }
  70. static int ksz8893m_reg_clear(struct spi_slave *slave, uchar reg, uchar mask)
  71. {
  72. int ret = 0;
  73. unsigned char din[3];
  74. ret |= ksz8893m_transfer(slave, KSZ_READ, reg, 0, din);
  75. ret |= ksz8893m_reg_set(slave, reg, din[2] & mask);
  76. return ret;
  77. }
  78. static int ksz8893m_reset(struct spi_slave *slave)
  79. {
  80. int ret = 0;
  81. /* Disable STPID mode */
  82. ret |= ksz8893m_reg_clear(slave, KSZ_REG_GC9, 0x01);
  83. /* Disable VLAN tag insert on Port3 */
  84. ret |= ksz8893m_reg_clear(slave, KSZ_REG_P3C0, 0x04);
  85. /* Start switch */
  86. ret |= ksz8893m_reg_set(slave, KSZ_REG_STPID, 0x01);
  87. return ret;
  88. }
  89. int board_eth_init(bd_t *bis)
  90. {
  91. static bool switch_is_alive = false;
  92. int ret;
  93. if (!switch_is_alive) {
  94. struct spi_slave *slave = spi_setup_slave(0, 1, KSZ_MAX_HZ, SPI_MODE_3);
  95. if (slave) {
  96. if (!spi_claim_bus(slave)) {
  97. ret = ksz8893m_reset(slave);
  98. if (!ret)
  99. switch_is_alive = true;
  100. spi_release_bus(slave);
  101. }
  102. spi_free_slave(slave);
  103. }
  104. }
  105. if (switch_is_alive)
  106. return bfin_EMAC_initialize(bis);
  107. else
  108. return -1;
  109. }
  110. #endif
  111. int misc_init_r(void)
  112. {
  113. #ifdef CONFIG_BFIN_MAC
  114. uchar enetaddr[6];
  115. if (!eth_getenv_enetaddr("ethaddr", enetaddr))
  116. board_init_enetaddr(enetaddr);
  117. #endif
  118. return 0;
  119. }
  120. int board_early_init_f(void)
  121. {
  122. #if !defined(CONFIG_SYS_NO_FLASH)
  123. /* setup BF518-EZBRD GPIO pin PG11 to AMS2. */
  124. bfin_write_PORTG_MUX((bfin_read_PORTG_MUX() & ~PORT_x_MUX_6_MASK) | PORT_x_MUX_6_FUNC_2);
  125. bfin_write_PORTG_FER(bfin_read_PORTG_FER() | PG11);
  126. # if !defined(CONFIG_BFIN_SPI)
  127. /* setup BF518-EZBRD GPIO pin PG15 to AMS3. */
  128. bfin_write_PORTG_MUX((bfin_read_PORTG_MUX() & ~PORT_x_MUX_7_MASK) | PORT_x_MUX_7_FUNC_3);
  129. bfin_write_PORTG_FER(bfin_read_PORTG_FER() | PG15);
  130. # endif
  131. #endif
  132. return 0;
  133. }