config.h 2.4 KB

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  1. /*
  2. * Copyright 2009-2010 Freescale Semiconductor, Inc.
  3. *
  4. * This program is free software; you can redistribute it and/or
  5. * modify it under the terms of the GNU General Public License as
  6. * published by the Free Software Foundation; either version 2 of
  7. * the License, or (at your option) any later version.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. * GNU General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software
  16. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  17. * MA 02111-1307 USA
  18. *
  19. */
  20. #ifndef _ASM_CONFIG_H_
  21. #define _ASM_CONFIG_H_
  22. #define CONFIG_LMB
  23. #ifndef CONFIG_MAX_MEM_MAPPED
  24. #if defined(CONFIG_4xx) || defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
  25. #define CONFIG_MAX_MEM_MAPPED ((phys_size_t)2 << 30)
  26. #else
  27. #define CONFIG_MAX_MEM_MAPPED (256 << 20)
  28. #endif
  29. #endif
  30. /* Check if boards need to enable FSL DMA engine for SDRAM init */
  31. #if !defined(CONFIG_FSL_DMA) && defined(CONFIG_DDR_ECC)
  32. #if (defined(CONFIG_MPC83xx) && defined(CONFIG_DDR_ECC_INIT_VIA_DMA)) || \
  33. ((defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)) && \
  34. !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER))
  35. #define CONFIG_FSL_DMA
  36. #endif
  37. #endif
  38. #if defined(CONFIG_MPC8572) || defined(CONFIG_P1020) || \
  39. defined(CONFIG_P1021) || defined(CONFIG_P1022) || \
  40. defined(CONFIG_P2020) || defined(CONFIG_MPC8641)
  41. #define CONFIG_MAX_CPUS 2
  42. #elif defined(CONFIG_PPC_P4080)
  43. #define CONFIG_MAX_CPUS 8
  44. #else
  45. #define CONFIG_MAX_CPUS 1
  46. #endif
  47. /*
  48. * Provide a default boot page translation virtual address that lines up with
  49. * Freescale's default e500 reset page.
  50. */
  51. #if (defined(CONFIG_E500) && defined(CONFIG_MP))
  52. #ifndef CONFIG_BPTR_VIRT_ADDR
  53. #define CONFIG_BPTR_VIRT_ADDR 0xfffff000
  54. #endif
  55. #endif
  56. /* Enable TSEC2.0 for the platforms that have it if we are using TSEC */
  57. #if defined(CONFIG_TSEC_ENET) && \
  58. (defined(CONFIG_P1020) || defined(CONFIG_P1011))
  59. #define CONFIG_TSECV2
  60. #endif
  61. /* Number of TLB CAM entries we have on FSL Book-E chips */
  62. #if defined(CONFIG_E500MC)
  63. #define CONFIG_SYS_NUM_TLBCAMS 64
  64. #elif defined(CONFIG_E500)
  65. #define CONFIG_SYS_NUM_TLBCAMS 16
  66. #endif
  67. /* Relocation to SDRAM works on all PPC boards */
  68. #define CONFIG_RELOC_FIXUP_WORKS
  69. #endif /* _ASM_CONFIG_H_ */