fpga.c 2.5 KB

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  1. /*
  2. * (C) Copyright 2008 Dmitry Rakhchev, EmCraft Systems, rda@emcraft.com
  3. *
  4. * Developed for DENX Software Engineering GmbH
  5. *
  6. * See file CREDITS for list of people who contributed to this
  7. * project.
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License as
  11. * published by the Free Software Foundation; either version 2 of
  12. * the License, or (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  22. * MA 02111-1307 USA
  23. */
  24. #include <common.h>
  25. #ifdef CONFIG_POST
  26. /* This test performs testing of FPGA SCRATCH register,
  27. * gets FPGA version and run get_ram_size() on FPGA memory
  28. */
  29. #include <post.h>
  30. #include <asm/io.h>
  31. DECLARE_GLOBAL_DATA_PTR;
  32. #define FPGA_SCRATCH_REG 0xC4000050
  33. #define FPGA_VERSION_REG 0xC4000040
  34. #define FPGA_RAM_START 0xC4200000
  35. #define FPGA_RAM_END 0xC4203FFF
  36. #define FPGA_STAT 0xC400000C
  37. #if CONFIG_POST & CFG_POST_BSPEC3
  38. static int one_scratch_test(uint value)
  39. {
  40. uint read_value;
  41. int ret = 0;
  42. out_be32((void *)FPGA_SCRATCH_REG, value);
  43. /* read other location (protect against data lines capacity) */
  44. ret = in_be16((void *)FPGA_VERSION_REG);
  45. /* verify test pattern */
  46. read_value = in_be32((void *)FPGA_SCRATCH_REG);
  47. if (read_value != value) {
  48. post_log("FPGA SCRATCH test failed write %08X, read %08X\n",
  49. value, read_value);
  50. ret = 1;
  51. }
  52. return ret;
  53. }
  54. /* Verify FPGA, get version & memory size */
  55. int fpga_post_test(int flags)
  56. {
  57. uint old_value;
  58. ushort version;
  59. uint read_value;
  60. int ret = 0;
  61. post_log("\n");
  62. old_value = in_be32((void *)FPGA_SCRATCH_REG);
  63. if (one_scratch_test(0x55555555))
  64. ret = 1;
  65. if (one_scratch_test(0xAAAAAAAA))
  66. ret = 1;
  67. out_be32((void *)FPGA_SCRATCH_REG, old_value);
  68. version = in_be16((void *)FPGA_VERSION_REG);
  69. post_log("FPGA : version %u.%u\n",
  70. (version >> 8) & 0xFF, version & 0xFF);
  71. /* Enable write to FPGA RAM */
  72. out_be32((void *)FPGA_STAT, in_be32((void *)FPGA_STAT) | 0x1000);
  73. read_value = get_ram_size((void *)CFG_FPGA_BASE_1, 0x4000);
  74. post_log("FPGA RAM size: %d bytes\n", read_value);
  75. return ret;
  76. }
  77. #endif /* CONFIG_POST & CFG_POST_BSPEC3 */
  78. #endif /* CONFIG_POST */