tegra20-whistler.dts 952 B

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667
  1. /dts-v1/;
  2. /include/ ARCH_CPU_DTS
  3. / {
  4. model = "NVIDIA Tegra20 Whistler evaluation board";
  5. compatible = "nvidia,whistler", "nvidia,tegra20";
  6. aliases {
  7. i2c0 = "/i2c@7000d000";
  8. usb0 = "/usb@c5008000";
  9. usb1 = "/usb@c5000000";
  10. };
  11. memory {
  12. device_type = "memory";
  13. reg = < 0x00000000 0x20000000 >;
  14. };
  15. clocks {
  16. osc {
  17. clock-frequency = <12000000>;
  18. };
  19. };
  20. clock@60006000 {
  21. clocks = <&clk_32k &osc>;
  22. };
  23. serial@70006000 {
  24. clock-frequency = < 216000000 >;
  25. };
  26. i2c@7000c000 {
  27. status = "disabled";
  28. };
  29. i2c@7000c400 {
  30. status = "disabled";
  31. };
  32. i2c@7000c500 {
  33. status = "disabled";
  34. };
  35. i2c@7000d000 {
  36. clock-frequency = <100000>;
  37. pmic@3c {
  38. compatible = "maxim,max8907b";
  39. reg = <0x3c>;
  40. clk_32k: clock {
  41. compatible = "fixed-clock";
  42. /*
  43. * leave out for now due to CPP:
  44. * #clock-cells = <0>;
  45. */
  46. clock-frequency = <32768>;
  47. };
  48. };
  49. };
  50. usb@c5004000 {
  51. status = "disabled";
  52. };
  53. };