dram.c 2.8 KB

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  1. /*
  2. * (C) Copyright 2009
  3. * Marvell Semiconductor <www.marvell.com>
  4. * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
  5. *
  6. * See file CREDITS for list of people who contributed to this
  7. * project.
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License as
  11. * published by the Free Software Foundation; either version 2 of
  12. * the License, or (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
  22. * MA 02110-1301 USA
  23. */
  24. #include <config.h>
  25. #include <common.h>
  26. #include <asm/io.h>
  27. #include <asm/arch/cpu.h>
  28. #include <asm/arch/kirkwood.h>
  29. DECLARE_GLOBAL_DATA_PTR;
  30. #define KW_REG_CPUCS_WIN_BAR(x) (KW_REGISTER(0x1500) + (x * 0x08))
  31. #define KW_REG_CPUCS_WIN_SZ(x) (KW_REGISTER(0x1504) + (x * 0x08))
  32. /*
  33. * kw_sdram_bar - reads SDRAM Base Address Register
  34. */
  35. u32 kw_sdram_bar(enum memory_bank bank)
  36. {
  37. u32 result = 0;
  38. u32 enable = 0x01 & readl(KW_REG_CPUCS_WIN_SZ(bank));
  39. if ((!enable) || (bank > BANK3))
  40. return 0;
  41. result = readl(KW_REG_CPUCS_WIN_BAR(bank));
  42. return result;
  43. }
  44. /*
  45. * kw_sdram_bs - reads SDRAM Bank size
  46. */
  47. u32 kw_sdram_bs(enum memory_bank bank)
  48. {
  49. u32 result = 0;
  50. u32 enable = 0x01 & readl(KW_REG_CPUCS_WIN_SZ(bank));
  51. if ((!enable) || (bank > BANK3))
  52. return 0;
  53. result = 0xff000000 & readl(KW_REG_CPUCS_WIN_SZ(bank));
  54. result += 0x01000000;
  55. return result;
  56. }
  57. #ifndef CONFIG_SYS_BOARD_DRAM_INIT
  58. int dram_init(void)
  59. {
  60. int i;
  61. gd->ram_size = 0;
  62. for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
  63. gd->bd->bi_dram[i].start = kw_sdram_bar(i);
  64. gd->bd->bi_dram[i].size = kw_sdram_bs(i);
  65. /*
  66. * It is assumed that all memory banks are consecutive
  67. * and without gaps.
  68. * If the gap is found, ram_size will be reported for
  69. * consecutive memory only
  70. */
  71. if (gd->bd->bi_dram[i].start != gd->ram_size)
  72. break;
  73. gd->ram_size += gd->bd->bi_dram[i].size;
  74. }
  75. for (; i < CONFIG_NR_DRAM_BANKS; i++) {
  76. /* If above loop terminated prematurely, we need to set
  77. * remaining banks' start address & size as 0. Otherwise other
  78. * u-boot functions and Linux kernel gets wrong values which
  79. * could result in crash */
  80. gd->bd->bi_dram[i].start = 0;
  81. gd->bd->bi_dram[i].size = 0;
  82. }
  83. return 0;
  84. }
  85. /*
  86. * If this function is not defined here,
  87. * board.c alters dram bank zero configuration defined above.
  88. */
  89. void dram_init_banksize(void)
  90. {
  91. dram_init();
  92. }
  93. #endif /* CONFIG_SYS_BOARD_DRAM_INIT */