imx27lite-common.h 6.8 KB

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  1. /*
  2. * Copyright (C) 2010 Heiko Schocher <hs@denx.de>
  3. *
  4. * based on:
  5. * Copyright (C) 2009 Ilya Yanok <yanok@emcraft.com>
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License as
  9. * published by the Free Software Foundation; either version 2 of
  10. * the License, or (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  20. * MA 02111-1307 USA
  21. */
  22. #ifndef __IMX27LITE_COMMON_CONFIG_H
  23. #define __IMX27LITE_COMMON_CONFIG_H
  24. /*
  25. * SoC Configuration
  26. */
  27. #define CONFIG_ARM926EJS /* arm926ejs CPU core */
  28. #define CONFIG_MX27
  29. #define CONFIG_MX27_CLK32 32768 /* OSC32K frequency */
  30. #define CONFIG_SYS_HZ 1000
  31. #define CONFIG_DISPLAY_BOARDINFO
  32. #define CONFIG_DISPLAY_CPUINFO
  33. #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
  34. #define CONFIG_SETUP_MEMORY_TAGS 1
  35. #define CONFIG_INITRD_TAG 1
  36. /*
  37. * Lowlevel configuration
  38. */
  39. #define SDRAM_ESDCFG_REGISTER_VAL(cas) \
  40. (ESDCFG_TRC(10) | \
  41. ESDCFG_TRCD(3) | \
  42. ESDCFG_TCAS(cas) | \
  43. ESDCFG_TRRD(1) | \
  44. ESDCFG_TRAS(5) | \
  45. ESDCFG_TWR | \
  46. ESDCFG_TMRD(2) | \
  47. ESDCFG_TRP(2) | \
  48. ESDCFG_TXP(3))
  49. #define SDRAM_ESDCTL_REGISTER_VAL \
  50. (ESDCTL_PRCT(0) | \
  51. ESDCTL_BL | \
  52. ESDCTL_PWDT(0) | \
  53. ESDCTL_SREFR(3) | \
  54. ESDCTL_DSIZ_32 | \
  55. ESDCTL_COL10 | \
  56. ESDCTL_ROW13 | \
  57. ESDCTL_SDE)
  58. #define SDRAM_ALL_VAL 0xf00
  59. #define SDRAM_MODE_REGISTER_VAL 0x33 /* BL: 8, CAS: 3 */
  60. #define SDRAM_EXT_MODE_REGISTER_VAL 0x1000000
  61. #define MPCTL0_VAL 0x1ef15d5
  62. #define SPCTL0_VAL 0x043a1c09
  63. #define CSCR_VAL 0x33f08107
  64. #define PCDR0_VAL 0x120470c3
  65. #define PCDR1_VAL 0x03030303
  66. #define PCCR0_VAL 0xffffffff
  67. #define PCCR1_VAL 0xfffffffc
  68. #define AIPI1_PSR0_VAL 0x20040304
  69. #define AIPI1_PSR1_VAL 0xdffbfcfb
  70. #define AIPI2_PSR0_VAL 0x07ffc200
  71. #define AIPI2_PSR1_VAL 0xffffffff
  72. /*
  73. * Memory Info
  74. */
  75. /* malloc() len */
  76. #define CONFIG_SYS_MALLOC_LEN (0x10000 + 512 * 1024)
  77. /* reserved for initial data */
  78. #define CONFIG_SYS_GBL_DATA_SIZE 128
  79. /* memtest start address */
  80. #define CONFIG_SYS_MEMTEST_START 0xA0000000
  81. #define CONFIG_SYS_MEMTEST_END 0xA1000000 /* 16MB RAM test */
  82. #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
  83. #define CONFIG_STACKSIZE (256 * 1024) /* regular stack */
  84. #define PHYS_SDRAM_1 0xA0000000 /* DDR Start */
  85. #define PHYS_SDRAM_1_SIZE 0x08000000 /* DDR size 128MB */
  86. /*
  87. * Serial Driver info
  88. */
  89. #define CONFIG_MXC_UART
  90. #define CONFIG_SYS_MX27_UART1
  91. #define CONFIG_CONS_INDEX 1 /* use UART0 for console */
  92. #define CONFIG_BAUDRATE 115200 /* Default baud rate */
  93. #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
  94. /*
  95. * Flash & Environment
  96. */
  97. #define CONFIG_ENV_IS_IN_FLASH
  98. #define CONFIG_FLASH_CFI_DRIVER
  99. #define CONFIG_SYS_FLASH_CFI
  100. /* Use buffered writes (~10x faster) */
  101. #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
  102. /* Use hardware sector protection */
  103. #define CONFIG_SYS_FLASH_PROTECTION 1
  104. #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of flash banks */
  105. /* CS2 Base address */
  106. #define PHYS_FLASH_1 0xc0000000
  107. /* Flash Base for U-Boot */
  108. #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
  109. #define CONFIG_SYS_MAX_FLASH_SECT (PHYS_FLASH_SIZE / \
  110. CONFIG_SYS_FLASH_SECT_SZ)
  111. #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
  112. #define CONFIG_SYS_MONITOR_LEN 0x40000 /* Reserve 256KiB */
  113. #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
  114. /* Address and size of Redundant Environment Sector */
  115. #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
  116. #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
  117. /*
  118. * Ethernet
  119. */
  120. #define CONFIG_FEC_MXC
  121. #define CONFIG_FEC_MXC_PHYADDR 0x1f
  122. #define CONFIG_MII
  123. #define CONFIG_NET_MULTI
  124. /*
  125. * MTD
  126. */
  127. #define CONFIG_FLASH_CFI_MTD
  128. #define CONFIG_MTD_DEVICE
  129. /*
  130. * NAND
  131. */
  132. #define CONFIG_NAND_MXC
  133. #define CONFIG_MXC_NAND_REGS_BASE 0xd8000000
  134. #define CONFIG_SYS_MAX_NAND_DEVICE 1
  135. #define CONFIG_SYS_NAND_BASE 0xd8000000
  136. #define CONFIG_JFFS2_NAND
  137. #define CONFIG_MXC_NAND_HWECC
  138. #define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */
  139. /*
  140. * SD/MMC
  141. */
  142. #define CONFIG_MMC
  143. #define CONFIG_GENERIC_MMC
  144. #define CONFIG_MXC_MMC
  145. #define CONFIG_DOS_PARTITION
  146. /*
  147. * MTD partitions
  148. */
  149. #define CONFIG_CMD_MTDPARTS
  150. /*
  151. * U-Boot general configuration
  152. */
  153. #define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
  154. #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
  155. /* Print buffer sz */
  156. #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
  157. sizeof(CONFIG_SYS_PROMPT) + 16)
  158. #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
  159. /* Boot Argument Buffer Size */
  160. #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
  161. #define CONFIG_CMDLINE_EDITING
  162. #define CONFIG_SYS_LONGHELP
  163. /*
  164. * U-Boot commands
  165. */
  166. #include <config_cmd_default.h>
  167. #define CONFIG_CMD_ASKENV
  168. #define CONFIG_CMD_CACHE
  169. #define CONFIG_CMD_DHCP
  170. #define CONFIG_CMD_DIAG
  171. #define CONFIG_CMD_FAT
  172. #define CONFIG_CMD_JFFS2
  173. #define CONFIG_CMD_MII
  174. #define CONFIG_CMD_MMC
  175. #define CONFIG_CMD_NAND
  176. #define CONFIG_CMD_PING
  177. #define CONFIG_BOOTDELAY 5
  178. #define CONFIG_LOADADDR 0xa0800000 /* loadaddr env var */
  179. #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
  180. #define xstr(s) str(s)
  181. #define str(s) #s
  182. #define CONFIG_EXTRA_ENV_SETTINGS \
  183. "netdev=eth0\0" \
  184. "nfsargs=setenv bootargs root=/dev/nfs rw " \
  185. "nfsroot=${serverip}:${rootpath}\0" \
  186. "ramargs=setenv bootargs root=/dev/ram rw\0" \
  187. "addip=setenv bootargs ${bootargs} " \
  188. "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
  189. ":${hostname}:${netdev}:off panic=1\0" \
  190. "addtty=setenv bootargs ${bootargs}" \
  191. " console=ttymxc0,${baudrate}\0" \
  192. "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
  193. "addmisc=setenv bootargs ${bootargs}\0" \
  194. "u-boot=" xstr(CONFIG_HOSTNAME) "/u-boot.bin\0" \
  195. "kernel_addr_r=a0800000\0" \
  196. "bootfile=" xstr(CONFIG_HOSTNAME) "/uImage\0" \
  197. "rootpath=/opt/eldk-4.2-arm/arm\0" \
  198. "net_nfs=tftp ${kernel_addr_r} ${bootfile};" \
  199. "run nfsargs addip addtty addmtd addmisc;" \
  200. "bootm\0" \
  201. "bootcmd=run net_nfs\0" \
  202. "load=tftp ${loadaddr} ${u-boot}\0" \
  203. "update=protect off " xstr(CONFIG_SYS_MONITOR_BASE) \
  204. " +${filesize};era " xstr(CONFIG_SYS_MONITOR_BASE) \
  205. " +${filesize};cp.b ${fileaddr} " \
  206. xstr(CONFIG_SYS_MONITOR_BASE) " ${filesize}\0" \
  207. "upd=run load update\0" \
  208. "mtdids=" MTDIDS_DEFAULT "\0" \
  209. "mtdparts=" MTDPARTS_DEFAULT "\0" \
  210. /* additions for new relocation code, must be added to all boards */
  211. #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
  212. #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - /* Fix this */ \
  213. CONFIG_SYS_GBL_DATA_SIZE)
  214. #endif /* __IMX27LITE_COMMON_CONFIG_H */