at91rm9200ek.h 9.2 KB

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  1. /*
  2. * Ulf Samuelsson <ulf@atmel.com>
  3. * Rick Bronson <rick@efn.org>
  4. *
  5. * Configuration settings for the AT91RM9200EK board.
  6. *
  7. * See file CREDITS for list of people who contributed to this
  8. * project.
  9. *
  10. * This program is free software; you can redistribute it and/or
  11. * modify it under the terms of the GNU General Public License as
  12. * published by the Free Software Foundation; either version 2 of
  13. * the License, or (at your option) any later version.
  14. *
  15. * This program is distributed in the hope that it will be useful,
  16. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. * GNU General Public License for more details.
  19. *
  20. * You should have received a copy of the GNU General Public License
  21. * along with this program; if not, write to the Free Software
  22. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  23. * MA 02111-1307 USA
  24. */
  25. #ifndef __CONFIG_H
  26. #define __CONFIG_H
  27. #define CONFIG_AT91_LEGACY
  28. /* ARM asynchronous clock */
  29. /*
  30. * from 18.432 MHz crystal
  31. * (18432000 / 4 * 39)
  32. */
  33. #define AT91C_MAIN_CLOCK 179712000
  34. /*
  35. * peripheral clock
  36. * (AT91C_MASTER_CLOCK / 3)
  37. */
  38. #define AT91C_MASTER_CLOCK 59904000
  39. #define AT91_SLOW_CLOCK 32768 /* slow clock */
  40. #define CONFIG_ARM920T 1 /* This is an ARM920T Core */
  41. #define CONFIG_AT91RM9200 1 /* It's an Atmel AT91RM9200 SoC */
  42. #define CONFIG_AT91RM9200EK 1 /* on an AT91RM9200EK Board */
  43. #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
  44. #define USE_920T_MMU 1
  45. #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
  46. #define CONFIG_SETUP_MEMORY_TAGS 1
  47. #define CONFIG_INITRD_TAG 1
  48. /*
  49. * LowLevel Init
  50. */
  51. #ifndef CONFIG_SKIP_LOWLEVEL_INIT
  52. #define CONFIG_SYS_USE_MAIN_OSCILLATOR 1
  53. /* flash */
  54. #define CONFIG_SYS_EBI_CFGR_VAL 0x00000000
  55. #define CONFIG_SYS_SMC_CSR0_VAL 0x00003284 /* 16bit, 2 TDF, 4 WS */
  56. /* clocks */
  57. #define CONFIG_SYS_PLLAR_VAL 0x20263E04 /* 179.712000 MHz for PCK */
  58. #define CONFIG_SYS_PLLBR_VAL 0x10483E0E /* 48.054857 MHz (divider by 2 for USB) */
  59. /* PCK/3 = MCK Master Clock = 59.904000MHz from PLLA */
  60. #define CONFIG_SYS_MCKR_VAL 0x00000202
  61. /* sdram */
  62. #define CONFIG_SYS_PIOC_ASR_VAL 0xFFFF0000 /* Configure PIOC as peripheral (D16/D31) */
  63. #define CONFIG_SYS_PIOC_BSR_VAL 0x00000000
  64. #define CONFIG_SYS_PIOC_PDR_VAL 0xFFFF0000
  65. #define CONFIG_SYS_EBI_CSA_VAL 0x00000002 /* CS1=CONFIG_SYS_SDRAM */
  66. #define CONFIG_SYS_SDRC_CR_VAL 0x2188c155 /* set up the CONFIG_SYS_SDRAM */
  67. #define CONFIG_SYS_SDRAM 0x20000000 /* address of the CONFIG_SYS_SDRAM */
  68. #define CONFIG_SYS_SDRAM1 0x20000080 /* address of the CONFIG_SYS_SDRAM */
  69. #define CONFIG_SYS_SDRAM_VAL 0x00000000 /* value written to CONFIG_SYS_SDRAM */
  70. #define CONFIG_SYS_SDRC_MR_VAL 0x00000002 /* Precharge All */
  71. #define CONFIG_SYS_SDRC_MR_VAL1 0x00000004 /* refresh */
  72. #define CONFIG_SYS_SDRC_MR_VAL2 0x00000003 /* Load Mode Register */
  73. #define CONFIG_SYS_SDRC_MR_VAL3 0x00000000 /* Normal Mode */
  74. #define CONFIG_SYS_SDRC_TR_VAL 0x000002E0 /* Write refresh rate */
  75. #else
  76. #define CONFIG_SKIP_RELOCATE_UBOOT
  77. #endif /* CONFIG_SKIP_LOWLEVEL_INIT */
  78. /* hardcode so no __divsi3 : AT91C_MASTER_CLOCK / baudrate / 16 */
  79. #define CONFIG_SYS_AT91C_BRGR_DIVISOR 33
  80. /*
  81. * Memory Configuration
  82. */
  83. #define CONFIG_NR_DRAM_BANKS 1
  84. #define PHYS_SDRAM 0x20000000
  85. #define PHYS_SDRAM_SIZE 0x02000000 /* 32 megs */
  86. #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
  87. #define CONFIG_SYS_MEMTEST_END \
  88. (CONFIG_SYS_MEMTEST_START + PHYS_SDRAM_SIZE - 262144)
  89. /*
  90. * Hardware drivers
  91. */
  92. /*
  93. * UART Configuration
  94. *
  95. * define one of these to choose the DBGU,
  96. * USART0 or USART1 as console
  97. */
  98. #define CONFIG_AT91RM9200_USART
  99. #define CONFIG_DBGU
  100. #undef CONFIG_USART0
  101. #undef CONFIG_USART1
  102. /* don't include RTS/CTS flow control support */
  103. #undef CONFIG_HWFLOW
  104. /* disable modem initialization stuff */
  105. #undef CONFIG_MODEM_SUPPORT
  106. #define CONFIG_SYS_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 }
  107. #define CONFIG_BAUDRATE 115200
  108. /*
  109. * Command line configuration.
  110. */
  111. #include <config_cmd_default.h>
  112. #define CONFIG_CMD_DHCP
  113. #define CONFIG_CMD_FAT
  114. #define CONFIG_CMD_MII
  115. #define CONFIG_CMD_PING
  116. #undef CONFIG_CMD_BDI
  117. #undef CONFIG_CMD_IMI
  118. #undef CONFIG_CMD_FPGA
  119. #undef CONFIG_CMD_MISC
  120. #undef CONFIG_CMD_LOADS
  121. #include <asm/arch/AT91RM9200.h> /* needed for port definitions */
  122. /* Options for MMC/SD Card */
  123. #define CONFIG_DOS_PARTITION 1
  124. #undef CONFIG_MMC
  125. #define CONFIG_SYS_MMC_BASE 0xFFFB4000
  126. #define CONFIG_SYS_MMC_BLOCKSIZE 512
  127. /*
  128. * Network Driver Setting
  129. */
  130. #define CONFIG_NET_MULTI 1
  131. #ifdef CONFIG_NET_MULTI
  132. #define CONFIG_DRIVER_AT91EMAC 1
  133. #define CONFIG_SYS_RX_ETH_BUFFER 8
  134. #else
  135. #define CONFIG_DRIVER_ETHER 1
  136. #endif
  137. #define CONFIG_NET_RETRY_COUNT 20
  138. #define CONFIG_AT91C_USE_RMII
  139. /*
  140. * AC Characteristics
  141. * DLYBS = tCSS = 250ns min and DLYBCT = tCSH = 250ns
  142. */
  143. #define DATAFLASH_TCSS (0xC << 16)
  144. #define DATAFLASH_TCHS (0x1 << 24)
  145. #if defined(CONFIG_HAS_DATAFLASH)
  146. #define CONFIG_SYS_SPI_WRITE_TOUT (5 * CONFIG_SYS_HZ)
  147. #define CONFIG_SYS_MAX_DATAFLASH_BANKS 2
  148. #define CONFIG_SYS_MAX_DATAFLASH_PAGES 16384
  149. /* Logical adress for CS0 */
  150. #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000
  151. /* Logical adress for CS3 */
  152. #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 0xD0000000
  153. #define CONFIG_SYS_SUPPORT_BLOCK_ERASE 1
  154. #define CONFIG_SYS_DATAFLASH_MMC_PIO AT91C_PIO_PB22
  155. #endif
  156. /*
  157. * NOR Flash
  158. */
  159. #define CONFIG_SYS_FLASH_BASE 0x10000000
  160. #define PHYS_FLASH_SIZE 0x800000 /* 8MB */
  161. #define CONFIG_SYS_FLASH_CFI 1
  162. #define CONFIG_FLASH_CFI_DRIVER 1
  163. #define CONFIG_SYS_MAX_FLASH_BANKS 1
  164. #define CONFIG_SYS_MAX_FLASH_SECT 256
  165. #define CONFIG_SYS_FLASH_PROTECTION
  166. /*
  167. * Environment Settings
  168. */
  169. #ifdef CONFIG_ENV_IS_IN_DATAFLASH
  170. /*
  171. * Datasflash Environment Settings
  172. */
  173. #define CONFIG_ENV_OFFSET 0x4200
  174. #define CONFIG_ENV_ADDR \
  175. (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET)
  176. /* 8 * 1056 really , but start.s is not OK with this*/
  177. #define CONFIG_ENV_SIZE 0x2000
  178. #else
  179. /*
  180. * NOR Flash Environment Settings
  181. */
  182. #define CONFIG_ENV_IS_IN_FLASH 1
  183. #ifdef CONFIG_SKIP_LOWLEVEL_INIT
  184. /*
  185. * between boot.bin and u-boot.bin.gz
  186. */
  187. #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0xe000)
  188. #define CONFIG_ENV_SIZE 0x10000 /* sectors are 64K here */
  189. #else
  190. /*
  191. * after u-boot.bin
  192. */
  193. #define CONFIG_ENV_ADDR \
  194. (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN)
  195. #define CONFIG_ENV_SIZE 0x10000 /* sectors are 64K here */
  196. /* The following #defines are needed to get flash environment right */
  197. #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
  198. #define CONFIG_SYS_MONITOR_LEN \
  199. (CONFIG_SYS_BOOT_SIZE + CONFIG_SYS_U_BOOT_SIZE)
  200. #endif /* CONFIG_SKIP_LOWLEVEL_INIT */
  201. #endif /* CONFIG_ENV_IS_IN_DATAFLASH */
  202. /*
  203. * Boot option
  204. */
  205. #define CONFIG_BOOTDELAY 3
  206. #ifdef CONFIG_SKIP_LOWLEVEL_INIT
  207. /* boot.bin, env, u-boot.bin.gz */
  208. #define CONFIG_SYS_BOOT_SIZE 0x6000 /* 24 KBytes */
  209. #define CONFIG_SYS_U_BOOT_BASE (CONFIG_SYS_FLASH_BASE + 0x10000)
  210. #define CONFIG_SYS_U_BOOT_SIZE 0x10000 /* 64 KBytes */
  211. #else
  212. /* u-boot.bin */
  213. #define CONFIG_SYS_BOOT_SIZE 0x0 /* 0 KBytes */
  214. #define CONFIG_SYS_U_BOOT_BASE CONFIG_SYS_FLASH_BASE
  215. #define CONFIG_SYS_U_BOOT_SIZE 0x40000 /* 128 KBytes */
  216. #endif /* CONFIG_SKIP_LOWLEVEL_INIT */
  217. #define CONFIG_SYS_LOAD_ADDR 0x21000000 /* default load address */
  218. #define CONFIG_ENV_OVERWRITE 1
  219. /*
  220. * USB Config
  221. */
  222. #define CONFIG_CMD_USB
  223. #define CONFIG_USB_OHCI_NEW 1
  224. #define CONFIG_USB_KEYBOARD 1
  225. #define CONFIG_USB_STORAGE 1
  226. #define CONFIG_DOS_PARTITION 1
  227. #undef CONFIG_SYS_USB_OHCI_BOARD_INIT
  228. #define CONFIG_SYS_USB_OHCI_CPU_INIT 1
  229. #define CONFIG_SYS_USB_OHCI_REGS_BASE AT91_USB_HOST_BASE
  230. #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91rm9200"
  231. #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 15
  232. /*
  233. * I2C
  234. */
  235. #define CONFIG_HARD_I2C
  236. #ifdef CONFIG_HARD_I2C
  237. #define CONFIG_CMD_I2C
  238. #define CONFIG_SYS_I2C_SPEED 0 /* not used */
  239. #define CONFIG_SYS_I2C_SLAVE 0 /* not used */
  240. #endif
  241. /*
  242. * Shell Settings
  243. */
  244. #define CONFIG_CMDLINE_EDITING 1
  245. #define CONFIG_SYS_LONGHELP 1
  246. #define CONFIG_AUTO_COMPLETE 1
  247. #define CONFIG_SYS_HUSH_PARSER 1
  248. #define CONFIG_SYS_PROMPT "U-Boot> "
  249. #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
  250. #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
  251. #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
  252. /* Print Buffer Size */
  253. #define CONFIG_SYS_PBSIZE \
  254. (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
  255. #ifndef __ASSEMBLY__
  256. /*-----------------------------------------------------------------------
  257. * Board specific extension for bd_info
  258. *
  259. * This structure is embedded in the global bd_info (bd_t) structure
  260. * and can be used by the board specific code (eg board/...)
  261. */
  262. struct bd_info_ext {
  263. /* helper variable for board environment handling
  264. *
  265. * env_crc_valid == 0 => uninitialised
  266. * env_crc_valid > 0 => environment crc in flash is valid
  267. * env_crc_valid < 0 => environment crc in flash is invalid
  268. */
  269. int env_crc_valid;
  270. };
  271. #endif
  272. #define CONFIG_SYS_HZ 1000
  273. /*
  274. * AT91C_TC0_CMR is implicitly set to
  275. * AT91C_TC_TIMER_DIV1_CLOCK
  276. */
  277. #define CONFIG_SYS_HZ_CLOCK (AT91C_MASTER_CLOCK / 2)
  278. /*
  279. * Size of malloc() pool
  280. */
  281. #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128 * 1024 \
  282. , 0x1000)
  283. /* size in bytes reserved for initial data */
  284. #define CONFIG_SYS_GBL_DATA_SIZE 128
  285. #define CONFIG_STACKSIZE (32 * 1024) /* regular stack */
  286. #define CONFIG_STACKSIZE_IRQ (4 * 1024) /* Unsure if to big or to small*/
  287. #define CONFIG_STACKSIZE_FIQ (4 * 1024) /* Unsure if to big or to small*/
  288. #endif