XPEDITE1000.h 12 KB

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  1. /*
  2. * (C) Copyright 2002 Scott McNutt <smcnutt@artesyncp.com>
  3. *
  4. * See file CREDITS for list of people who contributed to this
  5. * project.
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License as
  9. * published by the Free Software Foundation; either version 2 of
  10. * the License, or (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  20. * MA 02111-1307 USA
  21. */
  22. /*
  23. * config for XPedite1000 from XES Inc.
  24. * Ported from EBONY config by Travis B. Sawyer <tsawyer@sandburst.com>
  25. * (C) Copyright 2003 Sandburst Corporation
  26. * board/config_EBONY.h - configuration for AMCC 440GP Ref (Ebony)
  27. */
  28. #ifndef __CONFIG_H
  29. #define __CONFIG_H
  30. /* High Level Configuration Options */
  31. #define CONFIG_XPEDITE1000 1
  32. #define CONFIG_SYS_BOARD_NAME "XPedite1000"
  33. #define CONFIG_4xx 1 /* ... PPC4xx family */
  34. #define CONFIG_440 1
  35. #define CONFIG_440GX 1 /* 440 GX */
  36. #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */
  37. #define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */
  38. #define CONFIG_SYS_TEXT_BASE 0xFFF80000
  39. /*
  40. * DDR config
  41. */
  42. #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for setup */
  43. #define SPD_EEPROM_ADDRESS {0x54} /* SPD i2c spd addresses */
  44. #define CONFIG_VERY_BIG_RAM 1
  45. /*
  46. * Base addresses -- Note these are effective addresses where the
  47. * actual resources get mapped (not physical addresses)
  48. */
  49. #define CONFIG_SYS_SDRAM_BASE 0x00000000
  50. #define CONFIG_SYS_FLASH_BASE 0xff000000 /* start of FLASH */
  51. #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */
  52. #define CONFIG_SYS_PCI_MEMBASE 0x80000000 /* mapped pci memory */
  53. #define CONFIG_SYS_ISRAM_BASE 0xc0000000 /* internal SRAM */
  54. #define CONFIG_SYS_PCI_BASE 0xd0000000 /* internal PCI regs */
  55. #define CONFIG_SYS_NVRAM_BASE_ADDR (CONFIG_SYS_PERIPHERAL_BASE + 0x08000000)
  56. #define CONFIG_SYS_GPIO_BASE (CONFIG_SYS_PERIPHERAL_BASE + 0x00000700)
  57. /*
  58. * Diagnostics
  59. */
  60. #define CONFIG_SYS_ALT_MEMTEST
  61. #define CONFIG_SYS_MEMTEST_START 0x0400000
  62. #define CONFIG_SYS_MEMTEST_END 0x0C00000
  63. /* POST support */
  64. #define CONFIG_POST (CONFIG_SYS_POST_RTC | \
  65. CONFIG_SYS_POST_I2C)
  66. /*
  67. * LED support
  68. */
  69. #define USR_LED0 0x00000080
  70. #define USR_LED1 0x00000100
  71. #define USR_LED2 0x00000200
  72. #define USR_LED3 0x00000400
  73. #ifndef __ASSEMBLY__
  74. extern unsigned long in32(unsigned int);
  75. extern void out32(unsigned int, unsigned long);
  76. #define LED0_ON() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) & ~USR_LED0))
  77. #define LED1_ON() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) & ~USR_LED1))
  78. #define LED2_ON() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) & ~USR_LED2))
  79. #define LED3_ON() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) & ~USR_LED3))
  80. #define LED0_OFF() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) | USR_LED0))
  81. #define LED1_OFF() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) | USR_LED1))
  82. #define LED2_OFF() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) | USR_LED2))
  83. #define LED3_OFF() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) | USR_LED3))
  84. #endif
  85. /*
  86. * Use internal SRAM for initial stack
  87. */
  88. #define CONFIG_SYS_TEMP_STACK_OCM 1
  89. #define CONFIG_SYS_OCM_DATA_ADDR CONFIG_SYS_ISRAM_BASE
  90. #define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_ISRAM_BASE /* Initial RAM address */
  91. #define CONFIG_SYS_INIT_RAM_END 0x2000 /* End of used area in RAM */
  92. #define CONFIG_SYS_GBL_DATA_SIZE 128 /* num bytes initial data */
  93. #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
  94. #define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET - 0x4)
  95. #define CONFIG_SYS_MONITOR_LEN (512 * 1024) /* Reserve 512 KB for Mon */
  96. #define CONFIG_SYS_MALLOC_LEN (1024 * 1024) /* Reserved for malloc */
  97. /*
  98. * Serial Port
  99. */
  100. #define CONFIG_CONS_INDEX 1 /* Use UART0 */
  101. #define CONFIG_SYS_NS16550
  102. #define CONFIG_SYS_NS16550_SERIAL
  103. #define CONFIG_SYS_NS16550_REG_SIZE 1
  104. #define CONFIG_SYS_NS16550_CLK get_serial_clock()
  105. #define CONFIG_SYS_BAUDRATE_TABLE \
  106. {300, 600, 1200, 2400, 4800, 9600, 19200, 38400}
  107. #define CONFIG_BAUDRATE 115200
  108. #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
  109. #define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
  110. /*
  111. * Use the HUSH parser
  112. */
  113. #define CONFIG_SYS_HUSH_PARSER
  114. #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
  115. /*
  116. * NOR flash configuration
  117. */
  118. #define CONFIG_SYS_MAX_FLASH_BANKS 3
  119. #define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE, 0xf0000000, 0xf4000000 }
  120. #define CONFIG_SYS_MAX_FLASH_SECT 512 /* sectors per device */
  121. #define CONFIG_FLASH_CFI_DRIVER
  122. #define CONFIG_SYS_FLASH_CFI
  123. #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
  124. #define CONFIG_SYS_FLASH_QUIET_TEST /* MirrorBit flashes are optional */
  125. #define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
  126. #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
  127. /*
  128. * I2C
  129. */
  130. #define CONFIG_HARD_I2C 1 /* I2C with hardware support */
  131. #define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
  132. #define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
  133. #define CONFIG_SYS_I2C_SLAVE 0x7f
  134. #define CONFIG_I2C_MULTI_BUS
  135. /* I2C EEPROM */
  136. #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
  137. #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
  138. #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
  139. #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10
  140. /* I2C RTC: STMicro M41T00 */
  141. #define CONFIG_RTC_M41T11 1
  142. #define CONFIG_SYS_I2C_RTC_ADDR 0x68
  143. #define CONFIG_SYS_M41T11_BASE_YEAR 2000
  144. /*
  145. * PCI
  146. */
  147. /* General PCI */
  148. #define CONFIG_PCI /* include pci support */
  149. #define CONFIG_PCI_PNP /* do pci plug-and-play */
  150. #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
  151. #define CONFIG_SYS_PCI_TARGBASE 0x80000000 /* PCIaddr mapped to CONFIG_SYS_PCI_MEMBASE */
  152. /* Board-specific PCI */
  153. #define CONFIG_SYS_PCI_TARGET_INIT /* let board init pci target */
  154. #define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x1014 /* IBM */
  155. #define CONFIG_SYS_PCI_SUBSYS_DEVICEID 0xcafe /* Whatever */
  156. #define CONFIG_SYS_PCI_FORCE_PCI_CONV /* Force PCI Conventional Mode */
  157. /*
  158. * Networking options
  159. */
  160. #define CONFIG_PPC4xx_EMAC
  161. #define CONFIG_PHY_GIGE 1 /* Include GbE speed/duplex detection */
  162. #define CONFIG_NET_MULTI 1
  163. #define CONFIG_MII 1 /* MII PHY management */
  164. #define CONFIG_PHY_RESET 1 /* reset phy upon startup */
  165. #define CONFIG_SYS_RX_ETH_BUFFER 32 /* Number of ethernet rx buffers & descriptors */
  166. #define CONFIG_ETHPRIME "ppc_4xx_eth2"
  167. #define CONFIG_PHY_ADDR 4 /* PHY address phy0 not populated */
  168. #define CONFIG_PHY2_ADDR 4 /* PHY address phy2 */
  169. #define CONFIG_HAS_ETH2 1 /* add support for "eth2addr" */
  170. #define CONFIG_PHY3_ADDR 8 /* PHY address phy3 */
  171. #define CONFIG_HAS_ETH3 1 /* add support for "eth3addr" */
  172. /* BOOTP options */
  173. #define CONFIG_BOOTP_BOOTFILESIZE
  174. #define CONFIG_BOOTP_BOOTPATH
  175. #define CONFIG_BOOTP_GATEWAY
  176. #define CONFIG_BOOTP_HOSTNAME
  177. /*
  178. * Command configuration
  179. */
  180. #include <config_cmd_default.h>
  181. #define CONFIG_CMD_ASKENV
  182. #define CONFIG_CMD_DATE
  183. #define CONFIG_CMD_DHCP
  184. #define CONFIG_CMD_EEPROM
  185. #define CONFIG_CMD_ELF
  186. #define CONFIG_CMD_FLASH
  187. #define CONFIG_CMD_I2C
  188. #define CONFIG_CMD_IRQ
  189. #define CONFIG_CMD_JFFS2
  190. #define CONFIG_CMD_MII
  191. #define CONFIG_CMD_NET
  192. #define CONFIG_CMD_PCI
  193. #define CONFIG_CMD_PING
  194. #define CONFIG_CMD_SAVEENV
  195. #define CONFIG_CMD_SNTP
  196. /*
  197. * Miscellaneous configurable options
  198. */
  199. #define CONFIG_SYS_LONGHELP /* undef to save memory */
  200. #define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
  201. #define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
  202. #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
  203. #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
  204. #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
  205. #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
  206. #define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
  207. #define CONFIG_CMDLINE_EDITING 1 /* Command-line editing */
  208. #define CONFIG_BOOTDELAY 3 /* -1 disables auto-boot */
  209. #define CONFIG_PANIC_HANG /* do not reset board on panic */
  210. #define CONFIG_PREBOOT /* enable preboot variable */
  211. #define CONFIG_FIT 1
  212. #define CONFIG_FIT_VERBOSE 1
  213. #define CONFIG_INTEGRITY /* support booting INTEGRITY OS */
  214. #define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_into (bd_t) */
  215. /*
  216. * For booting Linux, the board info and command line data
  217. * have to be in the first 8 MB of memory, since this is
  218. * the maximum mapped by the Linux kernel during initialization.
  219. */
  220. #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
  221. /*
  222. * Environment Configuration
  223. */
  224. #define CONFIG_ENV_IS_IN_FLASH 1
  225. #define CONFIG_ENV_SECT_SIZE 0x20000 /* 128k (one sector) for env */
  226. #define CONFIG_ENV_SIZE 0x8000
  227. #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - (256 * 1024))
  228. /*
  229. * Flash memory map:
  230. * fff80000 - ffffffff U-Boot (512 KB)
  231. * fff40000 - fff7ffff U-Boot Environment (256 KB)
  232. * fff00000 - fff3ffff FDT (256KB)
  233. * ffc00000 - ffefffff OS image (3MB)
  234. * ff000000 - ffbfffff OS Use/Filesystem (12MB)
  235. */
  236. #define CONFIG_UBOOT_ENV_ADDR MK_STR(CONFIG_SYS_TEXT_BASE)
  237. #define CONFIG_FDT_ENV_ADDR MK_STR(0xfff00000)
  238. #define CONFIG_OS_ENV_ADDR MK_STR(0xffc00000)
  239. #define CONFIG_PROG_UBOOT \
  240. "$download_cmd $loadaddr $ubootfile; " \
  241. "if test $? -eq 0; then " \
  242. "protect off "CONFIG_UBOOT_ENV_ADDR" +80000; " \
  243. "erase "CONFIG_UBOOT_ENV_ADDR" +80000; " \
  244. "cp.w $loadaddr "CONFIG_UBOOT_ENV_ADDR" 40000; " \
  245. "protect on "CONFIG_UBOOT_ENV_ADDR" +80000; " \
  246. "cmp.b $loadaddr "CONFIG_UBOOT_ENV_ADDR" 80000; " \
  247. "if test $? -ne 0; then " \
  248. "echo PROGRAM FAILED; " \
  249. "else; " \
  250. "echo PROGRAM SUCCEEDED; " \
  251. "fi; " \
  252. "else; " \
  253. "echo DOWNLOAD FAILED; " \
  254. "fi;"
  255. #define CONFIG_BOOT_OS_NET \
  256. "$download_cmd $osaddr $osfile; " \
  257. "if test $? -eq 0; then " \
  258. "if test -n $fdtaddr; then " \
  259. "$download_cmd $fdtaddr $fdtfile; " \
  260. "if test $? -eq 0; then " \
  261. "bootm $osaddr - $fdtaddr; " \
  262. "else; " \
  263. "echo FDT DOWNLOAD FAILED; " \
  264. "fi; " \
  265. "else; " \
  266. "bootm $osaddr; " \
  267. "fi; " \
  268. "else; " \
  269. "echo OS DOWNLOAD FAILED; " \
  270. "fi;"
  271. #define CONFIG_PROG_OS \
  272. "$download_cmd $osaddr $osfile; " \
  273. "if test $? -eq 0; then " \
  274. "erase "CONFIG_OS_ENV_ADDR" +$filesize; " \
  275. "cp.b $osaddr "CONFIG_OS_ENV_ADDR" $filesize; " \
  276. "cmp.b $osaddr "CONFIG_OS_ENV_ADDR" $filesize; " \
  277. "if test $? -ne 0; then " \
  278. "echo OS PROGRAM FAILED; " \
  279. "else; " \
  280. "echo OS PROGRAM SUCCEEDED; " \
  281. "fi; " \
  282. "else; " \
  283. "echo OS DOWNLOAD FAILED; " \
  284. "fi;"
  285. #define CONFIG_PROG_FDT \
  286. "$download_cmd $fdtaddr $fdtfile; " \
  287. "if test $? -eq 0; then " \
  288. "erase "CONFIG_FDT_ENV_ADDR" +$filesize;" \
  289. "cp.b $fdtaddr "CONFIG_FDT_ENV_ADDR" $filesize; " \
  290. "cmp.b $fdtaddr "CONFIG_FDT_ENV_ADDR" $filesize; " \
  291. "if test $? -ne 0; then " \
  292. "echo FDT PROGRAM FAILED; " \
  293. "else; " \
  294. "echo FDT PROGRAM SUCCEEDED; " \
  295. "fi; " \
  296. "else; " \
  297. "echo FDT DOWNLOAD FAILED; " \
  298. "fi;"
  299. #define CONFIG_EXTRA_ENV_SETTINGS \
  300. "autoload=yes\0" \
  301. "download_cmd=tftp\0" \
  302. "console_args=console=ttyS0,115200\0" \
  303. "root_args=root=/dev/nfs rw\0" \
  304. "misc_args=ip=on\0" \
  305. "set_bootargs=setenv bootargs ${console_args} ${root_args} ${misc_args}\0" \
  306. "bootfile=/home/user/file\0" \
  307. "osfile=/home/user/uImage-XPedite1000\0" \
  308. "fdtfile=/home/user/xpedite1000.dtb\0" \
  309. "ubootfile=/home/user/u-boot.bin\0" \
  310. "fdtaddr=c00000\0" \
  311. "osaddr=0x1000000\0" \
  312. "loadaddr=0x1000000\0" \
  313. "prog_uboot="CONFIG_PROG_UBOOT"\0" \
  314. "prog_os="CONFIG_PROG_OS"\0" \
  315. "prog_fdt="CONFIG_PROG_FDT"\0" \
  316. "bootcmd_net=run set_bootargs; "CONFIG_BOOT_OS_NET"\0" \
  317. "bootcmd_flash=run set_bootargs; " \
  318. "bootm "CONFIG_OS_ENV_ADDR" - "CONFIG_FDT_ENV_ADDR"\0" \
  319. "bootcmd=run bootcmd_flash\0"
  320. #endif /* __CONFIG_H */