ohci-hcd.c 52 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406140714081409141014111412141314141415141614171418141914201421142214231424142514261427142814291430143114321433143414351436143714381439144014411442144314441445144614471448144914501451145214531454145514561457145814591460146114621463146414651466146714681469147014711472147314741475147614771478147914801481148214831484148514861487148814891490149114921493149414951496149714981499150015011502150315041505150615071508150915101511151215131514151515161517151815191520152115221523152415251526152715281529153015311532153315341535153615371538153915401541154215431544154515461547154815491550155115521553155415551556155715581559156015611562156315641565156615671568156915701571157215731574157515761577157815791580158115821583158415851586158715881589159015911592159315941595159615971598159916001601160216031604160516061607160816091610161116121613161416151616161716181619162016211622162316241625162616271628162916301631163216331634163516361637163816391640164116421643164416451646164716481649165016511652165316541655165616571658165916601661166216631664166516661667166816691670167116721673167416751676167716781679168016811682168316841685168616871688168916901691169216931694169516961697169816991700170117021703170417051706170717081709171017111712171317141715171617171718171917201721172217231724172517261727172817291730173117321733173417351736173717381739174017411742174317441745174617471748174917501751175217531754175517561757175817591760176117621763176417651766176717681769177017711772177317741775177617771778177917801781178217831784178517861787178817891790179117921793179417951796179717981799180018011802180318041805180618071808180918101811181218131814181518161817181818191820182118221823182418251826182718281829183018311832183318341835183618371838183918401841184218431844184518461847184818491850185118521853185418551856185718581859186018611862186318641865186618671868186918701871187218731874187518761877187818791880188118821883188418851886188718881889189018911892189318941895189618971898189919001901190219031904190519061907190819091910191119121913191419151916191719181919192019211922192319241925192619271928192919301931193219331934193519361937193819391940194119421943194419451946194719481949195019511952195319541955195619571958195919601961196219631964196519661967196819691970197119721973197419751976197719781979198019811982198319841985198619871988198919901991199219931994199519961997199819992000200120022003200420052006200720082009
  1. /*
  2. * URB OHCI HCD (Host Controller Driver) for USB on the AT91RM9200 and PCI bus.
  3. *
  4. * Interrupt support is added. Now, it has been tested
  5. * on ULI1575 chip and works well with USB keyboard.
  6. *
  7. * (C) Copyright 2007
  8. * Zhang Wei, Freescale Semiconductor, Inc. <wei.zhang@freescale.com>
  9. *
  10. * (C) Copyright 2003
  11. * Gary Jennejohn, DENX Software Engineering <garyj@denx.de>
  12. *
  13. * Note: Much of this code has been derived from Linux 2.4
  14. * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
  15. * (C) Copyright 2000-2002 David Brownell
  16. *
  17. * Modified for the MP2USB by (C) Copyright 2005 Eric Benard
  18. * ebenard@eukrea.com - based on s3c24x0's driver
  19. *
  20. * See file CREDITS for list of people who contributed to this
  21. * project.
  22. *
  23. * This program is free software; you can redistribute it and/or
  24. * modify it under the terms of the GNU General Public License as
  25. * published by the Free Software Foundation; either version 2 of
  26. * the License, or (at your option) any later version.
  27. *
  28. * This program is distributed in the hope that it will be useful,
  29. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  30. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  31. * GNU General Public License for more details.
  32. *
  33. * You should have received a copy of the GNU General Public License
  34. * along with this program; if not, write to the Free Software
  35. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  36. * MA 02111-1307 USA
  37. *
  38. */
  39. /*
  40. * IMPORTANT NOTES
  41. * 1 - Read doc/README.generic_usb_ohci
  42. * 2 - this driver is intended for use with USB Mass Storage Devices
  43. * (BBB) and USB keyboard. There is NO support for Isochronous pipes!
  44. * 2 - when running on a PQFP208 AT91RM9200, define CONFIG_AT91C_PQFP_UHPBUG
  45. * to activate workaround for bug #41 or this driver will NOT work!
  46. */
  47. #include <common.h>
  48. #include <asm/byteorder.h>
  49. #if defined(CONFIG_PCI_OHCI)
  50. # include <pci.h>
  51. #if !defined(CONFIG_PCI_OHCI_DEVNO)
  52. #define CONFIG_PCI_OHCI_DEVNO 0
  53. #endif
  54. #endif
  55. #include <malloc.h>
  56. #include <usb.h>
  57. #include "ohci.h"
  58. #ifdef CONFIG_AT91RM9200
  59. #include <asm/arch/hardware.h> /* needed for AT91_USB_HOST_BASE */
  60. #endif
  61. #if defined(CONFIG_ARM920T) || \
  62. defined(CONFIG_S3C24X0) || \
  63. defined(CONFIG_S3C6400) || \
  64. defined(CONFIG_440EP) || \
  65. defined(CONFIG_PCI_OHCI) || \
  66. defined(CONFIG_MPC5200) || \
  67. defined(CONFIG_SYS_OHCI_USE_NPS)
  68. # define OHCI_USE_NPS /* force NoPowerSwitching mode */
  69. #endif
  70. #undef OHCI_VERBOSE_DEBUG /* not always helpful */
  71. #undef DEBUG
  72. #undef SHOW_INFO
  73. #undef OHCI_FILL_TRACE
  74. /* For initializing controller (mask in an HCFS mode too) */
  75. #define OHCI_CONTROL_INIT \
  76. (OHCI_CTRL_CBSR & 0x3) | OHCI_CTRL_IE | OHCI_CTRL_PLE
  77. #define min_t(type, x, y) \
  78. ({ type __x = (x); type __y = (y); __x < __y ? __x: __y; })
  79. #ifdef CONFIG_PCI_OHCI
  80. static struct pci_device_id ohci_pci_ids[] = {
  81. {0x10b9, 0x5237}, /* ULI1575 PCI OHCI module ids */
  82. {0x1033, 0x0035}, /* NEC PCI OHCI module ids */
  83. {0x1131, 0x1561}, /* Philips 1561 PCI OHCI module ids */
  84. /* Please add supported PCI OHCI controller ids here */
  85. {0, 0}
  86. };
  87. #endif
  88. #ifdef CONFIG_PCI_EHCI_DEVNO
  89. static struct pci_device_id ehci_pci_ids[] = {
  90. {0x1131, 0x1562}, /* Philips 1562 PCI EHCI module ids */
  91. /* Please add supported PCI EHCI controller ids here */
  92. {0, 0}
  93. };
  94. #endif
  95. #ifdef DEBUG
  96. #define dbg(format, arg...) printf("DEBUG: " format "\n", ## arg)
  97. #else
  98. #define dbg(format, arg...) do {} while (0)
  99. #endif /* DEBUG */
  100. #define err(format, arg...) printf("ERROR: " format "\n", ## arg)
  101. #ifdef SHOW_INFO
  102. #define info(format, arg...) printf("INFO: " format "\n", ## arg)
  103. #else
  104. #define info(format, arg...) do {} while (0)
  105. #endif
  106. #ifdef CONFIG_SYS_OHCI_BE_CONTROLLER
  107. # define m16_swap(x) cpu_to_be16(x)
  108. # define m32_swap(x) cpu_to_be32(x)
  109. #else
  110. # define m16_swap(x) cpu_to_le16(x)
  111. # define m32_swap(x) cpu_to_le32(x)
  112. #endif /* CONFIG_SYS_OHCI_BE_CONTROLLER */
  113. /* global ohci_t */
  114. static ohci_t gohci;
  115. /* this must be aligned to a 256 byte boundary */
  116. struct ohci_hcca ghcca[1];
  117. /* a pointer to the aligned storage */
  118. struct ohci_hcca *phcca;
  119. /* this allocates EDs for all possible endpoints */
  120. struct ohci_device ohci_dev;
  121. /* device which was disconnected */
  122. struct usb_device *devgone;
  123. static inline u32 roothub_a(struct ohci *hc)
  124. { return ohci_readl(&hc->regs->roothub.a); }
  125. static inline u32 roothub_b(struct ohci *hc)
  126. { return ohci_readl(&hc->regs->roothub.b); }
  127. static inline u32 roothub_status(struct ohci *hc)
  128. { return ohci_readl(&hc->regs->roothub.status); }
  129. static inline u32 roothub_portstatus(struct ohci *hc, int i)
  130. { return ohci_readl(&hc->regs->roothub.portstatus[i]); }
  131. /* forward declaration */
  132. static int hc_interrupt(void);
  133. static void td_submit_job(struct usb_device *dev, unsigned long pipe,
  134. void *buffer, int transfer_len,
  135. struct devrequest *setup, urb_priv_t *urb,
  136. int interval);
  137. /*-------------------------------------------------------------------------*
  138. * URB support functions
  139. *-------------------------------------------------------------------------*/
  140. /* free HCD-private data associated with this URB */
  141. static void urb_free_priv(urb_priv_t *urb)
  142. {
  143. int i;
  144. int last;
  145. struct td *td;
  146. last = urb->length - 1;
  147. if (last >= 0) {
  148. for (i = 0; i <= last; i++) {
  149. td = urb->td[i];
  150. if (td) {
  151. td->usb_dev = NULL;
  152. urb->td[i] = NULL;
  153. }
  154. }
  155. }
  156. free(urb);
  157. }
  158. /*-------------------------------------------------------------------------*/
  159. #ifdef DEBUG
  160. static int sohci_get_current_frame_number(struct usb_device *dev);
  161. /* debug| print the main components of an URB
  162. * small: 0) header + data packets 1) just header */
  163. static void pkt_print(urb_priv_t *purb, struct usb_device *dev,
  164. unsigned long pipe, void *buffer, int transfer_len,
  165. struct devrequest *setup, char *str, int small)
  166. {
  167. dbg("%s URB:[%4x] dev:%2lu,ep:%2lu-%c,type:%s,len:%d/%d stat:%#lx",
  168. str,
  169. sohci_get_current_frame_number(dev),
  170. usb_pipedevice(pipe),
  171. usb_pipeendpoint(pipe),
  172. usb_pipeout(pipe)? 'O': 'I',
  173. usb_pipetype(pipe) < 2 ? \
  174. (usb_pipeint(pipe)? "INTR": "ISOC"): \
  175. (usb_pipecontrol(pipe)? "CTRL": "BULK"),
  176. (purb ? purb->actual_length : 0),
  177. transfer_len, dev->status);
  178. #ifdef OHCI_VERBOSE_DEBUG
  179. if (!small) {
  180. int i, len;
  181. if (usb_pipecontrol(pipe)) {
  182. printf(__FILE__ ": cmd(8):");
  183. for (i = 0; i < 8 ; i++)
  184. printf(" %02x", ((__u8 *) setup) [i]);
  185. printf("\n");
  186. }
  187. if (transfer_len > 0 && buffer) {
  188. printf(__FILE__ ": data(%d/%d):",
  189. (purb ? purb->actual_length : 0),
  190. transfer_len);
  191. len = usb_pipeout(pipe)? transfer_len:
  192. (purb ? purb->actual_length : 0);
  193. for (i = 0; i < 16 && i < len; i++)
  194. printf(" %02x", ((__u8 *) buffer) [i]);
  195. printf("%s\n", i < len? "...": "");
  196. }
  197. }
  198. #endif
  199. }
  200. /* just for debugging; prints non-empty branches of the int ed tree
  201. * inclusive iso eds */
  202. void ep_print_int_eds(ohci_t *ohci, char *str)
  203. {
  204. int i, j;
  205. __u32 *ed_p;
  206. for (i = 0; i < 32; i++) {
  207. j = 5;
  208. ed_p = &(ohci->hcca->int_table [i]);
  209. if (*ed_p == 0)
  210. continue;
  211. printf(__FILE__ ": %s branch int %2d(%2x):", str, i, i);
  212. while (*ed_p != 0 && j--) {
  213. ed_t *ed = (ed_t *)m32_swap(ed_p);
  214. printf(" ed: %4x;", ed->hwINFO);
  215. ed_p = &ed->hwNextED;
  216. }
  217. printf("\n");
  218. }
  219. }
  220. static void ohci_dump_intr_mask(char *label, __u32 mask)
  221. {
  222. dbg("%s: 0x%08x%s%s%s%s%s%s%s%s%s",
  223. label,
  224. mask,
  225. (mask & OHCI_INTR_MIE) ? " MIE" : "",
  226. (mask & OHCI_INTR_OC) ? " OC" : "",
  227. (mask & OHCI_INTR_RHSC) ? " RHSC" : "",
  228. (mask & OHCI_INTR_FNO) ? " FNO" : "",
  229. (mask & OHCI_INTR_UE) ? " UE" : "",
  230. (mask & OHCI_INTR_RD) ? " RD" : "",
  231. (mask & OHCI_INTR_SF) ? " SF" : "",
  232. (mask & OHCI_INTR_WDH) ? " WDH" : "",
  233. (mask & OHCI_INTR_SO) ? " SO" : ""
  234. );
  235. }
  236. static void maybe_print_eds(char *label, __u32 value)
  237. {
  238. ed_t *edp = (ed_t *)value;
  239. if (value) {
  240. dbg("%s %08x", label, value);
  241. dbg("%08x", edp->hwINFO);
  242. dbg("%08x", edp->hwTailP);
  243. dbg("%08x", edp->hwHeadP);
  244. dbg("%08x", edp->hwNextED);
  245. }
  246. }
  247. static char *hcfs2string(int state)
  248. {
  249. switch (state) {
  250. case OHCI_USB_RESET: return "reset";
  251. case OHCI_USB_RESUME: return "resume";
  252. case OHCI_USB_OPER: return "operational";
  253. case OHCI_USB_SUSPEND: return "suspend";
  254. }
  255. return "?";
  256. }
  257. /* dump control and status registers */
  258. static void ohci_dump_status(ohci_t *controller)
  259. {
  260. struct ohci_regs *regs = controller->regs;
  261. __u32 temp;
  262. temp = ohci_readl(&regs->revision) & 0xff;
  263. if (temp != 0x10)
  264. dbg("spec %d.%d", (temp >> 4), (temp & 0x0f));
  265. temp = ohci_readl(&regs->control);
  266. dbg("control: 0x%08x%s%s%s HCFS=%s%s%s%s%s CBSR=%d", temp,
  267. (temp & OHCI_CTRL_RWE) ? " RWE" : "",
  268. (temp & OHCI_CTRL_RWC) ? " RWC" : "",
  269. (temp & OHCI_CTRL_IR) ? " IR" : "",
  270. hcfs2string(temp & OHCI_CTRL_HCFS),
  271. (temp & OHCI_CTRL_BLE) ? " BLE" : "",
  272. (temp & OHCI_CTRL_CLE) ? " CLE" : "",
  273. (temp & OHCI_CTRL_IE) ? " IE" : "",
  274. (temp & OHCI_CTRL_PLE) ? " PLE" : "",
  275. temp & OHCI_CTRL_CBSR
  276. );
  277. temp = ohci_readl(&regs->cmdstatus);
  278. dbg("cmdstatus: 0x%08x SOC=%d%s%s%s%s", temp,
  279. (temp & OHCI_SOC) >> 16,
  280. (temp & OHCI_OCR) ? " OCR" : "",
  281. (temp & OHCI_BLF) ? " BLF" : "",
  282. (temp & OHCI_CLF) ? " CLF" : "",
  283. (temp & OHCI_HCR) ? " HCR" : ""
  284. );
  285. ohci_dump_intr_mask("intrstatus", ohci_readl(&regs->intrstatus));
  286. ohci_dump_intr_mask("intrenable", ohci_readl(&regs->intrenable));
  287. maybe_print_eds("ed_periodcurrent",
  288. ohci_readl(&regs->ed_periodcurrent));
  289. maybe_print_eds("ed_controlhead", ohci_readl(&regs->ed_controlhead));
  290. maybe_print_eds("ed_controlcurrent",
  291. ohci_readl(&regs->ed_controlcurrent));
  292. maybe_print_eds("ed_bulkhead", ohci_readl(&regs->ed_bulkhead));
  293. maybe_print_eds("ed_bulkcurrent", ohci_readl(&regs->ed_bulkcurrent));
  294. maybe_print_eds("donehead", ohci_readl(&regs->donehead));
  295. }
  296. static void ohci_dump_roothub(ohci_t *controller, int verbose)
  297. {
  298. __u32 temp, ndp, i;
  299. temp = roothub_a(controller);
  300. ndp = (temp & RH_A_NDP);
  301. #ifdef CONFIG_AT91C_PQFP_UHPBUG
  302. ndp = (ndp == 2) ? 1:0;
  303. #endif
  304. if (verbose) {
  305. dbg("roothub.a: %08x POTPGT=%d%s%s%s%s%s NDP=%d", temp,
  306. ((temp & RH_A_POTPGT) >> 24) & 0xff,
  307. (temp & RH_A_NOCP) ? " NOCP" : "",
  308. (temp & RH_A_OCPM) ? " OCPM" : "",
  309. (temp & RH_A_DT) ? " DT" : "",
  310. (temp & RH_A_NPS) ? " NPS" : "",
  311. (temp & RH_A_PSM) ? " PSM" : "",
  312. ndp
  313. );
  314. temp = roothub_b(controller);
  315. dbg("roothub.b: %08x PPCM=%04x DR=%04x",
  316. temp,
  317. (temp & RH_B_PPCM) >> 16,
  318. (temp & RH_B_DR)
  319. );
  320. temp = roothub_status(controller);
  321. dbg("roothub.status: %08x%s%s%s%s%s%s",
  322. temp,
  323. (temp & RH_HS_CRWE) ? " CRWE" : "",
  324. (temp & RH_HS_OCIC) ? " OCIC" : "",
  325. (temp & RH_HS_LPSC) ? " LPSC" : "",
  326. (temp & RH_HS_DRWE) ? " DRWE" : "",
  327. (temp & RH_HS_OCI) ? " OCI" : "",
  328. (temp & RH_HS_LPS) ? " LPS" : ""
  329. );
  330. }
  331. for (i = 0; i < ndp; i++) {
  332. temp = roothub_portstatus(controller, i);
  333. dbg("roothub.portstatus [%d] = 0x%08x%s%s%s%s%s%s%s%s%s%s%s%s",
  334. i,
  335. temp,
  336. (temp & RH_PS_PRSC) ? " PRSC" : "",
  337. (temp & RH_PS_OCIC) ? " OCIC" : "",
  338. (temp & RH_PS_PSSC) ? " PSSC" : "",
  339. (temp & RH_PS_PESC) ? " PESC" : "",
  340. (temp & RH_PS_CSC) ? " CSC" : "",
  341. (temp & RH_PS_LSDA) ? " LSDA" : "",
  342. (temp & RH_PS_PPS) ? " PPS" : "",
  343. (temp & RH_PS_PRS) ? " PRS" : "",
  344. (temp & RH_PS_POCI) ? " POCI" : "",
  345. (temp & RH_PS_PSS) ? " PSS" : "",
  346. (temp & RH_PS_PES) ? " PES" : "",
  347. (temp & RH_PS_CCS) ? " CCS" : ""
  348. );
  349. }
  350. }
  351. static void ohci_dump(ohci_t *controller, int verbose)
  352. {
  353. dbg("OHCI controller usb-%s state", controller->slot_name);
  354. /* dumps some of the state we know about */
  355. ohci_dump_status(controller);
  356. if (verbose)
  357. ep_print_int_eds(controller, "hcca");
  358. dbg("hcca frame #%04x", controller->hcca->frame_no);
  359. ohci_dump_roothub(controller, 1);
  360. }
  361. #endif /* DEBUG */
  362. /*-------------------------------------------------------------------------*
  363. * Interface functions (URB)
  364. *-------------------------------------------------------------------------*/
  365. /* get a transfer request */
  366. int sohci_submit_job(urb_priv_t *urb, struct devrequest *setup)
  367. {
  368. ohci_t *ohci;
  369. ed_t *ed;
  370. urb_priv_t *purb_priv = urb;
  371. int i, size = 0;
  372. struct usb_device *dev = urb->dev;
  373. unsigned long pipe = urb->pipe;
  374. void *buffer = urb->transfer_buffer;
  375. int transfer_len = urb->transfer_buffer_length;
  376. int interval = urb->interval;
  377. ohci = &gohci;
  378. /* when controller's hung, permit only roothub cleanup attempts
  379. * such as powering down ports */
  380. if (ohci->disabled) {
  381. err("sohci_submit_job: EPIPE");
  382. return -1;
  383. }
  384. /* we're about to begin a new transaction here so mark the
  385. * URB unfinished */
  386. urb->finished = 0;
  387. /* every endpoint has a ed, locate and fill it */
  388. ed = ep_add_ed(dev, pipe, interval, 1);
  389. if (!ed) {
  390. err("sohci_submit_job: ENOMEM");
  391. return -1;
  392. }
  393. /* for the private part of the URB we need the number of TDs (size) */
  394. switch (usb_pipetype(pipe)) {
  395. case PIPE_BULK: /* one TD for every 4096 Byte */
  396. size = (transfer_len - 1) / 4096 + 1;
  397. break;
  398. case PIPE_CONTROL:/* 1 TD for setup, 1 for ACK and 1 for every 4096 B */
  399. size = (transfer_len == 0)? 2:
  400. (transfer_len - 1) / 4096 + 3;
  401. break;
  402. case PIPE_INTERRUPT: /* 1 TD */
  403. size = 1;
  404. break;
  405. }
  406. ed->purb = urb;
  407. if (size >= (N_URB_TD - 1)) {
  408. err("need %d TDs, only have %d", size, N_URB_TD);
  409. return -1;
  410. }
  411. purb_priv->pipe = pipe;
  412. /* fill the private part of the URB */
  413. purb_priv->length = size;
  414. purb_priv->ed = ed;
  415. purb_priv->actual_length = 0;
  416. /* allocate the TDs */
  417. /* note that td[0] was allocated in ep_add_ed */
  418. for (i = 0; i < size; i++) {
  419. purb_priv->td[i] = td_alloc(dev);
  420. if (!purb_priv->td[i]) {
  421. purb_priv->length = i;
  422. urb_free_priv(purb_priv);
  423. err("sohci_submit_job: ENOMEM");
  424. return -1;
  425. }
  426. }
  427. if (ed->state == ED_NEW || (ed->state & ED_DEL)) {
  428. urb_free_priv(purb_priv);
  429. err("sohci_submit_job: EINVAL");
  430. return -1;
  431. }
  432. /* link the ed into a chain if is not already */
  433. if (ed->state != ED_OPER)
  434. ep_link(ohci, ed);
  435. /* fill the TDs and link it to the ed */
  436. td_submit_job(dev, pipe, buffer, transfer_len,
  437. setup, purb_priv, interval);
  438. return 0;
  439. }
  440. static inline int sohci_return_job(struct ohci *hc, urb_priv_t *urb)
  441. {
  442. struct ohci_regs *regs = hc->regs;
  443. switch (usb_pipetype(urb->pipe)) {
  444. case PIPE_INTERRUPT:
  445. /* implicitly requeued */
  446. if (urb->dev->irq_handle &&
  447. (urb->dev->irq_act_len = urb->actual_length)) {
  448. ohci_writel(OHCI_INTR_WDH, &regs->intrenable);
  449. ohci_readl(&regs->intrenable); /* PCI posting flush */
  450. urb->dev->irq_handle(urb->dev);
  451. ohci_writel(OHCI_INTR_WDH, &regs->intrdisable);
  452. ohci_readl(&regs->intrdisable); /* PCI posting flush */
  453. }
  454. urb->actual_length = 0;
  455. td_submit_job(
  456. urb->dev,
  457. urb->pipe,
  458. urb->transfer_buffer,
  459. urb->transfer_buffer_length,
  460. NULL,
  461. urb,
  462. urb->interval);
  463. break;
  464. case PIPE_CONTROL:
  465. case PIPE_BULK:
  466. break;
  467. default:
  468. return 0;
  469. }
  470. return 1;
  471. }
  472. /*-------------------------------------------------------------------------*/
  473. #ifdef DEBUG
  474. /* tell us the current USB frame number */
  475. static int sohci_get_current_frame_number(struct usb_device *usb_dev)
  476. {
  477. ohci_t *ohci = &gohci;
  478. return m16_swap(ohci->hcca->frame_no);
  479. }
  480. #endif
  481. /*-------------------------------------------------------------------------*
  482. * ED handling functions
  483. *-------------------------------------------------------------------------*/
  484. /* search for the right branch to insert an interrupt ed into the int tree
  485. * do some load ballancing;
  486. * returns the branch and
  487. * sets the interval to interval = 2^integer (ld (interval)) */
  488. static int ep_int_ballance(ohci_t *ohci, int interval, int load)
  489. {
  490. int i, branch = 0;
  491. /* search for the least loaded interrupt endpoint
  492. * branch of all 32 branches
  493. */
  494. for (i = 0; i < 32; i++)
  495. if (ohci->ohci_int_load [branch] > ohci->ohci_int_load [i])
  496. branch = i;
  497. branch = branch % interval;
  498. for (i = branch; i < 32; i += interval)
  499. ohci->ohci_int_load [i] += load;
  500. return branch;
  501. }
  502. /*-------------------------------------------------------------------------*/
  503. /* 2^int( ld (inter)) */
  504. static int ep_2_n_interval(int inter)
  505. {
  506. int i;
  507. for (i = 0; ((inter >> i) > 1) && (i < 5); i++);
  508. return 1 << i;
  509. }
  510. /*-------------------------------------------------------------------------*/
  511. /* the int tree is a binary tree
  512. * in order to process it sequentially the indexes of the branches have to
  513. * be mapped the mapping reverses the bits of a word of num_bits length */
  514. static int ep_rev(int num_bits, int word)
  515. {
  516. int i, wout = 0;
  517. for (i = 0; i < num_bits; i++)
  518. wout |= (((word >> i) & 1) << (num_bits - i - 1));
  519. return wout;
  520. }
  521. /*-------------------------------------------------------------------------*
  522. * ED handling functions
  523. *-------------------------------------------------------------------------*/
  524. /* link an ed into one of the HC chains */
  525. static int ep_link(ohci_t *ohci, ed_t *edi)
  526. {
  527. volatile ed_t *ed = edi;
  528. int int_branch;
  529. int i;
  530. int inter;
  531. int interval;
  532. int load;
  533. __u32 *ed_p;
  534. ed->state = ED_OPER;
  535. ed->int_interval = 0;
  536. switch (ed->type) {
  537. case PIPE_CONTROL:
  538. ed->hwNextED = 0;
  539. if (ohci->ed_controltail == NULL)
  540. ohci_writel(ed, &ohci->regs->ed_controlhead);
  541. else
  542. ohci->ed_controltail->hwNextED =
  543. m32_swap((unsigned long)ed);
  544. ed->ed_prev = ohci->ed_controltail;
  545. if (!ohci->ed_controltail && !ohci->ed_rm_list[0] &&
  546. !ohci->ed_rm_list[1] && !ohci->sleeping) {
  547. ohci->hc_control |= OHCI_CTRL_CLE;
  548. ohci_writel(ohci->hc_control, &ohci->regs->control);
  549. }
  550. ohci->ed_controltail = edi;
  551. break;
  552. case PIPE_BULK:
  553. ed->hwNextED = 0;
  554. if (ohci->ed_bulktail == NULL)
  555. ohci_writel(ed, &ohci->regs->ed_bulkhead);
  556. else
  557. ohci->ed_bulktail->hwNextED =
  558. m32_swap((unsigned long)ed);
  559. ed->ed_prev = ohci->ed_bulktail;
  560. if (!ohci->ed_bulktail && !ohci->ed_rm_list[0] &&
  561. !ohci->ed_rm_list[1] && !ohci->sleeping) {
  562. ohci->hc_control |= OHCI_CTRL_BLE;
  563. ohci_writel(ohci->hc_control, &ohci->regs->control);
  564. }
  565. ohci->ed_bulktail = edi;
  566. break;
  567. case PIPE_INTERRUPT:
  568. load = ed->int_load;
  569. interval = ep_2_n_interval(ed->int_period);
  570. ed->int_interval = interval;
  571. int_branch = ep_int_ballance(ohci, interval, load);
  572. ed->int_branch = int_branch;
  573. for (i = 0; i < ep_rev(6, interval); i += inter) {
  574. inter = 1;
  575. for (ed_p = &(ohci->hcca->int_table[\
  576. ep_rev(5, i) + int_branch]);
  577. (*ed_p != 0) &&
  578. (((ed_t *)ed_p)->int_interval >= interval);
  579. ed_p = &(((ed_t *)ed_p)->hwNextED))
  580. inter = ep_rev(6,
  581. ((ed_t *)ed_p)->int_interval);
  582. ed->hwNextED = *ed_p;
  583. *ed_p = m32_swap((unsigned long)ed);
  584. }
  585. break;
  586. }
  587. return 0;
  588. }
  589. /*-------------------------------------------------------------------------*/
  590. /* scan the periodic table to find and unlink this ED */
  591. static void periodic_unlink(struct ohci *ohci, volatile struct ed *ed,
  592. unsigned index, unsigned period)
  593. {
  594. for (; index < NUM_INTS; index += period) {
  595. __u32 *ed_p = &ohci->hcca->int_table [index];
  596. /* ED might have been unlinked through another path */
  597. while (*ed_p != 0) {
  598. if (((struct ed *)
  599. m32_swap((unsigned long)ed_p)) == ed) {
  600. *ed_p = ed->hwNextED;
  601. break;
  602. }
  603. ed_p = &(((struct ed *)
  604. m32_swap((unsigned long)ed_p))->hwNextED);
  605. }
  606. }
  607. }
  608. /* unlink an ed from one of the HC chains.
  609. * just the link to the ed is unlinked.
  610. * the link from the ed still points to another operational ed or 0
  611. * so the HC can eventually finish the processing of the unlinked ed */
  612. static int ep_unlink(ohci_t *ohci, ed_t *edi)
  613. {
  614. volatile ed_t *ed = edi;
  615. int i;
  616. ed->hwINFO |= m32_swap(OHCI_ED_SKIP);
  617. switch (ed->type) {
  618. case PIPE_CONTROL:
  619. if (ed->ed_prev == NULL) {
  620. if (!ed->hwNextED) {
  621. ohci->hc_control &= ~OHCI_CTRL_CLE;
  622. ohci_writel(ohci->hc_control,
  623. &ohci->regs->control);
  624. }
  625. ohci_writel(m32_swap(*((__u32 *)&ed->hwNextED)),
  626. &ohci->regs->ed_controlhead);
  627. } else {
  628. ed->ed_prev->hwNextED = ed->hwNextED;
  629. }
  630. if (ohci->ed_controltail == ed) {
  631. ohci->ed_controltail = ed->ed_prev;
  632. } else {
  633. ((ed_t *)m32_swap(
  634. *((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
  635. }
  636. break;
  637. case PIPE_BULK:
  638. if (ed->ed_prev == NULL) {
  639. if (!ed->hwNextED) {
  640. ohci->hc_control &= ~OHCI_CTRL_BLE;
  641. ohci_writel(ohci->hc_control,
  642. &ohci->regs->control);
  643. }
  644. ohci_writel(m32_swap(*((__u32 *)&ed->hwNextED)),
  645. &ohci->regs->ed_bulkhead);
  646. } else {
  647. ed->ed_prev->hwNextED = ed->hwNextED;
  648. }
  649. if (ohci->ed_bulktail == ed) {
  650. ohci->ed_bulktail = ed->ed_prev;
  651. } else {
  652. ((ed_t *)m32_swap(
  653. *((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
  654. }
  655. break;
  656. case PIPE_INTERRUPT:
  657. periodic_unlink(ohci, ed, 0, 1);
  658. for (i = ed->int_branch; i < 32; i += ed->int_interval)
  659. ohci->ohci_int_load[i] -= ed->int_load;
  660. break;
  661. }
  662. ed->state = ED_UNLINK;
  663. return 0;
  664. }
  665. /*-------------------------------------------------------------------------*/
  666. /* add/reinit an endpoint; this should be done once at the
  667. * usb_set_configuration command, but the USB stack is a little bit
  668. * stateless so we do it at every transaction if the state of the ed
  669. * is ED_NEW then a dummy td is added and the state is changed to
  670. * ED_UNLINK in all other cases the state is left unchanged the ed
  671. * info fields are setted anyway even though most of them should not
  672. * change
  673. */
  674. static ed_t *ep_add_ed(struct usb_device *usb_dev, unsigned long pipe,
  675. int interval, int load)
  676. {
  677. td_t *td;
  678. ed_t *ed_ret;
  679. volatile ed_t *ed;
  680. ed = ed_ret = &ohci_dev.ed[(usb_pipeendpoint(pipe) << 1) |
  681. (usb_pipecontrol(pipe)? 0: usb_pipeout(pipe))];
  682. if ((ed->state & ED_DEL) || (ed->state & ED_URB_DEL)) {
  683. err("ep_add_ed: pending delete");
  684. /* pending delete request */
  685. return NULL;
  686. }
  687. if (ed->state == ED_NEW) {
  688. /* dummy td; end of td list for ed */
  689. td = td_alloc(usb_dev);
  690. ed->hwTailP = m32_swap((unsigned long)td);
  691. ed->hwHeadP = ed->hwTailP;
  692. ed->state = ED_UNLINK;
  693. ed->type = usb_pipetype(pipe);
  694. ohci_dev.ed_cnt++;
  695. }
  696. ed->hwINFO = m32_swap(usb_pipedevice(pipe)
  697. | usb_pipeendpoint(pipe) << 7
  698. | (usb_pipeisoc(pipe)? 0x8000: 0)
  699. | (usb_pipecontrol(pipe)? 0: \
  700. (usb_pipeout(pipe)? 0x800: 0x1000))
  701. | usb_pipeslow(pipe) << 13
  702. | usb_maxpacket(usb_dev, pipe) << 16);
  703. if (ed->type == PIPE_INTERRUPT && ed->state == ED_UNLINK) {
  704. ed->int_period = interval;
  705. ed->int_load = load;
  706. }
  707. return ed_ret;
  708. }
  709. /*-------------------------------------------------------------------------*
  710. * TD handling functions
  711. *-------------------------------------------------------------------------*/
  712. /* enqueue next TD for this URB (OHCI spec 5.2.8.2) */
  713. static void td_fill(ohci_t *ohci, unsigned int info,
  714. void *data, int len,
  715. struct usb_device *dev, int index, urb_priv_t *urb_priv)
  716. {
  717. volatile td_t *td, *td_pt;
  718. #ifdef OHCI_FILL_TRACE
  719. int i;
  720. #endif
  721. if (index > urb_priv->length) {
  722. err("index > length");
  723. return;
  724. }
  725. /* use this td as the next dummy */
  726. td_pt = urb_priv->td [index];
  727. td_pt->hwNextTD = 0;
  728. /* fill the old dummy TD */
  729. td = urb_priv->td [index] =
  730. (td_t *)(m32_swap(urb_priv->ed->hwTailP) & ~0xf);
  731. td->ed = urb_priv->ed;
  732. td->next_dl_td = NULL;
  733. td->index = index;
  734. td->data = (__u32)data;
  735. #ifdef OHCI_FILL_TRACE
  736. if (usb_pipebulk(urb_priv->pipe) && usb_pipeout(urb_priv->pipe)) {
  737. for (i = 0; i < len; i++)
  738. printf("td->data[%d] %#2x ", i, ((unsigned char *)td->data)[i]);
  739. printf("\n");
  740. }
  741. #endif
  742. if (!len)
  743. data = 0;
  744. td->hwINFO = m32_swap(info);
  745. td->hwCBP = m32_swap((unsigned long)data);
  746. if (data)
  747. td->hwBE = m32_swap((unsigned long)(data + len - 1));
  748. else
  749. td->hwBE = 0;
  750. td->hwNextTD = m32_swap((unsigned long)td_pt);
  751. /* append to queue */
  752. td->ed->hwTailP = td->hwNextTD;
  753. }
  754. /*-------------------------------------------------------------------------*/
  755. /* prepare all TDs of a transfer */
  756. static void td_submit_job(struct usb_device *dev, unsigned long pipe,
  757. void *buffer, int transfer_len,
  758. struct devrequest *setup, urb_priv_t *urb,
  759. int interval)
  760. {
  761. ohci_t *ohci = &gohci;
  762. int data_len = transfer_len;
  763. void *data;
  764. int cnt = 0;
  765. __u32 info = 0;
  766. unsigned int toggle = 0;
  767. /* OHCI handles the DATA-toggles itself, we just use the USB-toggle
  768. * bits for reseting */
  769. if (usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe))) {
  770. toggle = TD_T_TOGGLE;
  771. } else {
  772. toggle = TD_T_DATA0;
  773. usb_settoggle(dev, usb_pipeendpoint(pipe),
  774. usb_pipeout(pipe), 1);
  775. }
  776. urb->td_cnt = 0;
  777. if (data_len)
  778. data = buffer;
  779. else
  780. data = 0;
  781. switch (usb_pipetype(pipe)) {
  782. case PIPE_BULK:
  783. info = usb_pipeout(pipe)?
  784. TD_CC | TD_DP_OUT : TD_CC | TD_DP_IN ;
  785. while (data_len > 4096) {
  786. td_fill(ohci, info | (cnt? TD_T_TOGGLE:toggle),
  787. data, 4096, dev, cnt, urb);
  788. data += 4096; data_len -= 4096; cnt++;
  789. }
  790. info = usb_pipeout(pipe)?
  791. TD_CC | TD_DP_OUT : TD_CC | TD_R | TD_DP_IN ;
  792. td_fill(ohci, info | (cnt? TD_T_TOGGLE:toggle), data,
  793. data_len, dev, cnt, urb);
  794. cnt++;
  795. if (!ohci->sleeping) {
  796. /* start bulk list */
  797. ohci_writel(OHCI_BLF, &ohci->regs->cmdstatus);
  798. }
  799. break;
  800. case PIPE_CONTROL:
  801. /* Setup phase */
  802. info = TD_CC | TD_DP_SETUP | TD_T_DATA0;
  803. td_fill(ohci, info, setup, 8, dev, cnt++, urb);
  804. /* Optional Data phase */
  805. if (data_len > 0) {
  806. info = usb_pipeout(pipe)?
  807. TD_CC | TD_R | TD_DP_OUT | TD_T_DATA1 :
  808. TD_CC | TD_R | TD_DP_IN | TD_T_DATA1;
  809. /* NOTE: mishandles transfers >8K, some >4K */
  810. td_fill(ohci, info, data, data_len, dev, cnt++, urb);
  811. }
  812. /* Status phase */
  813. info = usb_pipeout(pipe)?
  814. TD_CC | TD_DP_IN | TD_T_DATA1:
  815. TD_CC | TD_DP_OUT | TD_T_DATA1;
  816. td_fill(ohci, info, data, 0, dev, cnt++, urb);
  817. if (!ohci->sleeping) {
  818. /* start Control list */
  819. ohci_writel(OHCI_CLF, &ohci->regs->cmdstatus);
  820. }
  821. break;
  822. case PIPE_INTERRUPT:
  823. info = usb_pipeout(urb->pipe)?
  824. TD_CC | TD_DP_OUT | toggle:
  825. TD_CC | TD_R | TD_DP_IN | toggle;
  826. td_fill(ohci, info, data, data_len, dev, cnt++, urb);
  827. break;
  828. }
  829. if (urb->length != cnt)
  830. dbg("TD LENGTH %d != CNT %d", urb->length, cnt);
  831. }
  832. /*-------------------------------------------------------------------------*
  833. * Done List handling functions
  834. *-------------------------------------------------------------------------*/
  835. /* calculate the transfer length and update the urb */
  836. static void dl_transfer_length(td_t *td)
  837. {
  838. __u32 tdINFO, tdBE, tdCBP;
  839. urb_priv_t *lurb_priv = td->ed->purb;
  840. tdINFO = m32_swap(td->hwINFO);
  841. tdBE = m32_swap(td->hwBE);
  842. tdCBP = m32_swap(td->hwCBP);
  843. if (!(usb_pipecontrol(lurb_priv->pipe) &&
  844. ((td->index == 0) || (td->index == lurb_priv->length - 1)))) {
  845. if (tdBE != 0) {
  846. if (td->hwCBP == 0)
  847. lurb_priv->actual_length += tdBE - td->data + 1;
  848. else
  849. lurb_priv->actual_length += tdCBP - td->data;
  850. }
  851. }
  852. }
  853. /*-------------------------------------------------------------------------*/
  854. static void check_status(td_t *td_list)
  855. {
  856. urb_priv_t *lurb_priv = td_list->ed->purb;
  857. int urb_len = lurb_priv->length;
  858. __u32 *phwHeadP = &td_list->ed->hwHeadP;
  859. int cc;
  860. cc = TD_CC_GET(m32_swap(td_list->hwINFO));
  861. if (cc) {
  862. err(" USB-error: %s (%x)", cc_to_string[cc], cc);
  863. if (*phwHeadP & m32_swap(0x1)) {
  864. if (lurb_priv &&
  865. ((td_list->index + 1) < urb_len)) {
  866. *phwHeadP =
  867. (lurb_priv->td[urb_len - 1]->hwNextTD &\
  868. m32_swap(0xfffffff0)) |
  869. (*phwHeadP & m32_swap(0x2));
  870. lurb_priv->td_cnt += urb_len -
  871. td_list->index - 1;
  872. } else
  873. *phwHeadP &= m32_swap(0xfffffff2);
  874. }
  875. #ifdef CONFIG_MPC5200
  876. td_list->hwNextTD = 0;
  877. #endif
  878. }
  879. }
  880. /* replies to the request have to be on a FIFO basis so
  881. * we reverse the reversed done-list */
  882. static td_t *dl_reverse_done_list(ohci_t *ohci)
  883. {
  884. __u32 td_list_hc;
  885. td_t *td_rev = NULL;
  886. td_t *td_list = NULL;
  887. td_list_hc = m32_swap(ohci->hcca->done_head) & 0xfffffff0;
  888. ohci->hcca->done_head = 0;
  889. while (td_list_hc) {
  890. td_list = (td_t *)td_list_hc;
  891. check_status(td_list);
  892. td_list->next_dl_td = td_rev;
  893. td_rev = td_list;
  894. td_list_hc = m32_swap(td_list->hwNextTD) & 0xfffffff0;
  895. }
  896. return td_list;
  897. }
  898. /*-------------------------------------------------------------------------*/
  899. /*-------------------------------------------------------------------------*/
  900. static void finish_urb(ohci_t *ohci, urb_priv_t *urb, int status)
  901. {
  902. if ((status & (ED_OPER | ED_UNLINK)) && (urb->state != URB_DEL))
  903. urb->finished = sohci_return_job(ohci, urb);
  904. else
  905. dbg("finish_urb: strange.., ED state %x, \n", status);
  906. }
  907. /*
  908. * Used to take back a TD from the host controller. This would normally be
  909. * called from within dl_done_list, however it may be called directly if the
  910. * HC no longer sees the TD and it has not appeared on the donelist (after
  911. * two frames). This bug has been observed on ZF Micro systems.
  912. */
  913. static int takeback_td(ohci_t *ohci, td_t *td_list)
  914. {
  915. ed_t *ed;
  916. int cc;
  917. int stat = 0;
  918. /* urb_t *urb; */
  919. urb_priv_t *lurb_priv;
  920. __u32 tdINFO, edHeadP, edTailP;
  921. tdINFO = m32_swap(td_list->hwINFO);
  922. ed = td_list->ed;
  923. lurb_priv = ed->purb;
  924. dl_transfer_length(td_list);
  925. lurb_priv->td_cnt++;
  926. /* error code of transfer */
  927. cc = TD_CC_GET(tdINFO);
  928. if (cc) {
  929. err("USB-error: %s (%x)", cc_to_string[cc], cc);
  930. stat = cc_to_error[cc];
  931. }
  932. /* see if this done list makes for all TD's of current URB,
  933. * and mark the URB finished if so */
  934. if (lurb_priv->td_cnt == lurb_priv->length)
  935. finish_urb(ohci, lurb_priv, ed->state);
  936. dbg("dl_done_list: processing TD %x, len %x\n",
  937. lurb_priv->td_cnt, lurb_priv->length);
  938. if (ed->state != ED_NEW && (!usb_pipeint(lurb_priv->pipe))) {
  939. edHeadP = m32_swap(ed->hwHeadP) & 0xfffffff0;
  940. edTailP = m32_swap(ed->hwTailP);
  941. /* unlink eds if they are not busy */
  942. if ((edHeadP == edTailP) && (ed->state == ED_OPER))
  943. ep_unlink(ohci, ed);
  944. }
  945. return stat;
  946. }
  947. static int dl_done_list(ohci_t *ohci)
  948. {
  949. int stat = 0;
  950. td_t *td_list = dl_reverse_done_list(ohci);
  951. while (td_list) {
  952. td_t *td_next = td_list->next_dl_td;
  953. stat = takeback_td(ohci, td_list);
  954. td_list = td_next;
  955. }
  956. return stat;
  957. }
  958. /*-------------------------------------------------------------------------*
  959. * Virtual Root Hub
  960. *-------------------------------------------------------------------------*/
  961. /* Device descriptor */
  962. static __u8 root_hub_dev_des[] =
  963. {
  964. 0x12, /* __u8 bLength; */
  965. 0x01, /* __u8 bDescriptorType; Device */
  966. 0x10, /* __u16 bcdUSB; v1.1 */
  967. 0x01,
  968. 0x09, /* __u8 bDeviceClass; HUB_CLASSCODE */
  969. 0x00, /* __u8 bDeviceSubClass; */
  970. 0x00, /* __u8 bDeviceProtocol; */
  971. 0x08, /* __u8 bMaxPacketSize0; 8 Bytes */
  972. 0x00, /* __u16 idVendor; */
  973. 0x00,
  974. 0x00, /* __u16 idProduct; */
  975. 0x00,
  976. 0x00, /* __u16 bcdDevice; */
  977. 0x00,
  978. 0x00, /* __u8 iManufacturer; */
  979. 0x01, /* __u8 iProduct; */
  980. 0x00, /* __u8 iSerialNumber; */
  981. 0x01 /* __u8 bNumConfigurations; */
  982. };
  983. /* Configuration descriptor */
  984. static __u8 root_hub_config_des[] =
  985. {
  986. 0x09, /* __u8 bLength; */
  987. 0x02, /* __u8 bDescriptorType; Configuration */
  988. 0x19, /* __u16 wTotalLength; */
  989. 0x00,
  990. 0x01, /* __u8 bNumInterfaces; */
  991. 0x01, /* __u8 bConfigurationValue; */
  992. 0x00, /* __u8 iConfiguration; */
  993. 0x40, /* __u8 bmAttributes;
  994. Bit 7: Bus-powered, 6: Self-powered, 5 Remote-wakwup, 4..0: resvd */
  995. 0x00, /* __u8 MaxPower; */
  996. /* interface */
  997. 0x09, /* __u8 if_bLength; */
  998. 0x04, /* __u8 if_bDescriptorType; Interface */
  999. 0x00, /* __u8 if_bInterfaceNumber; */
  1000. 0x00, /* __u8 if_bAlternateSetting; */
  1001. 0x01, /* __u8 if_bNumEndpoints; */
  1002. 0x09, /* __u8 if_bInterfaceClass; HUB_CLASSCODE */
  1003. 0x00, /* __u8 if_bInterfaceSubClass; */
  1004. 0x00, /* __u8 if_bInterfaceProtocol; */
  1005. 0x00, /* __u8 if_iInterface; */
  1006. /* endpoint */
  1007. 0x07, /* __u8 ep_bLength; */
  1008. 0x05, /* __u8 ep_bDescriptorType; Endpoint */
  1009. 0x81, /* __u8 ep_bEndpointAddress; IN Endpoint 1 */
  1010. 0x03, /* __u8 ep_bmAttributes; Interrupt */
  1011. 0x02, /* __u16 ep_wMaxPacketSize; ((MAX_ROOT_PORTS + 1) / 8 */
  1012. 0x00,
  1013. 0xff /* __u8 ep_bInterval; 255 ms */
  1014. };
  1015. static unsigned char root_hub_str_index0[] =
  1016. {
  1017. 0x04, /* __u8 bLength; */
  1018. 0x03, /* __u8 bDescriptorType; String-descriptor */
  1019. 0x09, /* __u8 lang ID */
  1020. 0x04, /* __u8 lang ID */
  1021. };
  1022. static unsigned char root_hub_str_index1[] =
  1023. {
  1024. 28, /* __u8 bLength; */
  1025. 0x03, /* __u8 bDescriptorType; String-descriptor */
  1026. 'O', /* __u8 Unicode */
  1027. 0, /* __u8 Unicode */
  1028. 'H', /* __u8 Unicode */
  1029. 0, /* __u8 Unicode */
  1030. 'C', /* __u8 Unicode */
  1031. 0, /* __u8 Unicode */
  1032. 'I', /* __u8 Unicode */
  1033. 0, /* __u8 Unicode */
  1034. ' ', /* __u8 Unicode */
  1035. 0, /* __u8 Unicode */
  1036. 'R', /* __u8 Unicode */
  1037. 0, /* __u8 Unicode */
  1038. 'o', /* __u8 Unicode */
  1039. 0, /* __u8 Unicode */
  1040. 'o', /* __u8 Unicode */
  1041. 0, /* __u8 Unicode */
  1042. 't', /* __u8 Unicode */
  1043. 0, /* __u8 Unicode */
  1044. ' ', /* __u8 Unicode */
  1045. 0, /* __u8 Unicode */
  1046. 'H', /* __u8 Unicode */
  1047. 0, /* __u8 Unicode */
  1048. 'u', /* __u8 Unicode */
  1049. 0, /* __u8 Unicode */
  1050. 'b', /* __u8 Unicode */
  1051. 0, /* __u8 Unicode */
  1052. };
  1053. /* Hub class-specific descriptor is constructed dynamically */
  1054. /*-------------------------------------------------------------------------*/
  1055. #define OK(x) len = (x); break
  1056. #ifdef DEBUG
  1057. #define WR_RH_STAT(x) {info("WR:status %#8x", (x)); ohci_writel((x), \
  1058. &gohci.regs->roothub.status); }
  1059. #define WR_RH_PORTSTAT(x) {info("WR:portstatus[%d] %#8x", wIndex-1, \
  1060. (x)); ohci_writel((x), &gohci.regs->roothub.portstatus[wIndex-1]); }
  1061. #else
  1062. #define WR_RH_STAT(x) ohci_writel((x), &gohci.regs->roothub.status)
  1063. #define WR_RH_PORTSTAT(x) ohci_writel((x), \
  1064. &gohci.regs->roothub.portstatus[wIndex-1])
  1065. #endif
  1066. #define RD_RH_STAT roothub_status(&gohci)
  1067. #define RD_RH_PORTSTAT roothub_portstatus(&gohci, wIndex-1)
  1068. /* request to virtual root hub */
  1069. int rh_check_port_status(ohci_t *controller)
  1070. {
  1071. __u32 temp, ndp, i;
  1072. int res;
  1073. res = -1;
  1074. temp = roothub_a(controller);
  1075. ndp = (temp & RH_A_NDP);
  1076. #ifdef CONFIG_AT91C_PQFP_UHPBUG
  1077. ndp = (ndp == 2) ? 1:0;
  1078. #endif
  1079. for (i = 0; i < ndp; i++) {
  1080. temp = roothub_portstatus(controller, i);
  1081. /* check for a device disconnect */
  1082. if (((temp & (RH_PS_PESC | RH_PS_CSC)) ==
  1083. (RH_PS_PESC | RH_PS_CSC)) &&
  1084. ((temp & RH_PS_CCS) == 0)) {
  1085. res = i;
  1086. break;
  1087. }
  1088. }
  1089. return res;
  1090. }
  1091. static int ohci_submit_rh_msg(struct usb_device *dev, unsigned long pipe,
  1092. void *buffer, int transfer_len, struct devrequest *cmd)
  1093. {
  1094. void *data = buffer;
  1095. int leni = transfer_len;
  1096. int len = 0;
  1097. int stat = 0;
  1098. __u32 datab[4];
  1099. __u8 *data_buf = (__u8 *)datab;
  1100. __u16 bmRType_bReq;
  1101. __u16 wValue;
  1102. __u16 wIndex;
  1103. __u16 wLength;
  1104. #ifdef DEBUG
  1105. pkt_print(NULL, dev, pipe, buffer, transfer_len,
  1106. cmd, "SUB(rh)", usb_pipein(pipe));
  1107. #else
  1108. wait_ms(1);
  1109. #endif
  1110. if (usb_pipeint(pipe)) {
  1111. info("Root-Hub submit IRQ: NOT implemented");
  1112. return 0;
  1113. }
  1114. bmRType_bReq = cmd->requesttype | (cmd->request << 8);
  1115. wValue = le16_to_cpu(cmd->value);
  1116. wIndex = le16_to_cpu(cmd->index);
  1117. wLength = le16_to_cpu(cmd->length);
  1118. info("Root-Hub: adr: %2x cmd(%1x): %08x %04x %04x %04x",
  1119. dev->devnum, 8, bmRType_bReq, wValue, wIndex, wLength);
  1120. switch (bmRType_bReq) {
  1121. /* Request Destination:
  1122. without flags: Device,
  1123. RH_INTERFACE: interface,
  1124. RH_ENDPOINT: endpoint,
  1125. RH_CLASS means HUB here,
  1126. RH_OTHER | RH_CLASS almost ever means HUB_PORT here
  1127. */
  1128. case RH_GET_STATUS:
  1129. *(__u16 *) data_buf = cpu_to_le16(1);
  1130. OK(2);
  1131. case RH_GET_STATUS | RH_INTERFACE:
  1132. *(__u16 *) data_buf = cpu_to_le16(0);
  1133. OK(2);
  1134. case RH_GET_STATUS | RH_ENDPOINT:
  1135. *(__u16 *) data_buf = cpu_to_le16(0);
  1136. OK(2);
  1137. case RH_GET_STATUS | RH_CLASS:
  1138. *(__u32 *) data_buf = cpu_to_le32(
  1139. RD_RH_STAT & ~(RH_HS_CRWE | RH_HS_DRWE));
  1140. OK(4);
  1141. case RH_GET_STATUS | RH_OTHER | RH_CLASS:
  1142. *(__u32 *) data_buf = cpu_to_le32(RD_RH_PORTSTAT);
  1143. OK(4);
  1144. case RH_CLEAR_FEATURE | RH_ENDPOINT:
  1145. switch (wValue) {
  1146. case (RH_ENDPOINT_STALL):
  1147. OK(0);
  1148. }
  1149. break;
  1150. case RH_CLEAR_FEATURE | RH_CLASS:
  1151. switch (wValue) {
  1152. case RH_C_HUB_LOCAL_POWER:
  1153. OK(0);
  1154. case (RH_C_HUB_OVER_CURRENT):
  1155. WR_RH_STAT(RH_HS_OCIC);
  1156. OK(0);
  1157. }
  1158. break;
  1159. case RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS:
  1160. switch (wValue) {
  1161. case (RH_PORT_ENABLE): WR_RH_PORTSTAT(RH_PS_CCS); OK(0);
  1162. case (RH_PORT_SUSPEND): WR_RH_PORTSTAT(RH_PS_POCI); OK(0);
  1163. case (RH_PORT_POWER): WR_RH_PORTSTAT(RH_PS_LSDA); OK(0);
  1164. case (RH_C_PORT_CONNECTION): WR_RH_PORTSTAT(RH_PS_CSC); OK(0);
  1165. case (RH_C_PORT_ENABLE): WR_RH_PORTSTAT(RH_PS_PESC); OK(0);
  1166. case (RH_C_PORT_SUSPEND): WR_RH_PORTSTAT(RH_PS_PSSC); OK(0);
  1167. case (RH_C_PORT_OVER_CURRENT):WR_RH_PORTSTAT(RH_PS_OCIC); OK(0);
  1168. case (RH_C_PORT_RESET): WR_RH_PORTSTAT(RH_PS_PRSC); OK(0);
  1169. }
  1170. break;
  1171. case RH_SET_FEATURE | RH_OTHER | RH_CLASS:
  1172. switch (wValue) {
  1173. case (RH_PORT_SUSPEND):
  1174. WR_RH_PORTSTAT(RH_PS_PSS); OK(0);
  1175. case (RH_PORT_RESET): /* BUG IN HUP CODE *********/
  1176. if (RD_RH_PORTSTAT & RH_PS_CCS)
  1177. WR_RH_PORTSTAT(RH_PS_PRS);
  1178. OK(0);
  1179. case (RH_PORT_POWER):
  1180. WR_RH_PORTSTAT(RH_PS_PPS);
  1181. wait_ms(100);
  1182. OK(0);
  1183. case (RH_PORT_ENABLE): /* BUG IN HUP CODE *********/
  1184. if (RD_RH_PORTSTAT & RH_PS_CCS)
  1185. WR_RH_PORTSTAT(RH_PS_PES);
  1186. OK(0);
  1187. }
  1188. break;
  1189. case RH_SET_ADDRESS:
  1190. gohci.rh.devnum = wValue;
  1191. OK(0);
  1192. case RH_GET_DESCRIPTOR:
  1193. switch ((wValue & 0xff00) >> 8) {
  1194. case (0x01): /* device descriptor */
  1195. len = min_t(unsigned int,
  1196. leni,
  1197. min_t(unsigned int,
  1198. sizeof(root_hub_dev_des),
  1199. wLength));
  1200. data_buf = root_hub_dev_des; OK(len);
  1201. case (0x02): /* configuration descriptor */
  1202. len = min_t(unsigned int,
  1203. leni,
  1204. min_t(unsigned int,
  1205. sizeof(root_hub_config_des),
  1206. wLength));
  1207. data_buf = root_hub_config_des; OK(len);
  1208. case (0x03): /* string descriptors */
  1209. if (wValue == 0x0300) {
  1210. len = min_t(unsigned int,
  1211. leni,
  1212. min_t(unsigned int,
  1213. sizeof(root_hub_str_index0),
  1214. wLength));
  1215. data_buf = root_hub_str_index0;
  1216. OK(len);
  1217. }
  1218. if (wValue == 0x0301) {
  1219. len = min_t(unsigned int,
  1220. leni,
  1221. min_t(unsigned int,
  1222. sizeof(root_hub_str_index1),
  1223. wLength));
  1224. data_buf = root_hub_str_index1;
  1225. OK(len);
  1226. }
  1227. default:
  1228. stat = USB_ST_STALLED;
  1229. }
  1230. break;
  1231. case RH_GET_DESCRIPTOR | RH_CLASS:
  1232. {
  1233. __u32 temp = roothub_a(&gohci);
  1234. data_buf [0] = 9; /* min length; */
  1235. data_buf [1] = 0x29;
  1236. data_buf [2] = temp & RH_A_NDP;
  1237. #ifdef CONFIG_AT91C_PQFP_UHPBUG
  1238. data_buf [2] = (data_buf [2] == 2) ? 1:0;
  1239. #endif
  1240. data_buf [3] = 0;
  1241. if (temp & RH_A_PSM) /* per-port power switching? */
  1242. data_buf [3] |= 0x1;
  1243. if (temp & RH_A_NOCP) /* no overcurrent reporting? */
  1244. data_buf [3] |= 0x10;
  1245. else if (temp & RH_A_OCPM)/* per-port overcurrent reporting? */
  1246. data_buf [3] |= 0x8;
  1247. /* corresponds to data_buf[4-7] */
  1248. datab [1] = 0;
  1249. data_buf [5] = (temp & RH_A_POTPGT) >> 24;
  1250. temp = roothub_b(&gohci);
  1251. data_buf [7] = temp & RH_B_DR;
  1252. if (data_buf [2] < 7) {
  1253. data_buf [8] = 0xff;
  1254. } else {
  1255. data_buf [0] += 2;
  1256. data_buf [8] = (temp & RH_B_DR) >> 8;
  1257. data_buf [10] = data_buf [9] = 0xff;
  1258. }
  1259. len = min_t(unsigned int, leni,
  1260. min_t(unsigned int, data_buf [0], wLength));
  1261. OK(len);
  1262. }
  1263. case RH_GET_CONFIGURATION: *(__u8 *) data_buf = 0x01; OK(1);
  1264. case RH_SET_CONFIGURATION: WR_RH_STAT(0x10000); OK(0);
  1265. default:
  1266. dbg("unsupported root hub command");
  1267. stat = USB_ST_STALLED;
  1268. }
  1269. #ifdef DEBUG
  1270. ohci_dump_roothub(&gohci, 1);
  1271. #else
  1272. wait_ms(1);
  1273. #endif
  1274. len = min_t(int, len, leni);
  1275. if (data != data_buf)
  1276. memcpy(data, data_buf, len);
  1277. dev->act_len = len;
  1278. dev->status = stat;
  1279. #ifdef DEBUG
  1280. pkt_print(NULL, dev, pipe, buffer,
  1281. transfer_len, cmd, "RET(rh)", 0/*usb_pipein(pipe)*/);
  1282. #else
  1283. wait_ms(1);
  1284. #endif
  1285. return stat;
  1286. }
  1287. /*-------------------------------------------------------------------------*/
  1288. /* common code for handling submit messages - used for all but root hub */
  1289. /* accesses. */
  1290. int submit_common_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
  1291. int transfer_len, struct devrequest *setup, int interval)
  1292. {
  1293. int stat = 0;
  1294. int maxsize = usb_maxpacket(dev, pipe);
  1295. int timeout;
  1296. urb_priv_t *urb;
  1297. urb = malloc(sizeof(urb_priv_t));
  1298. memset(urb, 0, sizeof(urb_priv_t));
  1299. urb->dev = dev;
  1300. urb->pipe = pipe;
  1301. urb->transfer_buffer = buffer;
  1302. urb->transfer_buffer_length = transfer_len;
  1303. urb->interval = interval;
  1304. /* device pulled? Shortcut the action. */
  1305. if (devgone == dev) {
  1306. dev->status = USB_ST_CRC_ERR;
  1307. return 0;
  1308. }
  1309. #ifdef DEBUG
  1310. urb->actual_length = 0;
  1311. pkt_print(urb, dev, pipe, buffer, transfer_len,
  1312. setup, "SUB", usb_pipein(pipe));
  1313. #else
  1314. wait_ms(1);
  1315. #endif
  1316. if (!maxsize) {
  1317. err("submit_common_message: pipesize for pipe %lx is zero",
  1318. pipe);
  1319. return -1;
  1320. }
  1321. if (sohci_submit_job(urb, setup) < 0) {
  1322. err("sohci_submit_job failed");
  1323. return -1;
  1324. }
  1325. #if 0
  1326. wait_ms(10);
  1327. /* ohci_dump_status(&gohci); */
  1328. #endif
  1329. /* allow more time for a BULK device to react - some are slow */
  1330. #define BULK_TO 5000 /* timeout in milliseconds */
  1331. if (usb_pipebulk(pipe))
  1332. timeout = BULK_TO;
  1333. else
  1334. timeout = 1000;
  1335. /* wait for it to complete */
  1336. for (;;) {
  1337. /* check whether the controller is done */
  1338. stat = hc_interrupt();
  1339. if (stat < 0) {
  1340. stat = USB_ST_CRC_ERR;
  1341. break;
  1342. }
  1343. /* NOTE: since we are not interrupt driven in U-Boot and always
  1344. * handle only one URB at a time, we cannot assume the
  1345. * transaction finished on the first successful return from
  1346. * hc_interrupt().. unless the flag for current URB is set,
  1347. * meaning that all TD's to/from device got actually
  1348. * transferred and processed. If the current URB is not
  1349. * finished we need to re-iterate this loop so as
  1350. * hc_interrupt() gets called again as there needs to be some
  1351. * more TD's to process still */
  1352. if ((stat >= 0) && (stat != 0xff) && (urb->finished)) {
  1353. /* 0xff is returned for an SF-interrupt */
  1354. break;
  1355. }
  1356. if (--timeout) {
  1357. wait_ms(1);
  1358. if (!urb->finished)
  1359. dbg("*");
  1360. } else {
  1361. err("CTL:TIMEOUT ");
  1362. dbg("submit_common_msg: TO status %x\n", stat);
  1363. urb->finished = 1;
  1364. stat = USB_ST_CRC_ERR;
  1365. break;
  1366. }
  1367. }
  1368. dev->status = stat;
  1369. dev->act_len = transfer_len;
  1370. #ifdef DEBUG
  1371. pkt_print(urb, dev, pipe, buffer, transfer_len,
  1372. setup, "RET(ctlr)", usb_pipein(pipe));
  1373. #else
  1374. wait_ms(1);
  1375. #endif
  1376. /* free TDs in urb_priv */
  1377. if (!usb_pipeint(pipe))
  1378. urb_free_priv(urb);
  1379. return 0;
  1380. }
  1381. /* submit routines called from usb.c */
  1382. int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
  1383. int transfer_len)
  1384. {
  1385. info("submit_bulk_msg");
  1386. return submit_common_msg(dev, pipe, buffer, transfer_len, NULL, 0);
  1387. }
  1388. int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
  1389. int transfer_len, struct devrequest *setup)
  1390. {
  1391. int maxsize = usb_maxpacket(dev, pipe);
  1392. info("submit_control_msg");
  1393. #ifdef DEBUG
  1394. pkt_print(NULL, dev, pipe, buffer, transfer_len,
  1395. setup, "SUB", usb_pipein(pipe));
  1396. #else
  1397. wait_ms(1);
  1398. #endif
  1399. if (!maxsize) {
  1400. err("submit_control_message: pipesize for pipe %lx is zero",
  1401. pipe);
  1402. return -1;
  1403. }
  1404. if (((pipe >> 8) & 0x7f) == gohci.rh.devnum) {
  1405. gohci.rh.dev = dev;
  1406. /* root hub - redirect */
  1407. return ohci_submit_rh_msg(dev, pipe, buffer, transfer_len,
  1408. setup);
  1409. }
  1410. return submit_common_msg(dev, pipe, buffer, transfer_len, setup, 0);
  1411. }
  1412. int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
  1413. int transfer_len, int interval)
  1414. {
  1415. info("submit_int_msg");
  1416. return submit_common_msg(dev, pipe, buffer, transfer_len, NULL,
  1417. interval);
  1418. }
  1419. /*-------------------------------------------------------------------------*
  1420. * HC functions
  1421. *-------------------------------------------------------------------------*/
  1422. /* reset the HC and BUS */
  1423. static int hc_reset(ohci_t *ohci)
  1424. {
  1425. #ifdef CONFIG_PCI_EHCI_DEVNO
  1426. pci_dev_t pdev;
  1427. #endif
  1428. int timeout = 30;
  1429. int smm_timeout = 50; /* 0,5 sec */
  1430. dbg("%s\n", __FUNCTION__);
  1431. #ifdef CONFIG_PCI_EHCI_DEVNO
  1432. /*
  1433. * Some multi-function controllers (e.g. ISP1562) allow root hub
  1434. * resetting via EHCI registers only.
  1435. */
  1436. pdev = pci_find_devices(ehci_pci_ids, CONFIG_PCI_EHCI_DEVNO);
  1437. if (pdev != -1) {
  1438. u32 base;
  1439. int timeout = 1000;
  1440. pci_read_config_dword(pdev, PCI_BASE_ADDRESS_0, &base);
  1441. base += EHCI_USBCMD_OFF;
  1442. ohci_writel(ohci_readl(base) | EHCI_USBCMD_HCRESET, base);
  1443. while (ohci_readl(base) & EHCI_USBCMD_HCRESET) {
  1444. if (timeout-- <= 0) {
  1445. printf("USB RootHub reset timed out!");
  1446. break;
  1447. }
  1448. udelay(1);
  1449. }
  1450. } else
  1451. printf("No EHCI func at %d index!\n", CONFIG_PCI_EHCI_DEVNO);
  1452. #endif
  1453. if (ohci_readl(&ohci->regs->control) & OHCI_CTRL_IR) {
  1454. /* SMM owns the HC, request ownership */
  1455. ohci_writel(OHCI_OCR, &ohci->regs->cmdstatus);
  1456. info("USB HC TakeOver from SMM");
  1457. while (ohci_readl(&ohci->regs->control) & OHCI_CTRL_IR) {
  1458. wait_ms(10);
  1459. if (--smm_timeout == 0) {
  1460. err("USB HC TakeOver failed!");
  1461. return -1;
  1462. }
  1463. }
  1464. }
  1465. /* Disable HC interrupts */
  1466. ohci_writel(OHCI_INTR_MIE, &ohci->regs->intrdisable);
  1467. dbg("USB HC reset_hc usb-%s: ctrl = 0x%X ;\n",
  1468. ohci->slot_name,
  1469. ohci_readl(&ohci->regs->control));
  1470. /* Reset USB (needed by some controllers) */
  1471. ohci->hc_control = 0;
  1472. ohci_writel(ohci->hc_control, &ohci->regs->control);
  1473. /* HC Reset requires max 10 us delay */
  1474. ohci_writel(OHCI_HCR, &ohci->regs->cmdstatus);
  1475. while ((ohci_readl(&ohci->regs->cmdstatus) & OHCI_HCR) != 0) {
  1476. if (--timeout == 0) {
  1477. err("USB HC reset timed out!");
  1478. return -1;
  1479. }
  1480. udelay(1);
  1481. }
  1482. return 0;
  1483. }
  1484. /*-------------------------------------------------------------------------*/
  1485. /* Start an OHCI controller, set the BUS operational
  1486. * enable interrupts
  1487. * connect the virtual root hub */
  1488. static int hc_start(ohci_t *ohci)
  1489. {
  1490. __u32 mask;
  1491. unsigned int fminterval;
  1492. ohci->disabled = 1;
  1493. /* Tell the controller where the control and bulk lists are
  1494. * The lists are empty now. */
  1495. ohci_writel(0, &ohci->regs->ed_controlhead);
  1496. ohci_writel(0, &ohci->regs->ed_bulkhead);
  1497. ohci_writel((__u32)ohci->hcca,
  1498. &ohci->regs->hcca); /* reset clears this */
  1499. fminterval = 0x2edf;
  1500. ohci_writel((fminterval * 9) / 10, &ohci->regs->periodicstart);
  1501. fminterval |= ((((fminterval - 210) * 6) / 7) << 16);
  1502. ohci_writel(fminterval, &ohci->regs->fminterval);
  1503. ohci_writel(0x628, &ohci->regs->lsthresh);
  1504. /* start controller operations */
  1505. ohci->hc_control = OHCI_CONTROL_INIT | OHCI_USB_OPER;
  1506. ohci->disabled = 0;
  1507. ohci_writel(ohci->hc_control, &ohci->regs->control);
  1508. /* disable all interrupts */
  1509. mask = (OHCI_INTR_SO | OHCI_INTR_WDH | OHCI_INTR_SF | OHCI_INTR_RD |
  1510. OHCI_INTR_UE | OHCI_INTR_FNO | OHCI_INTR_RHSC |
  1511. OHCI_INTR_OC | OHCI_INTR_MIE);
  1512. ohci_writel(mask, &ohci->regs->intrdisable);
  1513. /* clear all interrupts */
  1514. mask &= ~OHCI_INTR_MIE;
  1515. ohci_writel(mask, &ohci->regs->intrstatus);
  1516. /* Choose the interrupts we care about now - but w/o MIE */
  1517. mask = OHCI_INTR_RHSC | OHCI_INTR_UE | OHCI_INTR_WDH | OHCI_INTR_SO;
  1518. ohci_writel(mask, &ohci->regs->intrenable);
  1519. #ifdef OHCI_USE_NPS
  1520. /* required for AMD-756 and some Mac platforms */
  1521. ohci_writel((roothub_a(ohci) | RH_A_NPS) & ~RH_A_PSM,
  1522. &ohci->regs->roothub.a);
  1523. ohci_writel(RH_HS_LPSC, &ohci->regs->roothub.status);
  1524. #endif /* OHCI_USE_NPS */
  1525. #define mdelay(n) ({unsigned long msec = (n); while (msec--) udelay(1000); })
  1526. /* POTPGT delay is bits 24-31, in 2 ms units. */
  1527. mdelay((roothub_a(ohci) >> 23) & 0x1fe);
  1528. /* connect the virtual root hub */
  1529. ohci->rh.devnum = 0;
  1530. return 0;
  1531. }
  1532. /*-------------------------------------------------------------------------*/
  1533. /* Poll USB interrupt. */
  1534. void usb_event_poll(void)
  1535. {
  1536. hc_interrupt();
  1537. }
  1538. /* an interrupt happens */
  1539. static int hc_interrupt(void)
  1540. {
  1541. ohci_t *ohci = &gohci;
  1542. struct ohci_regs *regs = ohci->regs;
  1543. int ints;
  1544. int stat = -1;
  1545. if ((ohci->hcca->done_head != 0) &&
  1546. !(m32_swap(ohci->hcca->done_head) & 0x01)) {
  1547. ints = OHCI_INTR_WDH;
  1548. } else {
  1549. ints = ohci_readl(&regs->intrstatus);
  1550. if (ints == ~(u32)0) {
  1551. ohci->disabled++;
  1552. err("%s device removed!", ohci->slot_name);
  1553. return -1;
  1554. } else {
  1555. ints &= ohci_readl(&regs->intrenable);
  1556. if (ints == 0) {
  1557. dbg("hc_interrupt: returning..\n");
  1558. return 0xff;
  1559. }
  1560. }
  1561. }
  1562. /* dbg("Interrupt: %x frame: %x", ints,
  1563. le16_to_cpu(ohci->hcca->frame_no)); */
  1564. if (ints & OHCI_INTR_RHSC)
  1565. stat = 0xff;
  1566. if (ints & OHCI_INTR_UE) {
  1567. ohci->disabled++;
  1568. err("OHCI Unrecoverable Error, controller usb-%s disabled",
  1569. ohci->slot_name);
  1570. /* e.g. due to PCI Master/Target Abort */
  1571. #ifdef DEBUG
  1572. ohci_dump(ohci, 1);
  1573. #else
  1574. wait_ms(1);
  1575. #endif
  1576. /* FIXME: be optimistic, hope that bug won't repeat often. */
  1577. /* Make some non-interrupt context restart the controller. */
  1578. /* Count and limit the retries though; either hardware or */
  1579. /* software errors can go forever... */
  1580. hc_reset(ohci);
  1581. return -1;
  1582. }
  1583. if (ints & OHCI_INTR_WDH) {
  1584. wait_ms(1);
  1585. ohci_writel(OHCI_INTR_WDH, &regs->intrdisable);
  1586. (void)ohci_readl(&regs->intrdisable); /* flush */
  1587. stat = dl_done_list(&gohci);
  1588. ohci_writel(OHCI_INTR_WDH, &regs->intrenable);
  1589. (void)ohci_readl(&regs->intrdisable); /* flush */
  1590. }
  1591. if (ints & OHCI_INTR_SO) {
  1592. dbg("USB Schedule overrun\n");
  1593. ohci_writel(OHCI_INTR_SO, &regs->intrenable);
  1594. stat = -1;
  1595. }
  1596. /* FIXME: this assumes SOF (1/ms) interrupts don't get lost... */
  1597. if (ints & OHCI_INTR_SF) {
  1598. unsigned int frame = m16_swap(ohci->hcca->frame_no) & 1;
  1599. wait_ms(1);
  1600. ohci_writel(OHCI_INTR_SF, &regs->intrdisable);
  1601. if (ohci->ed_rm_list[frame] != NULL)
  1602. ohci_writel(OHCI_INTR_SF, &regs->intrenable);
  1603. stat = 0xff;
  1604. }
  1605. ohci_writel(ints, &regs->intrstatus);
  1606. return stat;
  1607. }
  1608. /*-------------------------------------------------------------------------*/
  1609. /*-------------------------------------------------------------------------*/
  1610. /* De-allocate all resources.. */
  1611. static void hc_release_ohci(ohci_t *ohci)
  1612. {
  1613. dbg("USB HC release ohci usb-%s", ohci->slot_name);
  1614. if (!ohci->disabled)
  1615. hc_reset(ohci);
  1616. }
  1617. /*-------------------------------------------------------------------------*/
  1618. /*
  1619. * low level initalisation routine, called from usb.c
  1620. */
  1621. static char ohci_inited = 0;
  1622. int usb_lowlevel_init(void)
  1623. {
  1624. #ifdef CONFIG_PCI_OHCI
  1625. pci_dev_t pdev;
  1626. #endif
  1627. #ifdef CONFIG_SYS_USB_OHCI_CPU_INIT
  1628. /* cpu dependant init */
  1629. if (usb_cpu_init())
  1630. return -1;
  1631. #endif
  1632. #ifdef CONFIG_SYS_USB_OHCI_BOARD_INIT
  1633. /* board dependant init */
  1634. if (usb_board_init())
  1635. return -1;
  1636. #endif
  1637. memset(&gohci, 0, sizeof(ohci_t));
  1638. /* align the storage */
  1639. if ((__u32)&ghcca[0] & 0xff) {
  1640. err("HCCA not aligned!!");
  1641. return -1;
  1642. }
  1643. phcca = &ghcca[0];
  1644. info("aligned ghcca %p", phcca);
  1645. memset(&ohci_dev, 0, sizeof(struct ohci_device));
  1646. if ((__u32)&ohci_dev.ed[0] & 0x7) {
  1647. err("EDs not aligned!!");
  1648. return -1;
  1649. }
  1650. memset(gtd, 0, sizeof(td_t) * (NUM_TD + 1));
  1651. if ((__u32)gtd & 0x7) {
  1652. err("TDs not aligned!!");
  1653. return -1;
  1654. }
  1655. ptd = gtd;
  1656. gohci.hcca = phcca;
  1657. memset(phcca, 0, sizeof(struct ohci_hcca));
  1658. gohci.disabled = 1;
  1659. gohci.sleeping = 0;
  1660. gohci.irq = -1;
  1661. #ifdef CONFIG_PCI_OHCI
  1662. pdev = pci_find_devices(ohci_pci_ids, CONFIG_PCI_OHCI_DEVNO);
  1663. if (pdev != -1) {
  1664. u16 vid, did;
  1665. u32 base;
  1666. pci_read_config_word(pdev, PCI_VENDOR_ID, &vid);
  1667. pci_read_config_word(pdev, PCI_DEVICE_ID, &did);
  1668. printf("OHCI pci controller (%04x, %04x) found @(%d:%d:%d)\n",
  1669. vid, did, (pdev >> 16) & 0xff,
  1670. (pdev >> 11) & 0x1f, (pdev >> 8) & 0x7);
  1671. pci_read_config_dword(pdev, PCI_BASE_ADDRESS_0, &base);
  1672. printf("OHCI regs address 0x%08x\n", base);
  1673. gohci.regs = (struct ohci_regs *)base;
  1674. } else
  1675. return -1;
  1676. #else
  1677. gohci.regs = (struct ohci_regs *)CONFIG_SYS_USB_OHCI_REGS_BASE;
  1678. #endif
  1679. gohci.flags = 0;
  1680. gohci.slot_name = CONFIG_SYS_USB_OHCI_SLOT_NAME;
  1681. if (hc_reset (&gohci) < 0) {
  1682. hc_release_ohci (&gohci);
  1683. err ("can't reset usb-%s", gohci.slot_name);
  1684. #ifdef CONFIG_SYS_USB_OHCI_BOARD_INIT
  1685. /* board dependant cleanup */
  1686. usb_board_init_fail();
  1687. #endif
  1688. #ifdef CONFIG_SYS_USB_OHCI_CPU_INIT
  1689. /* cpu dependant cleanup */
  1690. usb_cpu_init_fail();
  1691. #endif
  1692. return -1;
  1693. }
  1694. if (hc_start(&gohci) < 0) {
  1695. err("can't start usb-%s", gohci.slot_name);
  1696. hc_release_ohci(&gohci);
  1697. /* Initialization failed */
  1698. #ifdef CONFIG_SYS_USB_OHCI_BOARD_INIT
  1699. /* board dependant cleanup */
  1700. usb_board_stop();
  1701. #endif
  1702. #ifdef CONFIG_SYS_USB_OHCI_CPU_INIT
  1703. /* cpu dependant cleanup */
  1704. usb_cpu_stop();
  1705. #endif
  1706. return -1;
  1707. }
  1708. #ifdef DEBUG
  1709. ohci_dump(&gohci, 1);
  1710. #else
  1711. wait_ms(1);
  1712. #endif
  1713. ohci_inited = 1;
  1714. return 0;
  1715. }
  1716. int usb_lowlevel_stop(void)
  1717. {
  1718. /* this gets called really early - before the controller has */
  1719. /* even been initialized! */
  1720. if (!ohci_inited)
  1721. return 0;
  1722. /* TODO release any interrupts, etc. */
  1723. /* call hc_release_ohci() here ? */
  1724. hc_reset(&gohci);
  1725. #ifdef CONFIG_SYS_USB_OHCI_BOARD_INIT
  1726. /* board dependant cleanup */
  1727. if (usb_board_stop())
  1728. return -1;
  1729. #endif
  1730. #ifdef CONFIG_SYS_USB_OHCI_CPU_INIT
  1731. /* cpu dependant cleanup */
  1732. if (usb_cpu_stop())
  1733. return -1;
  1734. #endif
  1735. /* This driver is no longer initialised. It needs a new low-level
  1736. * init (board/cpu) before it can be used again. */
  1737. ohci_inited = 0;
  1738. return 0;
  1739. }