cf_spi.c 8.5 KB

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  1. /*
  2. *
  3. * (C) Copyright 2000-2003
  4. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  5. *
  6. * Copyright (C) 2004-2009 Freescale Semiconductor, Inc.
  7. * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
  8. *
  9. * See file CREDITS for list of people who contributed to this
  10. * project.
  11. *
  12. * This program is free software; you can redistribute it and/or
  13. * modify it under the terms of the GNU General Public License as
  14. * published by the Free Software Foundation; either version 2 of
  15. * the License, or (at your option) any later version.
  16. *
  17. * This program is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. *
  22. * You should have received a copy of the GNU General Public License
  23. * along with this program; if not, write to the Free Software
  24. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  25. * MA 02111-1307 USA
  26. */
  27. #include <common.h>
  28. #include <spi.h>
  29. #include <malloc.h>
  30. #include <asm/immap.h>
  31. struct cf_spi_slave {
  32. struct spi_slave slave;
  33. uint baudrate;
  34. int charbit;
  35. };
  36. int cfspi_xfer(struct spi_slave *slave, uint bitlen, const void *dout,
  37. void *din, ulong flags);
  38. struct spi_slave *cfspi_setup_slave(struct cf_spi_slave *cfslave, uint mode);
  39. void cfspi_init(void);
  40. void cfspi_tx(u32 ctrl, u16 data);
  41. u16 cfspi_rx(void);
  42. extern void cfspi_port_conf(void);
  43. extern int cfspi_claim_bus(uint bus, uint cs);
  44. extern void cfspi_release_bus(uint bus, uint cs);
  45. DECLARE_GLOBAL_DATA_PTR;
  46. #if defined(CONFIG_CF_DSPI)
  47. /* DSPI specific mode */
  48. #define SPI_MODE_MOD 0x00200000
  49. #define SPI_DBLRATE 0x00100000
  50. void cfspi_init(void)
  51. {
  52. volatile dspi_t *dspi = (dspi_t *) MMAP_DSPI;
  53. cfspi_port_conf(); /* port configuration */
  54. dspi->mcr = DSPI_MCR_MSTR | DSPI_MCR_CSIS7 | DSPI_MCR_CSIS6 |
  55. DSPI_MCR_CSIS5 | DSPI_MCR_CSIS4 | DSPI_MCR_CSIS3 |
  56. DSPI_MCR_CSIS2 | DSPI_MCR_CSIS1 | DSPI_MCR_CSIS0 |
  57. DSPI_MCR_CRXF | DSPI_MCR_CTXF;
  58. /* Default setting in platform configuration */
  59. #ifdef CONFIG_SYS_DSPI_CTAR0
  60. dspi->ctar[0] = CONFIG_SYS_DSPI_CTAR0;
  61. #endif
  62. #ifdef CONFIG_SYS_DSPI_CTAR1
  63. dspi->ctar[1] = CONFIG_SYS_DSPI_CTAR1;
  64. #endif
  65. #ifdef CONFIG_SYS_DSPI_CTAR2
  66. dspi->ctar[2] = CONFIG_SYS_DSPI_CTAR2;
  67. #endif
  68. #ifdef CONFIG_SYS_DSPI_CTAR3
  69. dspi->ctar[3] = CONFIG_SYS_DSPI_CTAR3;
  70. #endif
  71. #ifdef CONFIG_SYS_DSPI_CTAR4
  72. dspi->ctar[4] = CONFIG_SYS_DSPI_CTAR4;
  73. #endif
  74. #ifdef CONFIG_SYS_DSPI_CTAR5
  75. dspi->ctar[5] = CONFIG_SYS_DSPI_CTAR5;
  76. #endif
  77. #ifdef CONFIG_SYS_DSPI_CTAR6
  78. dspi->ctar[6] = CONFIG_SYS_DSPI_CTAR6;
  79. #endif
  80. #ifdef CONFIG_SYS_DSPI_CTAR7
  81. dspi->ctar[7] = CONFIG_SYS_DSPI_CTAR7;
  82. #endif
  83. }
  84. void cfspi_tx(u32 ctrl, u16 data)
  85. {
  86. volatile dspi_t *dspi = (dspi_t *) MMAP_DSPI;
  87. while ((dspi->sr & 0x0000F000) >= 4) ;
  88. dspi->tfr = (ctrl | data);
  89. }
  90. u16 cfspi_rx(void)
  91. {
  92. volatile dspi_t *dspi = (dspi_t *) MMAP_DSPI;
  93. while ((dspi->sr & 0x000000F0) == 0) ;
  94. return (dspi->rfr & 0xFFFF);
  95. }
  96. int cfspi_xfer(struct spi_slave *slave, uint bitlen, const void *dout,
  97. void *din, ulong flags)
  98. {
  99. struct cf_spi_slave *cfslave = (struct cf_spi_slave *)slave;
  100. u16 *spi_rd16 = NULL, *spi_wr16 = NULL;
  101. u8 *spi_rd = NULL, *spi_wr = NULL;
  102. static u32 ctrl = 0;
  103. uint len = bitlen >> 3;
  104. if (cfslave->charbit == 16) {
  105. bitlen >>= 1;
  106. spi_wr16 = (u16 *) dout;
  107. spi_rd16 = (u16 *) din;
  108. } else {
  109. spi_wr = (u8 *) dout;
  110. spi_rd = (u8 *) din;
  111. }
  112. if ((flags & SPI_XFER_BEGIN) == SPI_XFER_BEGIN)
  113. ctrl |= DSPI_TFR_CONT;
  114. ctrl = (ctrl & 0xFF000000) | ((1 << slave->cs) << 16);
  115. if (len > 1) {
  116. int tmp_len = len - 1;
  117. while (tmp_len--) {
  118. if (dout != NULL) {
  119. if (cfslave->charbit == 16)
  120. cfspi_tx(ctrl, *spi_wr16++);
  121. else
  122. cfspi_tx(ctrl, *spi_wr++);
  123. cfspi_rx();
  124. }
  125. if (din != NULL) {
  126. cfspi_tx(ctrl, 0);
  127. if (cfslave->charbit == 16)
  128. *spi_rd16++ = cfspi_rx();
  129. else
  130. *spi_rd++ = cfspi_rx();
  131. }
  132. }
  133. len = 1; /* remaining byte */
  134. }
  135. if ((flags & SPI_XFER_END) == SPI_XFER_END)
  136. ctrl &= ~DSPI_TFR_CONT;
  137. if (len) {
  138. if (dout != NULL) {
  139. if (cfslave->charbit == 16)
  140. cfspi_tx(ctrl, *spi_wr16);
  141. else
  142. cfspi_tx(ctrl, *spi_wr);
  143. cfspi_rx();
  144. }
  145. if (din != NULL) {
  146. cfspi_tx(ctrl, 0);
  147. if (cfslave->charbit == 16)
  148. *spi_rd16 = cfspi_rx();
  149. else
  150. *spi_rd = cfspi_rx();
  151. }
  152. } else {
  153. /* dummy read */
  154. cfspi_tx(ctrl, 0);
  155. cfspi_rx();
  156. }
  157. return 0;
  158. }
  159. struct spi_slave *cfspi_setup_slave(struct cf_spi_slave *cfslave, uint mode)
  160. {
  161. /*
  162. * bit definition for mode:
  163. * bit 31 - 28: Transfer size 3 to 16 bits
  164. * 27 - 26: PCS to SCK delay prescaler
  165. * 25 - 24: After SCK delay prescaler
  166. * 23 - 22: Delay after transfer prescaler
  167. * 21 : Allow overwrite for bit 31-22 and bit 20-8
  168. * 20 : Double baud rate
  169. * 19 - 16: PCS to SCK delay scaler
  170. * 15 - 12: After SCK delay scaler
  171. * 11 - 8: Delay after transfer scaler
  172. * 7 - 0: SPI_CPHA, SPI_CPOL, SPI_LSB_FIRST
  173. */
  174. volatile dspi_t *dspi = (dspi_t *) MMAP_DSPI;
  175. int prescaler[] = { 2, 3, 5, 7 };
  176. int scaler[] = {
  177. 2, 4, 6, 8,
  178. 16, 32, 64, 128,
  179. 256, 512, 1024, 2048,
  180. 4096, 8192, 16384, 32768
  181. };
  182. int i, j, pbrcnt, brcnt, diff, tmp, dbr = 0;
  183. int best_i, best_j, bestmatch = 0x7FFFFFFF, baud_speed;
  184. u32 bus_setup = 0;
  185. tmp = (prescaler[3] * scaler[15]);
  186. /* Maximum and minimum baudrate it can handle */
  187. if ((cfslave->baudrate > (gd->bus_clk >> 1)) ||
  188. (cfslave->baudrate < (gd->bus_clk / tmp))) {
  189. printf("Exceed baudrate limitation: Max %d - Min %d\n",
  190. (int)(gd->bus_clk >> 1), (int)(gd->bus_clk / tmp));
  191. return NULL;
  192. }
  193. /* Activate Double Baud when it exceed 1/4 the bus clk */
  194. if ((CONFIG_SYS_DSPI_CTAR0 & DSPI_CTAR_DBR) ||
  195. (cfslave->baudrate > (gd->bus_clk / (prescaler[0] * scaler[0])))) {
  196. bus_setup |= DSPI_CTAR_DBR;
  197. dbr = 1;
  198. }
  199. if (mode & SPI_CPOL)
  200. bus_setup |= DSPI_CTAR_CPOL;
  201. if (mode & SPI_CPHA)
  202. bus_setup |= DSPI_CTAR_CPHA;
  203. if (mode & SPI_LSB_FIRST)
  204. bus_setup |= DSPI_CTAR_LSBFE;
  205. /* Overwrite default value set in platform configuration file */
  206. if (mode & SPI_MODE_MOD) {
  207. if ((mode & 0xF0000000) == 0)
  208. bus_setup |=
  209. dspi->ctar[cfslave->slave.bus] & 0x78000000;
  210. else
  211. bus_setup |= ((mode & 0xF0000000) >> 1);
  212. /*
  213. * Check to see if it is enabled by default in platform
  214. * config, or manual setting passed by mode parameter
  215. */
  216. if (mode & SPI_DBLRATE) {
  217. bus_setup |= DSPI_CTAR_DBR;
  218. dbr = 1;
  219. }
  220. bus_setup |= (mode & 0x0FC00000) >> 4; /* PSCSCK, PASC, PDT */
  221. bus_setup |= (mode & 0x000FFF00) >> 4; /* CSSCK, ASC, DT */
  222. } else
  223. bus_setup |= (dspi->ctar[cfslave->slave.bus] & 0x78FCFFF0);
  224. cfslave->charbit =
  225. ((dspi->ctar[cfslave->slave.bus] & 0x78000000) ==
  226. 0x78000000) ? 16 : 8;
  227. pbrcnt = sizeof(prescaler) / sizeof(int);
  228. brcnt = sizeof(scaler) / sizeof(int);
  229. /* baudrate calculation - to closer value, may not be exact match */
  230. for (best_i = 0, best_j = 0, i = 0; i < pbrcnt; i++) {
  231. baud_speed = gd->bus_clk / prescaler[i];
  232. for (j = 0; j < brcnt; j++) {
  233. tmp = (baud_speed / scaler[j]) * (1 + dbr);
  234. if (tmp > cfslave->baudrate)
  235. diff = tmp - cfslave->baudrate;
  236. else
  237. diff = cfslave->baudrate - tmp;
  238. if (diff < bestmatch) {
  239. bestmatch = diff;
  240. best_i = i;
  241. best_j = j;
  242. }
  243. }
  244. }
  245. bus_setup |= (DSPI_CTAR_PBR(best_i) | DSPI_CTAR_BR(best_j));
  246. dspi->ctar[cfslave->slave.bus] = bus_setup;
  247. return &cfslave->slave;
  248. }
  249. #endif /* CONFIG_CF_DSPI */
  250. #ifdef CONFIG_CF_QSPI
  251. /* 52xx, 53xx */
  252. #endif /* CONFIG_CF_QSPI */
  253. #ifdef CONFIG_CMD_SPI
  254. int spi_cs_is_valid(unsigned int bus, unsigned int cs)
  255. {
  256. if (((cs >= 0) && (cs < 8)) && ((bus >= 0) && (bus < 8)))
  257. return 1;
  258. else
  259. return 0;
  260. }
  261. void spi_init_f(void)
  262. {
  263. }
  264. void spi_init_r(void)
  265. {
  266. }
  267. void spi_init(void)
  268. {
  269. cfspi_init();
  270. }
  271. struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
  272. unsigned int max_hz, unsigned int mode)
  273. {
  274. struct cf_spi_slave *cfslave;
  275. if (!spi_cs_is_valid(bus, cs))
  276. return NULL;
  277. cfslave = malloc(sizeof(struct cf_spi_slave));
  278. if (!cfslave)
  279. return NULL;
  280. cfslave->slave.bus = bus;
  281. cfslave->slave.cs = cs;
  282. cfslave->baudrate = max_hz;
  283. /* specific setup */
  284. return cfspi_setup_slave(cfslave, mode);
  285. }
  286. void spi_free_slave(struct spi_slave *slave)
  287. {
  288. free(slave);
  289. }
  290. int spi_claim_bus(struct spi_slave *slave)
  291. {
  292. return cfspi_claim_bus(slave->bus, slave->cs);
  293. }
  294. void spi_release_bus(struct spi_slave *slave)
  295. {
  296. cfspi_release_bus(slave->bus, slave->cs);
  297. }
  298. int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
  299. void *din, unsigned long flags)
  300. {
  301. return cfspi_xfer(slave, bitlen, dout, din, flags);
  302. }
  303. #endif /* CONFIG_CMD_SPI */