cfi_flash.c 55 KB

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  1. /*
  2. * (C) Copyright 2002-2004
  3. * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com
  4. *
  5. * Copyright (C) 2003 Arabella Software Ltd.
  6. * Yuli Barcohen <yuli@arabellasw.com>
  7. *
  8. * Copyright (C) 2004
  9. * Ed Okerson
  10. *
  11. * Copyright (C) 2006
  12. * Tolunay Orkun <listmember@orkun.us>
  13. *
  14. * See file CREDITS for list of people who contributed to this
  15. * project.
  16. *
  17. * This program is free software; you can redistribute it and/or
  18. * modify it under the terms of the GNU General Public License as
  19. * published by the Free Software Foundation; either version 2 of
  20. * the License, or (at your option) any later version.
  21. *
  22. * This program is distributed in the hope that it will be useful,
  23. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  24. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  25. * GNU General Public License for more details.
  26. *
  27. * You should have received a copy of the GNU General Public License
  28. * along with this program; if not, write to the Free Software
  29. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  30. * MA 02111-1307 USA
  31. *
  32. */
  33. /* The DEBUG define must be before common to enable debugging */
  34. /* #define DEBUG */
  35. #include <common.h>
  36. #include <asm/processor.h>
  37. #include <asm/io.h>
  38. #include <asm/byteorder.h>
  39. #include <environment.h>
  40. #include <mtd/cfi_flash.h>
  41. /*
  42. * This file implements a Common Flash Interface (CFI) driver for
  43. * U-Boot.
  44. *
  45. * The width of the port and the width of the chips are determined at
  46. * initialization. These widths are used to calculate the address for
  47. * access CFI data structures.
  48. *
  49. * References
  50. * JEDEC Standard JESD68 - Common Flash Interface (CFI)
  51. * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
  52. * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
  53. * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
  54. * AMD CFI Specification, Release 2.0 December 1, 2001
  55. * AMD/Spansion Application Note: Migration from Single-byte to Three-byte
  56. * Device IDs, Publication Number 25538 Revision A, November 8, 2001
  57. *
  58. * Define CONFIG_SYS_WRITE_SWAPPED_DATA, if you have to swap the Bytes between
  59. * reading and writing ... (yes there is such a Hardware).
  60. */
  61. static uint flash_offset_cfi[2] = { FLASH_OFFSET_CFI, FLASH_OFFSET_CFI_ALT };
  62. static uint flash_verbose = 1;
  63. flash_info_t flash_info[CFI_MAX_FLASH_BANKS]; /* FLASH chips info */
  64. /*
  65. * Check if chip width is defined. If not, start detecting with 8bit.
  66. */
  67. #ifndef CONFIG_SYS_FLASH_CFI_WIDTH
  68. #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT
  69. #endif
  70. #if defined(CONFIG_SYS_MAX_FLASH_BANKS_DETECT)
  71. int cfi_flash_num_flash_banks = CONFIG_SYS_MAX_FLASH_BANKS_DETECT;
  72. #endif
  73. static phys_addr_t __cfi_flash_bank_addr(int i)
  74. {
  75. return ((phys_addr_t [])CONFIG_SYS_FLASH_BANKS_LIST)[i];
  76. }
  77. phys_addr_t cfi_flash_bank_addr(int i)
  78. __attribute__((weak, alias("__cfi_flash_bank_addr")));
  79. static void __flash_write8(u8 value, void *addr)
  80. {
  81. __raw_writeb(value, addr);
  82. }
  83. static void __flash_write16(u16 value, void *addr)
  84. {
  85. __raw_writew(value, addr);
  86. }
  87. static void __flash_write32(u32 value, void *addr)
  88. {
  89. __raw_writel(value, addr);
  90. }
  91. static void __flash_write64(u64 value, void *addr)
  92. {
  93. /* No architectures currently implement __raw_writeq() */
  94. *(volatile u64 *)addr = value;
  95. }
  96. static u8 __flash_read8(void *addr)
  97. {
  98. return __raw_readb(addr);
  99. }
  100. static u16 __flash_read16(void *addr)
  101. {
  102. return __raw_readw(addr);
  103. }
  104. static u32 __flash_read32(void *addr)
  105. {
  106. return __raw_readl(addr);
  107. }
  108. static u64 __flash_read64(void *addr)
  109. {
  110. /* No architectures currently implement __raw_readq() */
  111. return *(volatile u64 *)addr;
  112. }
  113. #ifdef CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
  114. void flash_write8(u8 value, void *addr)__attribute__((weak, alias("__flash_write8")));
  115. void flash_write16(u16 value, void *addr)__attribute__((weak, alias("__flash_write16")));
  116. void flash_write32(u32 value, void *addr)__attribute__((weak, alias("__flash_write32")));
  117. void flash_write64(u64 value, void *addr)__attribute__((weak, alias("__flash_write64")));
  118. u8 flash_read8(void *addr)__attribute__((weak, alias("__flash_read8")));
  119. u16 flash_read16(void *addr)__attribute__((weak, alias("__flash_read16")));
  120. u32 flash_read32(void *addr)__attribute__((weak, alias("__flash_read32")));
  121. u64 flash_read64(void *addr)__attribute__((weak, alias("__flash_read64")));
  122. #else
  123. #define flash_write8 __flash_write8
  124. #define flash_write16 __flash_write16
  125. #define flash_write32 __flash_write32
  126. #define flash_write64 __flash_write64
  127. #define flash_read8 __flash_read8
  128. #define flash_read16 __flash_read16
  129. #define flash_read32 __flash_read32
  130. #define flash_read64 __flash_read64
  131. #endif
  132. /*-----------------------------------------------------------------------
  133. */
  134. #if defined(CONFIG_ENV_IS_IN_FLASH) || defined(CONFIG_ENV_ADDR_REDUND) || (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE)
  135. flash_info_t *flash_get_info(ulong base)
  136. {
  137. int i;
  138. flash_info_t *info = NULL;
  139. for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
  140. info = & flash_info[i];
  141. if (info->size && info->start[0] <= base &&
  142. base <= info->start[0] + info->size - 1)
  143. break;
  144. }
  145. return info;
  146. }
  147. #endif
  148. unsigned long flash_sector_size(flash_info_t *info, flash_sect_t sect)
  149. {
  150. if (sect != (info->sector_count - 1))
  151. return info->start[sect + 1] - info->start[sect];
  152. else
  153. return info->start[0] + info->size - info->start[sect];
  154. }
  155. /*-----------------------------------------------------------------------
  156. * create an address based on the offset and the port width
  157. */
  158. static inline void *
  159. flash_map (flash_info_t * info, flash_sect_t sect, uint offset)
  160. {
  161. unsigned int byte_offset = offset * info->portwidth;
  162. return (void *)(info->start[sect] + byte_offset);
  163. }
  164. static inline void flash_unmap(flash_info_t *info, flash_sect_t sect,
  165. unsigned int offset, void *addr)
  166. {
  167. }
  168. /*-----------------------------------------------------------------------
  169. * make a proper sized command based on the port and chip widths
  170. */
  171. static void flash_make_cmd(flash_info_t *info, u32 cmd, void *cmdbuf)
  172. {
  173. int i;
  174. int cword_offset;
  175. int cp_offset;
  176. #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  177. u32 cmd_le = cpu_to_le32(cmd);
  178. #endif
  179. uchar val;
  180. uchar *cp = (uchar *) cmdbuf;
  181. for (i = info->portwidth; i > 0; i--){
  182. cword_offset = (info->portwidth-i)%info->chipwidth;
  183. #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  184. cp_offset = info->portwidth - i;
  185. val = *((uchar*)&cmd_le + cword_offset);
  186. #else
  187. cp_offset = i - 1;
  188. val = *((uchar*)&cmd + sizeof(u32) - cword_offset - 1);
  189. #endif
  190. cp[cp_offset] = (cword_offset >= sizeof(u32)) ? 0x00 : val;
  191. }
  192. }
  193. #ifdef DEBUG
  194. /*-----------------------------------------------------------------------
  195. * Debug support
  196. */
  197. static void print_longlong (char *str, unsigned long long data)
  198. {
  199. int i;
  200. char *cp;
  201. cp = (char *) &data;
  202. for (i = 0; i < 8; i++)
  203. sprintf (&str[i * 2], "%2.2x", *cp++);
  204. }
  205. static void flash_printqry (struct cfi_qry *qry)
  206. {
  207. u8 *p = (u8 *)qry;
  208. int x, y;
  209. for (x = 0; x < sizeof(struct cfi_qry); x += 16) {
  210. debug("%02x : ", x);
  211. for (y = 0; y < 16; y++)
  212. debug("%2.2x ", p[x + y]);
  213. debug(" ");
  214. for (y = 0; y < 16; y++) {
  215. unsigned char c = p[x + y];
  216. if (c >= 0x20 && c <= 0x7e)
  217. debug("%c", c);
  218. else
  219. debug(".");
  220. }
  221. debug("\n");
  222. }
  223. }
  224. #endif
  225. /*-----------------------------------------------------------------------
  226. * read a character at a port width address
  227. */
  228. static inline uchar flash_read_uchar (flash_info_t * info, uint offset)
  229. {
  230. uchar *cp;
  231. uchar retval;
  232. cp = flash_map (info, 0, offset);
  233. #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  234. retval = flash_read8(cp);
  235. #else
  236. retval = flash_read8(cp + info->portwidth - 1);
  237. #endif
  238. flash_unmap (info, 0, offset, cp);
  239. return retval;
  240. }
  241. /*-----------------------------------------------------------------------
  242. * read a word at a port width address, assume 16bit bus
  243. */
  244. static inline ushort flash_read_word (flash_info_t * info, uint offset)
  245. {
  246. ushort *addr, retval;
  247. addr = flash_map (info, 0, offset);
  248. retval = flash_read16 (addr);
  249. flash_unmap (info, 0, offset, addr);
  250. return retval;
  251. }
  252. /*-----------------------------------------------------------------------
  253. * read a long word by picking the least significant byte of each maximum
  254. * port size word. Swap for ppc format.
  255. */
  256. static ulong flash_read_long (flash_info_t * info, flash_sect_t sect,
  257. uint offset)
  258. {
  259. uchar *addr;
  260. ulong retval;
  261. #ifdef DEBUG
  262. int x;
  263. #endif
  264. addr = flash_map (info, sect, offset);
  265. #ifdef DEBUG
  266. debug ("long addr is at %p info->portwidth = %d\n", addr,
  267. info->portwidth);
  268. for (x = 0; x < 4 * info->portwidth; x++) {
  269. debug ("addr[%x] = 0x%x\n", x, flash_read8(addr + x));
  270. }
  271. #endif
  272. #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  273. retval = ((flash_read8(addr) << 16) |
  274. (flash_read8(addr + info->portwidth) << 24) |
  275. (flash_read8(addr + 2 * info->portwidth)) |
  276. (flash_read8(addr + 3 * info->portwidth) << 8));
  277. #else
  278. retval = ((flash_read8(addr + 2 * info->portwidth - 1) << 24) |
  279. (flash_read8(addr + info->portwidth - 1) << 16) |
  280. (flash_read8(addr + 4 * info->portwidth - 1) << 8) |
  281. (flash_read8(addr + 3 * info->portwidth - 1)));
  282. #endif
  283. flash_unmap(info, sect, offset, addr);
  284. return retval;
  285. }
  286. /*
  287. * Write a proper sized command to the correct address
  288. */
  289. void flash_write_cmd (flash_info_t * info, flash_sect_t sect,
  290. uint offset, u32 cmd)
  291. {
  292. void *addr;
  293. cfiword_t cword;
  294. addr = flash_map (info, sect, offset);
  295. flash_make_cmd (info, cmd, &cword);
  296. switch (info->portwidth) {
  297. case FLASH_CFI_8BIT:
  298. debug ("fwc addr %p cmd %x %x 8bit x %d bit\n", addr, cmd,
  299. cword.c, info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
  300. flash_write8(cword.c, addr);
  301. break;
  302. case FLASH_CFI_16BIT:
  303. debug ("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr,
  304. cmd, cword.w,
  305. info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
  306. flash_write16(cword.w, addr);
  307. break;
  308. case FLASH_CFI_32BIT:
  309. debug ("fwc addr %p cmd %x %8.8lx 32bit x %d bit\n", addr,
  310. cmd, cword.l,
  311. info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
  312. flash_write32(cword.l, addr);
  313. break;
  314. case FLASH_CFI_64BIT:
  315. #ifdef DEBUG
  316. {
  317. char str[20];
  318. print_longlong (str, cword.ll);
  319. debug ("fwrite addr %p cmd %x %s 64 bit x %d bit\n",
  320. addr, cmd, str,
  321. info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
  322. }
  323. #endif
  324. flash_write64(cword.ll, addr);
  325. break;
  326. }
  327. /* Ensure all the instructions are fully finished */
  328. sync();
  329. flash_unmap(info, sect, offset, addr);
  330. }
  331. static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect)
  332. {
  333. flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_UNLOCK_START);
  334. flash_write_cmd (info, sect, info->addr_unlock2, AMD_CMD_UNLOCK_ACK);
  335. }
  336. /*-----------------------------------------------------------------------
  337. */
  338. static int flash_isequal (flash_info_t * info, flash_sect_t sect,
  339. uint offset, uchar cmd)
  340. {
  341. void *addr;
  342. cfiword_t cword;
  343. int retval;
  344. addr = flash_map (info, sect, offset);
  345. flash_make_cmd (info, cmd, &cword);
  346. debug ("is= cmd %x(%c) addr %p ", cmd, cmd, addr);
  347. switch (info->portwidth) {
  348. case FLASH_CFI_8BIT:
  349. debug ("is= %x %x\n", flash_read8(addr), cword.c);
  350. retval = (flash_read8(addr) == cword.c);
  351. break;
  352. case FLASH_CFI_16BIT:
  353. debug ("is= %4.4x %4.4x\n", flash_read16(addr), cword.w);
  354. retval = (flash_read16(addr) == cword.w);
  355. break;
  356. case FLASH_CFI_32BIT:
  357. debug ("is= %8.8x %8.8lx\n", flash_read32(addr), cword.l);
  358. retval = (flash_read32(addr) == cword.l);
  359. break;
  360. case FLASH_CFI_64BIT:
  361. #ifdef DEBUG
  362. {
  363. char str1[20];
  364. char str2[20];
  365. print_longlong (str1, flash_read64(addr));
  366. print_longlong (str2, cword.ll);
  367. debug ("is= %s %s\n", str1, str2);
  368. }
  369. #endif
  370. retval = (flash_read64(addr) == cword.ll);
  371. break;
  372. default:
  373. retval = 0;
  374. break;
  375. }
  376. flash_unmap(info, sect, offset, addr);
  377. return retval;
  378. }
  379. /*-----------------------------------------------------------------------
  380. */
  381. static int flash_isset (flash_info_t * info, flash_sect_t sect,
  382. uint offset, uchar cmd)
  383. {
  384. void *addr;
  385. cfiword_t cword;
  386. int retval;
  387. addr = flash_map (info, sect, offset);
  388. flash_make_cmd (info, cmd, &cword);
  389. switch (info->portwidth) {
  390. case FLASH_CFI_8BIT:
  391. retval = ((flash_read8(addr) & cword.c) == cword.c);
  392. break;
  393. case FLASH_CFI_16BIT:
  394. retval = ((flash_read16(addr) & cword.w) == cword.w);
  395. break;
  396. case FLASH_CFI_32BIT:
  397. retval = ((flash_read32(addr) & cword.l) == cword.l);
  398. break;
  399. case FLASH_CFI_64BIT:
  400. retval = ((flash_read64(addr) & cword.ll) == cword.ll);
  401. break;
  402. default:
  403. retval = 0;
  404. break;
  405. }
  406. flash_unmap(info, sect, offset, addr);
  407. return retval;
  408. }
  409. /*-----------------------------------------------------------------------
  410. */
  411. static int flash_toggle (flash_info_t * info, flash_sect_t sect,
  412. uint offset, uchar cmd)
  413. {
  414. void *addr;
  415. cfiword_t cword;
  416. int retval;
  417. addr = flash_map (info, sect, offset);
  418. flash_make_cmd (info, cmd, &cword);
  419. switch (info->portwidth) {
  420. case FLASH_CFI_8BIT:
  421. retval = flash_read8(addr) != flash_read8(addr);
  422. break;
  423. case FLASH_CFI_16BIT:
  424. retval = flash_read16(addr) != flash_read16(addr);
  425. break;
  426. case FLASH_CFI_32BIT:
  427. retval = flash_read32(addr) != flash_read32(addr);
  428. break;
  429. case FLASH_CFI_64BIT:
  430. retval = ( (flash_read32( addr ) != flash_read32( addr )) ||
  431. (flash_read32(addr+4) != flash_read32(addr+4)) );
  432. break;
  433. default:
  434. retval = 0;
  435. break;
  436. }
  437. flash_unmap(info, sect, offset, addr);
  438. return retval;
  439. }
  440. /*
  441. * flash_is_busy - check to see if the flash is busy
  442. *
  443. * This routine checks the status of the chip and returns true if the
  444. * chip is busy.
  445. */
  446. static int flash_is_busy (flash_info_t * info, flash_sect_t sect)
  447. {
  448. int retval;
  449. switch (info->vendor) {
  450. case CFI_CMDSET_INTEL_PROG_REGIONS:
  451. case CFI_CMDSET_INTEL_STANDARD:
  452. case CFI_CMDSET_INTEL_EXTENDED:
  453. retval = !flash_isset (info, sect, 0, FLASH_STATUS_DONE);
  454. break;
  455. case CFI_CMDSET_AMD_STANDARD:
  456. case CFI_CMDSET_AMD_EXTENDED:
  457. #ifdef CONFIG_FLASH_CFI_LEGACY
  458. case CFI_CMDSET_AMD_LEGACY:
  459. #endif
  460. retval = flash_toggle (info, sect, 0, AMD_STATUS_TOGGLE);
  461. break;
  462. default:
  463. retval = 0;
  464. }
  465. debug ("flash_is_busy: %d\n", retval);
  466. return retval;
  467. }
  468. /*-----------------------------------------------------------------------
  469. * wait for XSR.7 to be set. Time out with an error if it does not.
  470. * This routine does not set the flash to read-array mode.
  471. */
  472. static int flash_status_check (flash_info_t * info, flash_sect_t sector,
  473. ulong tout, char *prompt)
  474. {
  475. ulong start;
  476. #if CONFIG_SYS_HZ != 1000
  477. if ((ulong)CONFIG_SYS_HZ > 100000)
  478. tout *= (ulong)CONFIG_SYS_HZ / 1000; /* for a big HZ, avoid overflow */
  479. else
  480. tout = DIV_ROUND_UP(tout * (ulong)CONFIG_SYS_HZ, 1000);
  481. #endif
  482. /* Wait for command completion */
  483. reset_timer();
  484. start = get_timer (0);
  485. while (flash_is_busy (info, sector)) {
  486. if (get_timer (start) > tout) {
  487. printf ("Flash %s timeout at address %lx data %lx\n",
  488. prompt, info->start[sector],
  489. flash_read_long (info, sector, 0));
  490. flash_write_cmd (info, sector, 0, info->cmd_reset);
  491. return ERR_TIMOUT;
  492. }
  493. udelay (1); /* also triggers watchdog */
  494. }
  495. return ERR_OK;
  496. }
  497. /*-----------------------------------------------------------------------
  498. * Wait for XSR.7 to be set, if it times out print an error, otherwise
  499. * do a full status check.
  500. *
  501. * This routine sets the flash to read-array mode.
  502. */
  503. static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
  504. ulong tout, char *prompt)
  505. {
  506. int retcode;
  507. retcode = flash_status_check (info, sector, tout, prompt);
  508. switch (info->vendor) {
  509. case CFI_CMDSET_INTEL_PROG_REGIONS:
  510. case CFI_CMDSET_INTEL_EXTENDED:
  511. case CFI_CMDSET_INTEL_STANDARD:
  512. if ((retcode != ERR_OK)
  513. && !flash_isequal (info, sector, 0, FLASH_STATUS_DONE)) {
  514. retcode = ERR_INVAL;
  515. printf ("Flash %s error at address %lx\n", prompt,
  516. info->start[sector]);
  517. if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS |
  518. FLASH_STATUS_PSLBS)) {
  519. puts ("Command Sequence Error.\n");
  520. } else if (flash_isset (info, sector, 0,
  521. FLASH_STATUS_ECLBS)) {
  522. puts ("Block Erase Error.\n");
  523. retcode = ERR_NOT_ERASED;
  524. } else if (flash_isset (info, sector, 0,
  525. FLASH_STATUS_PSLBS)) {
  526. puts ("Locking Error\n");
  527. }
  528. if (flash_isset (info, sector, 0, FLASH_STATUS_DPS)) {
  529. puts ("Block locked.\n");
  530. retcode = ERR_PROTECTED;
  531. }
  532. if (flash_isset (info, sector, 0, FLASH_STATUS_VPENS))
  533. puts ("Vpp Low Error.\n");
  534. }
  535. flash_write_cmd (info, sector, 0, info->cmd_reset);
  536. break;
  537. default:
  538. break;
  539. }
  540. return retcode;
  541. }
  542. static int use_flash_status_poll(flash_info_t *info)
  543. {
  544. #ifdef CONFIG_SYS_CFI_FLASH_STATUS_POLL
  545. if (info->vendor == CFI_CMDSET_AMD_EXTENDED ||
  546. info->vendor == CFI_CMDSET_AMD_STANDARD)
  547. return 1;
  548. #endif
  549. return 0;
  550. }
  551. static int flash_status_poll(flash_info_t *info, void *src, void *dst,
  552. ulong tout, char *prompt)
  553. {
  554. #ifdef CONFIG_SYS_CFI_FLASH_STATUS_POLL
  555. ulong start;
  556. int ready;
  557. #if CONFIG_SYS_HZ != 1000
  558. if ((ulong)CONFIG_SYS_HZ > 100000)
  559. tout *= (ulong)CONFIG_SYS_HZ / 1000; /* for a big HZ, avoid overflow */
  560. else
  561. tout = DIV_ROUND_UP(tout * (ulong)CONFIG_SYS_HZ, 1000);
  562. #endif
  563. /* Wait for command completion */
  564. reset_timer();
  565. start = get_timer(0);
  566. while (1) {
  567. switch (info->portwidth) {
  568. case FLASH_CFI_8BIT:
  569. ready = flash_read8(dst) == flash_read8(src);
  570. break;
  571. case FLASH_CFI_16BIT:
  572. ready = flash_read16(dst) == flash_read16(src);
  573. break;
  574. case FLASH_CFI_32BIT:
  575. ready = flash_read32(dst) == flash_read32(src);
  576. break;
  577. case FLASH_CFI_64BIT:
  578. ready = flash_read64(dst) == flash_read64(src);
  579. break;
  580. default:
  581. ready = 0;
  582. break;
  583. }
  584. if (ready)
  585. break;
  586. if (get_timer(start) > tout) {
  587. printf("Flash %s timeout at address %lx data %lx\n",
  588. prompt, (ulong)dst, (ulong)flash_read8(dst));
  589. return ERR_TIMOUT;
  590. }
  591. udelay(1); /* also triggers watchdog */
  592. }
  593. #endif /* CONFIG_SYS_CFI_FLASH_STATUS_POLL */
  594. return ERR_OK;
  595. }
  596. /*-----------------------------------------------------------------------
  597. */
  598. static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c)
  599. {
  600. #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  601. unsigned short w;
  602. unsigned int l;
  603. unsigned long long ll;
  604. #endif
  605. switch (info->portwidth) {
  606. case FLASH_CFI_8BIT:
  607. cword->c = c;
  608. break;
  609. case FLASH_CFI_16BIT:
  610. #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  611. w = c;
  612. w <<= 8;
  613. cword->w = (cword->w >> 8) | w;
  614. #else
  615. cword->w = (cword->w << 8) | c;
  616. #endif
  617. break;
  618. case FLASH_CFI_32BIT:
  619. #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  620. l = c;
  621. l <<= 24;
  622. cword->l = (cword->l >> 8) | l;
  623. #else
  624. cword->l = (cword->l << 8) | c;
  625. #endif
  626. break;
  627. case FLASH_CFI_64BIT:
  628. #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  629. ll = c;
  630. ll <<= 56;
  631. cword->ll = (cword->ll >> 8) | ll;
  632. #else
  633. cword->ll = (cword->ll << 8) | c;
  634. #endif
  635. break;
  636. }
  637. }
  638. /*
  639. * Loop through the sector table starting from the previously found sector.
  640. * Searches forwards or backwards, dependent on the passed address.
  641. */
  642. static flash_sect_t find_sector (flash_info_t * info, ulong addr)
  643. {
  644. static flash_sect_t saved_sector = 0; /* previously found sector */
  645. flash_sect_t sector = saved_sector;
  646. while ((info->start[sector] < addr)
  647. && (sector < info->sector_count - 1))
  648. sector++;
  649. while ((info->start[sector] > addr) && (sector > 0))
  650. /*
  651. * also decrements the sector in case of an overshot
  652. * in the first loop
  653. */
  654. sector--;
  655. saved_sector = sector;
  656. return sector;
  657. }
  658. /*-----------------------------------------------------------------------
  659. */
  660. static int flash_write_cfiword (flash_info_t * info, ulong dest,
  661. cfiword_t cword)
  662. {
  663. void *dstaddr = (void *)dest;
  664. int flag;
  665. flash_sect_t sect = 0;
  666. char sect_found = 0;
  667. /* Check if Flash is (sufficiently) erased */
  668. switch (info->portwidth) {
  669. case FLASH_CFI_8BIT:
  670. flag = ((flash_read8(dstaddr) & cword.c) == cword.c);
  671. break;
  672. case FLASH_CFI_16BIT:
  673. flag = ((flash_read16(dstaddr) & cword.w) == cword.w);
  674. break;
  675. case FLASH_CFI_32BIT:
  676. flag = ((flash_read32(dstaddr) & cword.l) == cword.l);
  677. break;
  678. case FLASH_CFI_64BIT:
  679. flag = ((flash_read64(dstaddr) & cword.ll) == cword.ll);
  680. break;
  681. default:
  682. flag = 0;
  683. break;
  684. }
  685. if (!flag)
  686. return ERR_NOT_ERASED;
  687. /* Disable interrupts which might cause a timeout here */
  688. flag = disable_interrupts ();
  689. switch (info->vendor) {
  690. case CFI_CMDSET_INTEL_PROG_REGIONS:
  691. case CFI_CMDSET_INTEL_EXTENDED:
  692. case CFI_CMDSET_INTEL_STANDARD:
  693. flash_write_cmd (info, 0, 0, FLASH_CMD_CLEAR_STATUS);
  694. flash_write_cmd (info, 0, 0, FLASH_CMD_WRITE);
  695. break;
  696. case CFI_CMDSET_AMD_EXTENDED:
  697. case CFI_CMDSET_AMD_STANDARD:
  698. sect = find_sector(info, dest);
  699. flash_unlock_seq (info, sect);
  700. flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_WRITE);
  701. sect_found = 1;
  702. break;
  703. #ifdef CONFIG_FLASH_CFI_LEGACY
  704. case CFI_CMDSET_AMD_LEGACY:
  705. sect = find_sector(info, dest);
  706. flash_unlock_seq (info, 0);
  707. flash_write_cmd (info, 0, info->addr_unlock1, AMD_CMD_WRITE);
  708. sect_found = 1;
  709. break;
  710. #endif
  711. }
  712. switch (info->portwidth) {
  713. case FLASH_CFI_8BIT:
  714. flash_write8(cword.c, dstaddr);
  715. break;
  716. case FLASH_CFI_16BIT:
  717. flash_write16(cword.w, dstaddr);
  718. break;
  719. case FLASH_CFI_32BIT:
  720. flash_write32(cword.l, dstaddr);
  721. break;
  722. case FLASH_CFI_64BIT:
  723. flash_write64(cword.ll, dstaddr);
  724. break;
  725. }
  726. /* re-enable interrupts if necessary */
  727. if (flag)
  728. enable_interrupts ();
  729. if (!sect_found)
  730. sect = find_sector (info, dest);
  731. if (use_flash_status_poll(info))
  732. return flash_status_poll(info, &cword, dstaddr,
  733. info->write_tout, "write");
  734. else
  735. return flash_full_status_check(info, sect,
  736. info->write_tout, "write");
  737. }
  738. #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
  739. static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp,
  740. int len)
  741. {
  742. flash_sect_t sector;
  743. int cnt;
  744. int retcode;
  745. void *src = cp;
  746. void *dst = (void *)dest;
  747. void *dst2 = dst;
  748. int flag = 0;
  749. uint offset = 0;
  750. unsigned int shift;
  751. uchar write_cmd;
  752. switch (info->portwidth) {
  753. case FLASH_CFI_8BIT:
  754. shift = 0;
  755. break;
  756. case FLASH_CFI_16BIT:
  757. shift = 1;
  758. break;
  759. case FLASH_CFI_32BIT:
  760. shift = 2;
  761. break;
  762. case FLASH_CFI_64BIT:
  763. shift = 3;
  764. break;
  765. default:
  766. retcode = ERR_INVAL;
  767. goto out_unmap;
  768. }
  769. cnt = len >> shift;
  770. while ((cnt-- > 0) && (flag == 0)) {
  771. switch (info->portwidth) {
  772. case FLASH_CFI_8BIT:
  773. flag = ((flash_read8(dst2) & flash_read8(src)) ==
  774. flash_read8(src));
  775. src += 1, dst2 += 1;
  776. break;
  777. case FLASH_CFI_16BIT:
  778. flag = ((flash_read16(dst2) & flash_read16(src)) ==
  779. flash_read16(src));
  780. src += 2, dst2 += 2;
  781. break;
  782. case FLASH_CFI_32BIT:
  783. flag = ((flash_read32(dst2) & flash_read32(src)) ==
  784. flash_read32(src));
  785. src += 4, dst2 += 4;
  786. break;
  787. case FLASH_CFI_64BIT:
  788. flag = ((flash_read64(dst2) & flash_read64(src)) ==
  789. flash_read64(src));
  790. src += 8, dst2 += 8;
  791. break;
  792. }
  793. }
  794. if (!flag) {
  795. retcode = ERR_NOT_ERASED;
  796. goto out_unmap;
  797. }
  798. src = cp;
  799. sector = find_sector (info, dest);
  800. switch (info->vendor) {
  801. case CFI_CMDSET_INTEL_PROG_REGIONS:
  802. case CFI_CMDSET_INTEL_STANDARD:
  803. case CFI_CMDSET_INTEL_EXTENDED:
  804. write_cmd = (info->vendor == CFI_CMDSET_INTEL_PROG_REGIONS) ?
  805. FLASH_CMD_WRITE_BUFFER_PROG : FLASH_CMD_WRITE_TO_BUFFER;
  806. flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
  807. flash_write_cmd (info, sector, 0, FLASH_CMD_READ_STATUS);
  808. flash_write_cmd (info, sector, 0, write_cmd);
  809. retcode = flash_status_check (info, sector,
  810. info->buffer_write_tout,
  811. "write to buffer");
  812. if (retcode == ERR_OK) {
  813. /* reduce the number of loops by the width of
  814. * the port */
  815. cnt = len >> shift;
  816. flash_write_cmd (info, sector, 0, cnt - 1);
  817. while (cnt-- > 0) {
  818. switch (info->portwidth) {
  819. case FLASH_CFI_8BIT:
  820. flash_write8(flash_read8(src), dst);
  821. src += 1, dst += 1;
  822. break;
  823. case FLASH_CFI_16BIT:
  824. flash_write16(flash_read16(src), dst);
  825. src += 2, dst += 2;
  826. break;
  827. case FLASH_CFI_32BIT:
  828. flash_write32(flash_read32(src), dst);
  829. src += 4, dst += 4;
  830. break;
  831. case FLASH_CFI_64BIT:
  832. flash_write64(flash_read64(src), dst);
  833. src += 8, dst += 8;
  834. break;
  835. default:
  836. retcode = ERR_INVAL;
  837. goto out_unmap;
  838. }
  839. }
  840. flash_write_cmd (info, sector, 0,
  841. FLASH_CMD_WRITE_BUFFER_CONFIRM);
  842. retcode = flash_full_status_check (
  843. info, sector, info->buffer_write_tout,
  844. "buffer write");
  845. }
  846. break;
  847. case CFI_CMDSET_AMD_STANDARD:
  848. case CFI_CMDSET_AMD_EXTENDED:
  849. flash_unlock_seq(info,0);
  850. #ifdef CONFIG_FLASH_SPANSION_S29WS_N
  851. offset = ((unsigned long)dst - info->start[sector]) >> shift;
  852. #endif
  853. flash_write_cmd(info, sector, offset, AMD_CMD_WRITE_TO_BUFFER);
  854. cnt = len >> shift;
  855. flash_write_cmd(info, sector, offset, cnt - 1);
  856. switch (info->portwidth) {
  857. case FLASH_CFI_8BIT:
  858. while (cnt-- > 0) {
  859. flash_write8(flash_read8(src), dst);
  860. src += 1, dst += 1;
  861. }
  862. break;
  863. case FLASH_CFI_16BIT:
  864. while (cnt-- > 0) {
  865. flash_write16(flash_read16(src), dst);
  866. src += 2, dst += 2;
  867. }
  868. break;
  869. case FLASH_CFI_32BIT:
  870. while (cnt-- > 0) {
  871. flash_write32(flash_read32(src), dst);
  872. src += 4, dst += 4;
  873. }
  874. break;
  875. case FLASH_CFI_64BIT:
  876. while (cnt-- > 0) {
  877. flash_write64(flash_read64(src), dst);
  878. src += 8, dst += 8;
  879. }
  880. break;
  881. default:
  882. retcode = ERR_INVAL;
  883. goto out_unmap;
  884. }
  885. flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_BUFFER_CONFIRM);
  886. if (use_flash_status_poll(info))
  887. retcode = flash_status_poll(info, src - (1 << shift),
  888. dst - (1 << shift),
  889. info->buffer_write_tout,
  890. "buffer write");
  891. else
  892. retcode = flash_full_status_check(info, sector,
  893. info->buffer_write_tout,
  894. "buffer write");
  895. break;
  896. default:
  897. debug ("Unknown Command Set\n");
  898. retcode = ERR_INVAL;
  899. break;
  900. }
  901. out_unmap:
  902. return retcode;
  903. }
  904. #endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
  905. /*-----------------------------------------------------------------------
  906. */
  907. int flash_erase (flash_info_t * info, int s_first, int s_last)
  908. {
  909. int rcode = 0;
  910. int prot;
  911. flash_sect_t sect;
  912. int st;
  913. if (info->flash_id != FLASH_MAN_CFI) {
  914. puts ("Can't erase unknown flash type - aborted\n");
  915. return 1;
  916. }
  917. if ((s_first < 0) || (s_first > s_last)) {
  918. puts ("- no sectors to erase\n");
  919. return 1;
  920. }
  921. prot = 0;
  922. for (sect = s_first; sect <= s_last; ++sect) {
  923. if (info->protect[sect]) {
  924. prot++;
  925. }
  926. }
  927. if (prot) {
  928. printf ("- Warning: %d protected sectors will not be erased!\n",
  929. prot);
  930. } else if (flash_verbose) {
  931. putc ('\n');
  932. }
  933. for (sect = s_first; sect <= s_last; sect++) {
  934. if (info->protect[sect] == 0) { /* not protected */
  935. switch (info->vendor) {
  936. case CFI_CMDSET_INTEL_PROG_REGIONS:
  937. case CFI_CMDSET_INTEL_STANDARD:
  938. case CFI_CMDSET_INTEL_EXTENDED:
  939. flash_write_cmd (info, sect, 0,
  940. FLASH_CMD_CLEAR_STATUS);
  941. flash_write_cmd (info, sect, 0,
  942. FLASH_CMD_BLOCK_ERASE);
  943. flash_write_cmd (info, sect, 0,
  944. FLASH_CMD_ERASE_CONFIRM);
  945. break;
  946. case CFI_CMDSET_AMD_STANDARD:
  947. case CFI_CMDSET_AMD_EXTENDED:
  948. flash_unlock_seq (info, sect);
  949. flash_write_cmd (info, sect,
  950. info->addr_unlock1,
  951. AMD_CMD_ERASE_START);
  952. flash_unlock_seq (info, sect);
  953. flash_write_cmd (info, sect, 0,
  954. AMD_CMD_ERASE_SECTOR);
  955. break;
  956. #ifdef CONFIG_FLASH_CFI_LEGACY
  957. case CFI_CMDSET_AMD_LEGACY:
  958. flash_unlock_seq (info, 0);
  959. flash_write_cmd (info, 0, info->addr_unlock1,
  960. AMD_CMD_ERASE_START);
  961. flash_unlock_seq (info, 0);
  962. flash_write_cmd (info, sect, 0,
  963. AMD_CMD_ERASE_SECTOR);
  964. break;
  965. #endif
  966. default:
  967. debug ("Unkown flash vendor %d\n",
  968. info->vendor);
  969. break;
  970. }
  971. if (use_flash_status_poll(info)) {
  972. cfiword_t cword = (cfiword_t)0xffffffffffffffffULL;
  973. void *dest;
  974. dest = flash_map(info, sect, 0);
  975. st = flash_status_poll(info, &cword, dest,
  976. info->erase_blk_tout, "erase");
  977. flash_unmap(info, sect, 0, dest);
  978. } else
  979. st = flash_full_status_check(info, sect,
  980. info->erase_blk_tout,
  981. "erase");
  982. if (st)
  983. rcode = 1;
  984. else if (flash_verbose)
  985. putc ('.');
  986. }
  987. }
  988. if (flash_verbose)
  989. puts (" done\n");
  990. return rcode;
  991. }
  992. #ifdef CONFIG_SYS_FLASH_EMPTY_INFO
  993. static int sector_erased(flash_info_t *info, int i)
  994. {
  995. int k;
  996. int size;
  997. volatile unsigned long *flash;
  998. /*
  999. * Check if whole sector is erased
  1000. */
  1001. size = flash_sector_size(info, i);
  1002. flash = (volatile unsigned long *) info->start[i];
  1003. /* divide by 4 for longword access */
  1004. size = size >> 2;
  1005. for (k = 0; k < size; k++) {
  1006. if (*flash++ != 0xffffffff)
  1007. return 0; /* not erased */
  1008. }
  1009. return 1; /* erased */
  1010. }
  1011. #endif /* CONFIG_SYS_FLASH_EMPTY_INFO */
  1012. void flash_print_info (flash_info_t * info)
  1013. {
  1014. int i;
  1015. if (info->flash_id != FLASH_MAN_CFI) {
  1016. puts ("missing or unknown FLASH type\n");
  1017. return;
  1018. }
  1019. printf ("%s FLASH (%d x %d)",
  1020. info->name,
  1021. (info->portwidth << 3), (info->chipwidth << 3));
  1022. if (info->size < 1024*1024)
  1023. printf (" Size: %ld kB in %d Sectors\n",
  1024. info->size >> 10, info->sector_count);
  1025. else
  1026. printf (" Size: %ld MB in %d Sectors\n",
  1027. info->size >> 20, info->sector_count);
  1028. printf (" ");
  1029. switch (info->vendor) {
  1030. case CFI_CMDSET_INTEL_PROG_REGIONS:
  1031. printf ("Intel Prog Regions");
  1032. break;
  1033. case CFI_CMDSET_INTEL_STANDARD:
  1034. printf ("Intel Standard");
  1035. break;
  1036. case CFI_CMDSET_INTEL_EXTENDED:
  1037. printf ("Intel Extended");
  1038. break;
  1039. case CFI_CMDSET_AMD_STANDARD:
  1040. printf ("AMD Standard");
  1041. break;
  1042. case CFI_CMDSET_AMD_EXTENDED:
  1043. printf ("AMD Extended");
  1044. break;
  1045. #ifdef CONFIG_FLASH_CFI_LEGACY
  1046. case CFI_CMDSET_AMD_LEGACY:
  1047. printf ("AMD Legacy");
  1048. break;
  1049. #endif
  1050. default:
  1051. printf ("Unknown (%d)", info->vendor);
  1052. break;
  1053. }
  1054. printf (" command set, Manufacturer ID: 0x%02X, Device ID: 0x",
  1055. info->manufacturer_id);
  1056. printf (info->chipwidth == FLASH_CFI_16BIT ? "%04X" : "%02X",
  1057. info->device_id);
  1058. if (info->device_id == 0x7E) {
  1059. printf("%04X", info->device_id2);
  1060. }
  1061. printf ("\n Erase timeout: %ld ms, write timeout: %ld ms\n",
  1062. info->erase_blk_tout,
  1063. info->write_tout);
  1064. if (info->buffer_size > 1) {
  1065. printf (" Buffer write timeout: %ld ms, "
  1066. "buffer size: %d bytes\n",
  1067. info->buffer_write_tout,
  1068. info->buffer_size);
  1069. }
  1070. puts ("\n Sector Start Addresses:");
  1071. for (i = 0; i < info->sector_count; ++i) {
  1072. if (ctrlc())
  1073. break;
  1074. if ((i % 5) == 0)
  1075. putc('\n');
  1076. #ifdef CONFIG_SYS_FLASH_EMPTY_INFO
  1077. /* print empty and read-only info */
  1078. printf (" %08lX %c %s ",
  1079. info->start[i],
  1080. sector_erased(info, i) ? 'E' : ' ',
  1081. info->protect[i] ? "RO" : " ");
  1082. #else /* ! CONFIG_SYS_FLASH_EMPTY_INFO */
  1083. printf (" %08lX %s ",
  1084. info->start[i],
  1085. info->protect[i] ? "RO" : " ");
  1086. #endif
  1087. }
  1088. putc ('\n');
  1089. return;
  1090. }
  1091. /*-----------------------------------------------------------------------
  1092. * This is used in a few places in write_buf() to show programming
  1093. * progress. Making it a function is nasty because it needs to do side
  1094. * effect updates to digit and dots. Repeated code is nasty too, so
  1095. * we define it once here.
  1096. */
  1097. #ifdef CONFIG_FLASH_SHOW_PROGRESS
  1098. #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub) \
  1099. if (flash_verbose) { \
  1100. dots -= dots_sub; \
  1101. if ((scale > 0) && (dots <= 0)) { \
  1102. if ((digit % 5) == 0) \
  1103. printf ("%d", digit / 5); \
  1104. else \
  1105. putc ('.'); \
  1106. digit--; \
  1107. dots += scale; \
  1108. } \
  1109. }
  1110. #else
  1111. #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub)
  1112. #endif
  1113. /*-----------------------------------------------------------------------
  1114. * Copy memory to flash, returns:
  1115. * 0 - OK
  1116. * 1 - write timeout
  1117. * 2 - Flash not erased
  1118. */
  1119. int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
  1120. {
  1121. ulong wp;
  1122. uchar *p;
  1123. int aln;
  1124. cfiword_t cword;
  1125. int i, rc;
  1126. #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
  1127. int buffered_size;
  1128. #endif
  1129. #ifdef CONFIG_FLASH_SHOW_PROGRESS
  1130. int digit = CONFIG_FLASH_SHOW_PROGRESS;
  1131. int scale = 0;
  1132. int dots = 0;
  1133. /*
  1134. * Suppress if there are fewer than CONFIG_FLASH_SHOW_PROGRESS writes.
  1135. */
  1136. if (cnt >= CONFIG_FLASH_SHOW_PROGRESS) {
  1137. scale = (int)((cnt + CONFIG_FLASH_SHOW_PROGRESS - 1) /
  1138. CONFIG_FLASH_SHOW_PROGRESS);
  1139. }
  1140. #endif
  1141. /* get lower aligned address */
  1142. wp = (addr & ~(info->portwidth - 1));
  1143. /* handle unaligned start */
  1144. if ((aln = addr - wp) != 0) {
  1145. cword.l = 0;
  1146. p = (uchar *)wp;
  1147. for (i = 0; i < aln; ++i)
  1148. flash_add_byte (info, &cword, flash_read8(p + i));
  1149. for (; (i < info->portwidth) && (cnt > 0); i++) {
  1150. flash_add_byte (info, &cword, *src++);
  1151. cnt--;
  1152. }
  1153. for (; (cnt == 0) && (i < info->portwidth); ++i)
  1154. flash_add_byte (info, &cword, flash_read8(p + i));
  1155. rc = flash_write_cfiword (info, wp, cword);
  1156. if (rc != 0)
  1157. return rc;
  1158. wp += i;
  1159. FLASH_SHOW_PROGRESS(scale, dots, digit, i);
  1160. }
  1161. /* handle the aligned part */
  1162. #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
  1163. buffered_size = (info->portwidth / info->chipwidth);
  1164. buffered_size *= info->buffer_size;
  1165. while (cnt >= info->portwidth) {
  1166. /* prohibit buffer write when buffer_size is 1 */
  1167. if (info->buffer_size == 1) {
  1168. cword.l = 0;
  1169. for (i = 0; i < info->portwidth; i++)
  1170. flash_add_byte (info, &cword, *src++);
  1171. if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
  1172. return rc;
  1173. wp += info->portwidth;
  1174. cnt -= info->portwidth;
  1175. continue;
  1176. }
  1177. /* write buffer until next buffered_size aligned boundary */
  1178. i = buffered_size - (wp % buffered_size);
  1179. if (i > cnt)
  1180. i = cnt;
  1181. if ((rc = flash_write_cfibuffer (info, wp, src, i)) != ERR_OK)
  1182. return rc;
  1183. i -= i & (info->portwidth - 1);
  1184. wp += i;
  1185. src += i;
  1186. cnt -= i;
  1187. FLASH_SHOW_PROGRESS(scale, dots, digit, i);
  1188. }
  1189. #else
  1190. while (cnt >= info->portwidth) {
  1191. cword.l = 0;
  1192. for (i = 0; i < info->portwidth; i++) {
  1193. flash_add_byte (info, &cword, *src++);
  1194. }
  1195. if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
  1196. return rc;
  1197. wp += info->portwidth;
  1198. cnt -= info->portwidth;
  1199. FLASH_SHOW_PROGRESS(scale, dots, digit, info->portwidth);
  1200. }
  1201. #endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
  1202. if (cnt == 0) {
  1203. return (0);
  1204. }
  1205. /*
  1206. * handle unaligned tail bytes
  1207. */
  1208. cword.l = 0;
  1209. p = (uchar *)wp;
  1210. for (i = 0; (i < info->portwidth) && (cnt > 0); ++i) {
  1211. flash_add_byte (info, &cword, *src++);
  1212. --cnt;
  1213. }
  1214. for (; i < info->portwidth; ++i)
  1215. flash_add_byte (info, &cword, flash_read8(p + i));
  1216. return flash_write_cfiword (info, wp, cword);
  1217. }
  1218. /*-----------------------------------------------------------------------
  1219. */
  1220. #ifdef CONFIG_SYS_FLASH_PROTECTION
  1221. int flash_real_protect (flash_info_t * info, long sector, int prot)
  1222. {
  1223. int retcode = 0;
  1224. switch (info->vendor) {
  1225. case CFI_CMDSET_INTEL_PROG_REGIONS:
  1226. case CFI_CMDSET_INTEL_STANDARD:
  1227. case CFI_CMDSET_INTEL_EXTENDED:
  1228. /*
  1229. * see errata called
  1230. * "Numonyx Axcell P33/P30 Specification Update" :)
  1231. */
  1232. flash_write_cmd (info, sector, 0, FLASH_CMD_READ_ID);
  1233. if (!flash_isequal (info, sector, FLASH_OFFSET_PROTECT,
  1234. prot)) {
  1235. /*
  1236. * cmd must come before FLASH_CMD_PROTECT + 20us
  1237. * Disable interrupts which might cause a timeout here.
  1238. */
  1239. int flag = disable_interrupts ();
  1240. unsigned short cmd;
  1241. if (prot)
  1242. cmd = FLASH_CMD_PROTECT_SET;
  1243. else
  1244. cmd = FLASH_CMD_PROTECT_CLEAR;
  1245. flash_write_cmd (info, sector, 0,
  1246. FLASH_CMD_PROTECT);
  1247. flash_write_cmd (info, sector, 0, cmd);
  1248. /* re-enable interrupts if necessary */
  1249. if (flag)
  1250. enable_interrupts ();
  1251. }
  1252. break;
  1253. case CFI_CMDSET_AMD_EXTENDED:
  1254. case CFI_CMDSET_AMD_STANDARD:
  1255. /* U-Boot only checks the first byte */
  1256. if (info->manufacturer_id == (uchar)ATM_MANUFACT) {
  1257. if (prot) {
  1258. flash_unlock_seq (info, 0);
  1259. flash_write_cmd (info, 0,
  1260. info->addr_unlock1,
  1261. ATM_CMD_SOFTLOCK_START);
  1262. flash_unlock_seq (info, 0);
  1263. flash_write_cmd (info, sector, 0,
  1264. ATM_CMD_LOCK_SECT);
  1265. } else {
  1266. flash_write_cmd (info, 0,
  1267. info->addr_unlock1,
  1268. AMD_CMD_UNLOCK_START);
  1269. if (info->device_id == ATM_ID_BV6416)
  1270. flash_write_cmd (info, sector,
  1271. 0, ATM_CMD_UNLOCK_SECT);
  1272. }
  1273. }
  1274. break;
  1275. #ifdef CONFIG_FLASH_CFI_LEGACY
  1276. case CFI_CMDSET_AMD_LEGACY:
  1277. flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
  1278. flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT);
  1279. if (prot)
  1280. flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_SET);
  1281. else
  1282. flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_CLEAR);
  1283. #endif
  1284. };
  1285. if ((retcode =
  1286. flash_full_status_check (info, sector, info->erase_blk_tout,
  1287. prot ? "protect" : "unprotect")) == 0) {
  1288. info->protect[sector] = prot;
  1289. /*
  1290. * On some of Intel's flash chips (marked via legacy_unlock)
  1291. * unprotect unprotects all locking.
  1292. */
  1293. if ((prot == 0) && (info->legacy_unlock)) {
  1294. flash_sect_t i;
  1295. for (i = 0; i < info->sector_count; i++) {
  1296. if (info->protect[i])
  1297. flash_real_protect (info, i, 1);
  1298. }
  1299. }
  1300. }
  1301. return retcode;
  1302. }
  1303. /*-----------------------------------------------------------------------
  1304. * flash_read_user_serial - read the OneTimeProgramming cells
  1305. */
  1306. void flash_read_user_serial (flash_info_t * info, void *buffer, int offset,
  1307. int len)
  1308. {
  1309. uchar *src;
  1310. uchar *dst;
  1311. dst = buffer;
  1312. src = flash_map (info, 0, FLASH_OFFSET_USER_PROTECTION);
  1313. flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
  1314. memcpy (dst, src + offset, len);
  1315. flash_write_cmd (info, 0, 0, info->cmd_reset);
  1316. flash_unmap(info, 0, FLASH_OFFSET_USER_PROTECTION, src);
  1317. }
  1318. /*
  1319. * flash_read_factory_serial - read the device Id from the protection area
  1320. */
  1321. void flash_read_factory_serial (flash_info_t * info, void *buffer, int offset,
  1322. int len)
  1323. {
  1324. uchar *src;
  1325. src = flash_map (info, 0, FLASH_OFFSET_INTEL_PROTECTION);
  1326. flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
  1327. memcpy (buffer, src + offset, len);
  1328. flash_write_cmd (info, 0, 0, info->cmd_reset);
  1329. flash_unmap(info, 0, FLASH_OFFSET_INTEL_PROTECTION, src);
  1330. }
  1331. #endif /* CONFIG_SYS_FLASH_PROTECTION */
  1332. /*-----------------------------------------------------------------------
  1333. * Reverse the order of the erase regions in the CFI QRY structure.
  1334. * This is needed for chips that are either a) correctly detected as
  1335. * top-boot, or b) buggy.
  1336. */
  1337. static void cfi_reverse_geometry(struct cfi_qry *qry)
  1338. {
  1339. unsigned int i, j;
  1340. u32 tmp;
  1341. for (i = 0, j = qry->num_erase_regions - 1; i < j; i++, j--) {
  1342. tmp = qry->erase_region_info[i];
  1343. qry->erase_region_info[i] = qry->erase_region_info[j];
  1344. qry->erase_region_info[j] = tmp;
  1345. }
  1346. }
  1347. /*-----------------------------------------------------------------------
  1348. * read jedec ids from device and set corresponding fields in info struct
  1349. *
  1350. * Note: assume cfi->vendor, cfi->portwidth and cfi->chipwidth are correct
  1351. *
  1352. */
  1353. static void cmdset_intel_read_jedec_ids(flash_info_t *info)
  1354. {
  1355. flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
  1356. flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
  1357. udelay(1000); /* some flash are slow to respond */
  1358. info->manufacturer_id = flash_read_uchar (info,
  1359. FLASH_OFFSET_MANUFACTURER_ID);
  1360. info->device_id = (info->chipwidth == FLASH_CFI_16BIT) ?
  1361. flash_read_word (info, FLASH_OFFSET_DEVICE_ID) :
  1362. flash_read_uchar (info, FLASH_OFFSET_DEVICE_ID);
  1363. flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
  1364. }
  1365. static int cmdset_intel_init(flash_info_t *info, struct cfi_qry *qry)
  1366. {
  1367. info->cmd_reset = FLASH_CMD_RESET;
  1368. cmdset_intel_read_jedec_ids(info);
  1369. flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
  1370. #ifdef CONFIG_SYS_FLASH_PROTECTION
  1371. /* read legacy lock/unlock bit from intel flash */
  1372. if (info->ext_addr) {
  1373. info->legacy_unlock = flash_read_uchar (info,
  1374. info->ext_addr + 5) & 0x08;
  1375. }
  1376. #endif
  1377. return 0;
  1378. }
  1379. static void cmdset_amd_read_jedec_ids(flash_info_t *info)
  1380. {
  1381. ushort bankId = 0;
  1382. uchar manuId;
  1383. flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
  1384. flash_unlock_seq(info, 0);
  1385. flash_write_cmd(info, 0, info->addr_unlock1, FLASH_CMD_READ_ID);
  1386. udelay(1000); /* some flash are slow to respond */
  1387. manuId = flash_read_uchar (info, FLASH_OFFSET_MANUFACTURER_ID);
  1388. /* JEDEC JEP106Z specifies ID codes up to bank 7 */
  1389. while (manuId == FLASH_CONTINUATION_CODE && bankId < 0x800) {
  1390. bankId += 0x100;
  1391. manuId = flash_read_uchar (info,
  1392. bankId | FLASH_OFFSET_MANUFACTURER_ID);
  1393. }
  1394. info->manufacturer_id = manuId;
  1395. switch (info->chipwidth){
  1396. case FLASH_CFI_8BIT:
  1397. info->device_id = flash_read_uchar (info,
  1398. FLASH_OFFSET_DEVICE_ID);
  1399. if (info->device_id == 0x7E) {
  1400. /* AMD 3-byte (expanded) device ids */
  1401. info->device_id2 = flash_read_uchar (info,
  1402. FLASH_OFFSET_DEVICE_ID2);
  1403. info->device_id2 <<= 8;
  1404. info->device_id2 |= flash_read_uchar (info,
  1405. FLASH_OFFSET_DEVICE_ID3);
  1406. }
  1407. break;
  1408. case FLASH_CFI_16BIT:
  1409. info->device_id = flash_read_word (info,
  1410. FLASH_OFFSET_DEVICE_ID);
  1411. break;
  1412. default:
  1413. break;
  1414. }
  1415. flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
  1416. }
  1417. static int cmdset_amd_init(flash_info_t *info, struct cfi_qry *qry)
  1418. {
  1419. info->cmd_reset = AMD_CMD_RESET;
  1420. cmdset_amd_read_jedec_ids(info);
  1421. flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
  1422. return 0;
  1423. }
  1424. #ifdef CONFIG_FLASH_CFI_LEGACY
  1425. static void flash_read_jedec_ids (flash_info_t * info)
  1426. {
  1427. info->manufacturer_id = 0;
  1428. info->device_id = 0;
  1429. info->device_id2 = 0;
  1430. switch (info->vendor) {
  1431. case CFI_CMDSET_INTEL_PROG_REGIONS:
  1432. case CFI_CMDSET_INTEL_STANDARD:
  1433. case CFI_CMDSET_INTEL_EXTENDED:
  1434. cmdset_intel_read_jedec_ids(info);
  1435. break;
  1436. case CFI_CMDSET_AMD_STANDARD:
  1437. case CFI_CMDSET_AMD_EXTENDED:
  1438. cmdset_amd_read_jedec_ids(info);
  1439. break;
  1440. default:
  1441. break;
  1442. }
  1443. }
  1444. /*-----------------------------------------------------------------------
  1445. * Call board code to request info about non-CFI flash.
  1446. * board_flash_get_legacy needs to fill in at least:
  1447. * info->portwidth, info->chipwidth and info->interface for Jedec probing.
  1448. */
  1449. static int flash_detect_legacy(phys_addr_t base, int banknum)
  1450. {
  1451. flash_info_t *info = &flash_info[banknum];
  1452. if (board_flash_get_legacy(base, banknum, info)) {
  1453. /* board code may have filled info completely. If not, we
  1454. use JEDEC ID probing. */
  1455. if (!info->vendor) {
  1456. int modes[] = {
  1457. CFI_CMDSET_AMD_STANDARD,
  1458. CFI_CMDSET_INTEL_STANDARD
  1459. };
  1460. int i;
  1461. for (i = 0; i < sizeof(modes) / sizeof(modes[0]); i++) {
  1462. info->vendor = modes[i];
  1463. info->start[0] =
  1464. (ulong)map_physmem(base,
  1465. info->portwidth,
  1466. MAP_NOCACHE);
  1467. if (info->portwidth == FLASH_CFI_8BIT
  1468. && info->interface == FLASH_CFI_X8X16) {
  1469. info->addr_unlock1 = 0x2AAA;
  1470. info->addr_unlock2 = 0x5555;
  1471. } else {
  1472. info->addr_unlock1 = 0x5555;
  1473. info->addr_unlock2 = 0x2AAA;
  1474. }
  1475. flash_read_jedec_ids(info);
  1476. debug("JEDEC PROBE: ID %x %x %x\n",
  1477. info->manufacturer_id,
  1478. info->device_id,
  1479. info->device_id2);
  1480. if (jedec_flash_match(info, info->start[0]))
  1481. break;
  1482. else
  1483. unmap_physmem((void *)info->start[0],
  1484. MAP_NOCACHE);
  1485. }
  1486. }
  1487. switch(info->vendor) {
  1488. case CFI_CMDSET_INTEL_PROG_REGIONS:
  1489. case CFI_CMDSET_INTEL_STANDARD:
  1490. case CFI_CMDSET_INTEL_EXTENDED:
  1491. info->cmd_reset = FLASH_CMD_RESET;
  1492. break;
  1493. case CFI_CMDSET_AMD_STANDARD:
  1494. case CFI_CMDSET_AMD_EXTENDED:
  1495. case CFI_CMDSET_AMD_LEGACY:
  1496. info->cmd_reset = AMD_CMD_RESET;
  1497. break;
  1498. }
  1499. info->flash_id = FLASH_MAN_CFI;
  1500. return 1;
  1501. }
  1502. return 0; /* use CFI */
  1503. }
  1504. #else
  1505. static inline int flash_detect_legacy(phys_addr_t base, int banknum)
  1506. {
  1507. return 0; /* use CFI */
  1508. }
  1509. #endif
  1510. /*-----------------------------------------------------------------------
  1511. * detect if flash is compatible with the Common Flash Interface (CFI)
  1512. * http://www.jedec.org/download/search/jesd68.pdf
  1513. */
  1514. static void flash_read_cfi (flash_info_t *info, void *buf,
  1515. unsigned int start, size_t len)
  1516. {
  1517. u8 *p = buf;
  1518. unsigned int i;
  1519. for (i = 0; i < len; i++)
  1520. p[i] = flash_read_uchar(info, start + i);
  1521. }
  1522. void __flash_cmd_reset(flash_info_t *info)
  1523. {
  1524. /*
  1525. * We do not yet know what kind of commandset to use, so we issue
  1526. * the reset command in both Intel and AMD variants, in the hope
  1527. * that AMD flash roms ignore the Intel command.
  1528. */
  1529. flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
  1530. flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
  1531. }
  1532. void flash_cmd_reset(flash_info_t *info)
  1533. __attribute__((weak,alias("__flash_cmd_reset")));
  1534. static int __flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry)
  1535. {
  1536. int cfi_offset;
  1537. /* Issue FLASH reset command */
  1538. flash_cmd_reset(info);
  1539. for (cfi_offset=0;
  1540. cfi_offset < sizeof(flash_offset_cfi) / sizeof(uint);
  1541. cfi_offset++) {
  1542. flash_write_cmd (info, 0, flash_offset_cfi[cfi_offset],
  1543. FLASH_CMD_CFI);
  1544. if (flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP, 'Q')
  1545. && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R')
  1546. && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) {
  1547. flash_read_cfi(info, qry, FLASH_OFFSET_CFI_RESP,
  1548. sizeof(struct cfi_qry));
  1549. info->interface = le16_to_cpu(qry->interface_desc);
  1550. info->cfi_offset = flash_offset_cfi[cfi_offset];
  1551. debug ("device interface is %d\n",
  1552. info->interface);
  1553. debug ("found port %d chip %d ",
  1554. info->portwidth, info->chipwidth);
  1555. debug ("port %d bits chip %d bits\n",
  1556. info->portwidth << CFI_FLASH_SHIFT_WIDTH,
  1557. info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
  1558. /* calculate command offsets as in the Linux driver */
  1559. info->addr_unlock1 = 0x555;
  1560. info->addr_unlock2 = 0x2aa;
  1561. /*
  1562. * modify the unlock address if we are
  1563. * in compatibility mode
  1564. */
  1565. if ( /* x8/x16 in x8 mode */
  1566. ((info->chipwidth == FLASH_CFI_BY8) &&
  1567. (info->interface == FLASH_CFI_X8X16)) ||
  1568. /* x16/x32 in x16 mode */
  1569. ((info->chipwidth == FLASH_CFI_BY16) &&
  1570. (info->interface == FLASH_CFI_X16X32)))
  1571. {
  1572. info->addr_unlock1 = 0xaaa;
  1573. info->addr_unlock2 = 0x555;
  1574. }
  1575. info->name = "CFI conformant";
  1576. return 1;
  1577. }
  1578. }
  1579. return 0;
  1580. }
  1581. static int flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry)
  1582. {
  1583. debug ("flash detect cfi\n");
  1584. for (info->portwidth = CONFIG_SYS_FLASH_CFI_WIDTH;
  1585. info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) {
  1586. for (info->chipwidth = FLASH_CFI_BY8;
  1587. info->chipwidth <= info->portwidth;
  1588. info->chipwidth <<= 1)
  1589. if (__flash_detect_cfi(info, qry))
  1590. return 1;
  1591. }
  1592. debug ("not found\n");
  1593. return 0;
  1594. }
  1595. /*
  1596. * Manufacturer-specific quirks. Add workarounds for geometry
  1597. * reversal, etc. here.
  1598. */
  1599. static void flash_fixup_amd(flash_info_t *info, struct cfi_qry *qry)
  1600. {
  1601. /* check if flash geometry needs reversal */
  1602. if (qry->num_erase_regions > 1) {
  1603. /* reverse geometry if top boot part */
  1604. if (info->cfi_version < 0x3131) {
  1605. /* CFI < 1.1, try to guess from device id */
  1606. if ((info->device_id & 0x80) != 0)
  1607. cfi_reverse_geometry(qry);
  1608. } else if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) {
  1609. /* CFI >= 1.1, deduct from top/bottom flag */
  1610. /* note: ext_addr is valid since cfi_version > 0 */
  1611. cfi_reverse_geometry(qry);
  1612. }
  1613. }
  1614. }
  1615. static void flash_fixup_atmel(flash_info_t *info, struct cfi_qry *qry)
  1616. {
  1617. int reverse_geometry = 0;
  1618. /* Check the "top boot" bit in the PRI */
  1619. if (info->ext_addr && !(flash_read_uchar(info, info->ext_addr + 6) & 1))
  1620. reverse_geometry = 1;
  1621. /* AT49BV6416(T) list the erase regions in the wrong order.
  1622. * However, the device ID is identical with the non-broken
  1623. * AT49BV642D they differ in the high byte.
  1624. */
  1625. if (info->device_id == 0xd6 || info->device_id == 0xd2)
  1626. reverse_geometry = !reverse_geometry;
  1627. if (reverse_geometry)
  1628. cfi_reverse_geometry(qry);
  1629. }
  1630. static void flash_fixup_stm(flash_info_t *info, struct cfi_qry *qry)
  1631. {
  1632. /* check if flash geometry needs reversal */
  1633. if (qry->num_erase_regions > 1) {
  1634. /* reverse geometry if top boot part */
  1635. if (info->cfi_version < 0x3131) {
  1636. /* CFI < 1.1, guess by device id (M29W320{DT,ET} only) */
  1637. if (info->device_id == 0x22CA ||
  1638. info->device_id == 0x2256) {
  1639. cfi_reverse_geometry(qry);
  1640. }
  1641. }
  1642. }
  1643. }
  1644. /*
  1645. * The following code cannot be run from FLASH!
  1646. *
  1647. */
  1648. ulong flash_get_size (phys_addr_t base, int banknum)
  1649. {
  1650. flash_info_t *info = &flash_info[banknum];
  1651. int i, j;
  1652. flash_sect_t sect_cnt;
  1653. phys_addr_t sector;
  1654. unsigned long tmp;
  1655. int size_ratio;
  1656. uchar num_erase_regions;
  1657. int erase_region_size;
  1658. int erase_region_count;
  1659. struct cfi_qry qry;
  1660. memset(&qry, 0, sizeof(qry));
  1661. info->ext_addr = 0;
  1662. info->cfi_version = 0;
  1663. #ifdef CONFIG_SYS_FLASH_PROTECTION
  1664. info->legacy_unlock = 0;
  1665. #endif
  1666. info->start[0] = (ulong)map_physmem(base, info->portwidth, MAP_NOCACHE);
  1667. if (flash_detect_cfi (info, &qry)) {
  1668. info->vendor = le16_to_cpu(qry.p_id);
  1669. info->ext_addr = le16_to_cpu(qry.p_adr);
  1670. num_erase_regions = qry.num_erase_regions;
  1671. if (info->ext_addr) {
  1672. info->cfi_version = (ushort) flash_read_uchar (info,
  1673. info->ext_addr + 3) << 8;
  1674. info->cfi_version |= (ushort) flash_read_uchar (info,
  1675. info->ext_addr + 4);
  1676. }
  1677. #ifdef DEBUG
  1678. flash_printqry (&qry);
  1679. #endif
  1680. switch (info->vendor) {
  1681. case CFI_CMDSET_INTEL_PROG_REGIONS:
  1682. case CFI_CMDSET_INTEL_STANDARD:
  1683. case CFI_CMDSET_INTEL_EXTENDED:
  1684. cmdset_intel_init(info, &qry);
  1685. break;
  1686. case CFI_CMDSET_AMD_STANDARD:
  1687. case CFI_CMDSET_AMD_EXTENDED:
  1688. cmdset_amd_init(info, &qry);
  1689. break;
  1690. default:
  1691. printf("CFI: Unknown command set 0x%x\n",
  1692. info->vendor);
  1693. /*
  1694. * Unfortunately, this means we don't know how
  1695. * to get the chip back to Read mode. Might
  1696. * as well try an Intel-style reset...
  1697. */
  1698. flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
  1699. return 0;
  1700. }
  1701. /* Do manufacturer-specific fixups */
  1702. switch (info->manufacturer_id) {
  1703. case 0x0001:
  1704. flash_fixup_amd(info, &qry);
  1705. break;
  1706. case 0x001f:
  1707. flash_fixup_atmel(info, &qry);
  1708. break;
  1709. case 0x0020:
  1710. flash_fixup_stm(info, &qry);
  1711. break;
  1712. }
  1713. debug ("manufacturer is %d\n", info->vendor);
  1714. debug ("manufacturer id is 0x%x\n", info->manufacturer_id);
  1715. debug ("device id is 0x%x\n", info->device_id);
  1716. debug ("device id2 is 0x%x\n", info->device_id2);
  1717. debug ("cfi version is 0x%04x\n", info->cfi_version);
  1718. size_ratio = info->portwidth / info->chipwidth;
  1719. /* if the chip is x8/x16 reduce the ratio by half */
  1720. if ((info->interface == FLASH_CFI_X8X16)
  1721. && (info->chipwidth == FLASH_CFI_BY8)) {
  1722. size_ratio >>= 1;
  1723. }
  1724. debug ("size_ratio %d port %d bits chip %d bits\n",
  1725. size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH,
  1726. info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
  1727. debug ("found %d erase regions\n", num_erase_regions);
  1728. sect_cnt = 0;
  1729. sector = base;
  1730. for (i = 0; i < num_erase_regions; i++) {
  1731. if (i > NUM_ERASE_REGIONS) {
  1732. printf ("%d erase regions found, only %d used\n",
  1733. num_erase_regions, NUM_ERASE_REGIONS);
  1734. break;
  1735. }
  1736. tmp = le32_to_cpu(qry.erase_region_info[i]);
  1737. debug("erase region %u: 0x%08lx\n", i, tmp);
  1738. erase_region_count = (tmp & 0xffff) + 1;
  1739. tmp >>= 16;
  1740. erase_region_size =
  1741. (tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128;
  1742. debug ("erase_region_count = %d erase_region_size = %d\n",
  1743. erase_region_count, erase_region_size);
  1744. for (j = 0; j < erase_region_count; j++) {
  1745. if (sect_cnt >= CONFIG_SYS_MAX_FLASH_SECT) {
  1746. printf("ERROR: too many flash sectors\n");
  1747. break;
  1748. }
  1749. info->start[sect_cnt] =
  1750. (ulong)map_physmem(sector,
  1751. info->portwidth,
  1752. MAP_NOCACHE);
  1753. sector += (erase_region_size * size_ratio);
  1754. /*
  1755. * Only read protection status from
  1756. * supported devices (intel...)
  1757. */
  1758. switch (info->vendor) {
  1759. case CFI_CMDSET_INTEL_PROG_REGIONS:
  1760. case CFI_CMDSET_INTEL_EXTENDED:
  1761. case CFI_CMDSET_INTEL_STANDARD:
  1762. info->protect[sect_cnt] =
  1763. flash_isset (info, sect_cnt,
  1764. FLASH_OFFSET_PROTECT,
  1765. FLASH_STATUS_PROTECT);
  1766. break;
  1767. default:
  1768. /* default: not protected */
  1769. info->protect[sect_cnt] = 0;
  1770. }
  1771. sect_cnt++;
  1772. }
  1773. }
  1774. info->sector_count = sect_cnt;
  1775. info->size = 1 << qry.dev_size;
  1776. /* multiply the size by the number of chips */
  1777. info->size *= size_ratio;
  1778. info->buffer_size = 1 << le16_to_cpu(qry.max_buf_write_size);
  1779. tmp = 1 << qry.block_erase_timeout_typ;
  1780. info->erase_blk_tout = tmp *
  1781. (1 << qry.block_erase_timeout_max);
  1782. tmp = (1 << qry.buf_write_timeout_typ) *
  1783. (1 << qry.buf_write_timeout_max);
  1784. /* round up when converting to ms */
  1785. info->buffer_write_tout = (tmp + 999) / 1000;
  1786. tmp = (1 << qry.word_write_timeout_typ) *
  1787. (1 << qry.word_write_timeout_max);
  1788. /* round up when converting to ms */
  1789. info->write_tout = (tmp + 999) / 1000;
  1790. info->flash_id = FLASH_MAN_CFI;
  1791. if ((info->interface == FLASH_CFI_X8X16) &&
  1792. (info->chipwidth == FLASH_CFI_BY8)) {
  1793. /* XXX - Need to test on x8/x16 in parallel. */
  1794. info->portwidth >>= 1;
  1795. }
  1796. flash_write_cmd (info, 0, 0, info->cmd_reset);
  1797. }
  1798. return (info->size);
  1799. }
  1800. void flash_set_verbose(uint v)
  1801. {
  1802. flash_verbose = v;
  1803. }
  1804. /*-----------------------------------------------------------------------
  1805. */
  1806. unsigned long flash_init (void)
  1807. {
  1808. unsigned long size = 0;
  1809. int i;
  1810. #if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST)
  1811. struct apl_s {
  1812. ulong start;
  1813. ulong size;
  1814. } apl[] = CONFIG_SYS_FLASH_AUTOPROTECT_LIST;
  1815. #endif
  1816. #ifdef CONFIG_SYS_FLASH_PROTECTION
  1817. /* read environment from EEPROM */
  1818. char s[64];
  1819. getenv_f("unlock", s, sizeof(s));
  1820. #endif
  1821. /* Init: no FLASHes known */
  1822. for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
  1823. flash_info[i].flash_id = FLASH_UNKNOWN;
  1824. if (!flash_detect_legacy(cfi_flash_bank_addr(i), i))
  1825. flash_get_size(cfi_flash_bank_addr(i), i);
  1826. size += flash_info[i].size;
  1827. if (flash_info[i].flash_id == FLASH_UNKNOWN) {
  1828. #ifndef CONFIG_SYS_FLASH_QUIET_TEST
  1829. printf ("## Unknown FLASH on Bank %d "
  1830. "- Size = 0x%08lx = %ld MB\n",
  1831. i+1, flash_info[i].size,
  1832. flash_info[i].size >> 20);
  1833. #endif /* CONFIG_SYS_FLASH_QUIET_TEST */
  1834. }
  1835. #ifdef CONFIG_SYS_FLASH_PROTECTION
  1836. else if ((s != NULL) && (strcmp(s, "yes") == 0)) {
  1837. /*
  1838. * Only the U-Boot image and it's environment
  1839. * is protected, all other sectors are
  1840. * unprotected (unlocked) if flash hardware
  1841. * protection is used (CONFIG_SYS_FLASH_PROTECTION)
  1842. * and the environment variable "unlock" is
  1843. * set to "yes".
  1844. */
  1845. if (flash_info[i].legacy_unlock) {
  1846. int k;
  1847. /*
  1848. * Disable legacy_unlock temporarily,
  1849. * since flash_real_protect would
  1850. * relock all other sectors again
  1851. * otherwise.
  1852. */
  1853. flash_info[i].legacy_unlock = 0;
  1854. /*
  1855. * Legacy unlocking (e.g. Intel J3) ->
  1856. * unlock only one sector. This will
  1857. * unlock all sectors.
  1858. */
  1859. flash_real_protect (&flash_info[i], 0, 0);
  1860. flash_info[i].legacy_unlock = 1;
  1861. /*
  1862. * Manually mark other sectors as
  1863. * unlocked (unprotected)
  1864. */
  1865. for (k = 1; k < flash_info[i].sector_count; k++)
  1866. flash_info[i].protect[k] = 0;
  1867. } else {
  1868. /*
  1869. * No legancy unlocking -> unlock all sectors
  1870. */
  1871. flash_protect (FLAG_PROTECT_CLEAR,
  1872. flash_info[i].start[0],
  1873. flash_info[i].start[0]
  1874. + flash_info[i].size - 1,
  1875. &flash_info[i]);
  1876. }
  1877. }
  1878. #endif /* CONFIG_SYS_FLASH_PROTECTION */
  1879. }
  1880. /* Monitor protection ON by default */
  1881. #if (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE) && \
  1882. (!defined(CONFIG_MONITOR_IS_IN_RAM))
  1883. flash_protect (FLAG_PROTECT_SET,
  1884. CONFIG_SYS_MONITOR_BASE,
  1885. CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1,
  1886. flash_get_info(CONFIG_SYS_MONITOR_BASE));
  1887. #endif
  1888. /* Environment protection ON by default */
  1889. #ifdef CONFIG_ENV_IS_IN_FLASH
  1890. flash_protect (FLAG_PROTECT_SET,
  1891. CONFIG_ENV_ADDR,
  1892. CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1,
  1893. flash_get_info(CONFIG_ENV_ADDR));
  1894. #endif
  1895. /* Redundant environment protection ON by default */
  1896. #ifdef CONFIG_ENV_ADDR_REDUND
  1897. flash_protect (FLAG_PROTECT_SET,
  1898. CONFIG_ENV_ADDR_REDUND,
  1899. CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1,
  1900. flash_get_info(CONFIG_ENV_ADDR_REDUND));
  1901. #endif
  1902. #if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST)
  1903. for (i = 0; i < (sizeof(apl) / sizeof(struct apl_s)); i++) {
  1904. debug("autoprotecting from %08x to %08x\n",
  1905. apl[i].start, apl[i].start + apl[i].size - 1);
  1906. flash_protect (FLAG_PROTECT_SET,
  1907. apl[i].start,
  1908. apl[i].start + apl[i].size - 1,
  1909. flash_get_info(apl[i].start));
  1910. }
  1911. #endif
  1912. #ifdef CONFIG_FLASH_CFI_MTD
  1913. cfi_mtd_init();
  1914. #endif
  1915. return (size);
  1916. }