shannon.c 2.5 KB

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  1. /*
  2. * (C) Copyright 2002
  3. * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
  4. * Alex Zuepke <azu@sysgo.de>
  5. *
  6. * See file CREDITS for list of people who contributed to this
  7. * project.
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License as
  11. * published by the Free Software Foundation; either version 2 of
  12. * the License, or (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  22. * MA 02111-1307 USA
  23. */
  24. #include <common.h>
  25. DECLARE_GLOBAL_DATA_PTR;
  26. /*
  27. * Miscelaneous platform dependent initialisations
  28. */
  29. int board_init (void)
  30. {
  31. /* memory and cpu-speed are setup before relocation */
  32. /* but if we use InfernoLoader, we must do some inits here */
  33. #ifdef CONFIG_INFERNO
  34. {
  35. unsigned long temp;
  36. __asm__ __volatile__(/* disable MMU, enable icache */
  37. "mrc p15, 0, %0, c1, c0\n"
  38. "bic %0, %0, #0x00002000\n"
  39. "bic %0, %0, #0x0000000f\n"
  40. "orr %0, %0, #0x00001000\n"
  41. "orr %0, %0, #0x00000002\n"
  42. "mcr p15, 0, %0, c1, c0\n"
  43. /* flush caches */
  44. "mov %0, #0\n"
  45. "mcr p15, 0, %0, c7, c7, 0\n"
  46. "mcr p15, 0, %0, c8, c7, 0\n"
  47. : "=r" (temp)
  48. :
  49. : "memory");
  50. /* setup PCMCIA timing */
  51. temp = 0xa0000018;
  52. *(unsigned long *)temp = 0x00060006;
  53. }
  54. #endif /* CONFIG_INFERNO */
  55. /* arch number for shannon */
  56. gd->bd->bi_arch_number = MACH_TYPE_SHANNON;
  57. /* adress of boot parameters */
  58. gd->bd->bi_boot_params = 0xc0000100;
  59. return 0;
  60. }
  61. int dram_init (void)
  62. {
  63. #if defined(PHYS_SDRAM_1) || defined(PHYS_SDRAM_2) || \
  64. defined(PHYS_SDRAM_3) || defined(PHYS_SDRAM_4)
  65. bd_t *bd = gd->bd;
  66. #endif
  67. #ifdef PHYS_SDRAM_1
  68. bd->bi_dram[0].start = PHYS_SDRAM_1;
  69. bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
  70. #endif
  71. #ifdef PHYS_SDRAM_2
  72. bd->bi_dram[1].start = PHYS_SDRAM_2;
  73. bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
  74. #endif
  75. #ifdef PHYS_SDRAM_3
  76. bd->bi_dram[2].start = PHYS_SDRAM_3;
  77. bd->bi_dram[2].size = PHYS_SDRAM_3_SIZE;
  78. #endif
  79. #ifdef PHYS_SDRAM_4
  80. bd->bi_dram[3].start = PHYS_SDRAM_4;
  81. bd->bi_dram[3].size = PHYS_SDRAM_4_SIZE;
  82. #endif
  83. return (0);
  84. }