imx27lite.c 2.5 KB

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  1. /*
  2. * Copyright (C) 2007 Sascha Hauer, Pengutronix
  3. * Copyright (C) 2008,2009 Eric Jarrige <jorasse@users.sourceforge.net>
  4. * Copyright (C) 2009 Ilya Yanok <yanok@emcraft.com>
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public License as
  8. * published by the Free Software Foundation; either version 2 of
  9. * the License, or (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  19. * MA 02111-1307 USA
  20. *
  21. */
  22. #include <common.h>
  23. #include <asm/io.h>
  24. #include <asm/arch/imx-regs.h>
  25. DECLARE_GLOBAL_DATA_PTR;
  26. int board_init (void)
  27. {
  28. struct gpio_regs *regs = (struct gpio_regs *)IMX_GPIO_BASE;
  29. #if defined(CONFIG_SYS_NAND_LARGEPAGE)
  30. struct system_control_regs *sc_regs =
  31. (struct system_control_regs *)IMX_SYSTEM_CTL_BASE;
  32. #endif
  33. gd->bd->bi_arch_number = MACH_TYPE_IMX27LITE;
  34. gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
  35. #ifdef CONFIG_MXC_UART
  36. mx27_uart_init_pins();
  37. #endif
  38. #ifdef CONFIG_FEC_MXC
  39. mx27_fec_init_pins();
  40. imx_gpio_mode((GPIO_PORTC | GPIO_OUT | GPIO_PUEN | GPIO_GPIO | 31));
  41. writel(readl(&regs->port[PORTC].dr) | (1 << 31),
  42. &regs->port[PORTC].dr);
  43. #endif
  44. #ifdef CONFIG_MXC_MMC
  45. #if defined(CONFIG_MAGNESIUM)
  46. mx27_sd1_init_pins();
  47. #else
  48. mx27_sd2_init_pins();
  49. #endif
  50. #endif
  51. #if defined(CONFIG_SYS_NAND_LARGEPAGE)
  52. /*
  53. * set in FMCR NF_FMS Bit(5) to 1
  54. * (NAND Flash with 2 Kbyte page size)
  55. */
  56. writel(readl(&sc_regs->fmcr) | (1 << 5), &sc_regs->fmcr);
  57. #endif
  58. return 0;
  59. }
  60. int dram_init (void)
  61. {
  62. /* dram_init must store complete ramsize in gd->ram_size */
  63. gd->ram_size = get_ram_size((volatile void *)CONFIG_SYS_SDRAM_BASE,
  64. PHYS_SDRAM_1_SIZE);
  65. return 0;
  66. }
  67. void dram_init_banksize(void)
  68. {
  69. gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
  70. gd->bd->bi_dram[0].size = get_ram_size((volatile void *)CONFIG_SYS_SDRAM_BASE,
  71. PHYS_SDRAM_1_SIZE);
  72. #if CONFIG_NR_DRAM_BANKS > 1
  73. gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
  74. gd->bd->bi_dram[1].size = get_ram_size((volatile void *)PHYS_SDRAM_2,
  75. PHYS_SDRAM_2_SIZE);
  76. #endif
  77. }
  78. int checkboard(void)
  79. {
  80. puts ("Board: ");
  81. puts(CONFIG_BOARDNAME);
  82. return 0;
  83. }