edb93xx.c 2.6 KB

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  1. /*
  2. * Copyright (C) 2009 Matthias Kaehlcke <matthias@kaehlcke.net>
  3. *
  4. * (C) Copyright 2002 2003
  5. * Network Audio Technologies, Inc. <www.netaudiotech.com>
  6. * Adam Bezanson <bezanson@netaudiotech.com>
  7. *
  8. * See file CREDITS for list of people who contributed to this
  9. * project.
  10. *
  11. * This program is free software; you can redistribute it and/or
  12. * modify it under the terms of the GNU General Public License as
  13. * published by the Free Software Foundation; either version 2 of
  14. * the License, or (at your option) any later version.
  15. *
  16. * This program is distributed in the hope that it will be useful,
  17. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  19. * GNU General Public License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with this program; if not, write to the Free Software
  23. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  24. * MA 02111-1307 USA
  25. */
  26. #include <common.h>
  27. #include <netdev.h>
  28. #include <asm/arch/ep93xx.h>
  29. #include <asm/io.h>
  30. DECLARE_GLOBAL_DATA_PTR;
  31. #define MAX_BANK_SIZE 0x04000000 /* 64 MB */
  32. static ulong const bank_addr[CONFIG_NR_DRAM_BANKS] = {
  33. PHYS_SDRAM_1,
  34. #ifdef PHYS_SDRAM_2
  35. PHYS_SDRAM_2,
  36. #endif
  37. #ifdef PHYS_SDRAM_3
  38. PHYS_SDRAM_3,
  39. #endif
  40. #ifdef PHYS_SDRAM_4
  41. PHYS_SDRAM_4
  42. #endif
  43. };
  44. int board_init(void)
  45. {
  46. struct syscon_regs *syscon = (struct syscon_regs *)SYSCON_BASE;
  47. icache_enable();
  48. #ifdef USE_920T_MMU
  49. dcache_enable();
  50. #endif
  51. /*
  52. * set UARTBAUD bit to drive UARTs with 14.7456MHz instead of
  53. * 14.7456/2 MHz
  54. */
  55. uint32_t value = readl(&syscon->pwrcnt);
  56. value |= SYSCON_PWRCNT_UART_BAUD;
  57. writel(value, &syscon->pwrcnt);
  58. /* Enable the uart in devicecfg */
  59. value = readl(&syscon->devicecfg);
  60. value |= 1<<18 /* U1EN */;
  61. writel(0xAA, &syscon->sysswlock);
  62. writel(value, &syscon->devicecfg);
  63. /* Machine number, as defined in linux/arch/arm/tools/mach-types */
  64. gd->bd->bi_arch_number = CONFIG_MACH_TYPE;
  65. /* adress of boot parameters */
  66. gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR;
  67. /* We have a console */
  68. gd->have_console = 1;
  69. return 0;
  70. }
  71. int board_eth_init(bd_t *bd)
  72. {
  73. return ep93xx_eth_initialize(0, MAC_BASE);
  74. }
  75. int dram_init(void)
  76. {
  77. unsigned int *src, *dst;
  78. int i;
  79. for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
  80. const ulong bank_size = get_ram_size((long *)bank_addr[i],
  81. MAX_BANK_SIZE);
  82. if (bank_size) {
  83. gd->bd->bi_dram[i].start = bank_addr[i];
  84. gd->bd->bi_dram[i].size = bank_size;
  85. }
  86. }
  87. /* copy exception vectors */
  88. src = (unsigned int *)_armboot_start;
  89. dst = (unsigned int *)PHYS_SDRAM_1;
  90. memcpy(dst, src, 16 * sizeof(unsigned int));
  91. return 0;
  92. }