da830evm.c 6.1 KB

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  1. /*
  2. * Copyright (C) 2009 Nick Thompson, GE Fanuc, Ltd. <nick.thompson@gefanuc.com>
  3. *
  4. * Base on code from TI. Original Notices follow:
  5. *
  6. * (C) Copyright 2008, Texas Instruments, Inc. http://www.ti.com/
  7. *
  8. * Modified for DA8xx EVM.
  9. *
  10. * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
  11. *
  12. * Parts are shamelessly stolen from various TI sources, original copyright
  13. * follows:
  14. * -----------------------------------------------------------------
  15. *
  16. * Copyright (C) 2004 Texas Instruments.
  17. *
  18. * ----------------------------------------------------------------------------
  19. * This program is free software; you can redistribute it and/or modify
  20. * it under the terms of the GNU General Public License as published by
  21. * the Free Software Foundation; either version 2 of the License, or
  22. * (at your option) any later version.
  23. *
  24. * This program is distributed in the hope that it will be useful,
  25. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  26. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  27. * GNU General Public License for more details.
  28. *
  29. * You should have received a copy of the GNU General Public License
  30. * along with this program; if not, write to the Free Software
  31. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  32. * ----------------------------------------------------------------------------
  33. */
  34. #include <common.h>
  35. #include <i2c.h>
  36. #include <net.h>
  37. #include <netdev.h>
  38. #include <asm/arch/hardware.h>
  39. #include <asm/arch/emif_defs.h>
  40. #include <asm/arch/emac_defs.h>
  41. #include <asm/io.h>
  42. #include "../common/misc.h"
  43. #include "common.h"
  44. DECLARE_GLOBAL_DATA_PTR;
  45. #define pinmux(x) (&davinci_syscfg_regs->pinmux[x])
  46. /* SPI0 pin muxer settings */
  47. static const struct pinmux_config spi0_pins[] = {
  48. { pinmux(7), 1, 3 },
  49. { pinmux(7), 1, 4 },
  50. { pinmux(7), 1, 5 },
  51. { pinmux(7), 1, 6 },
  52. { pinmux(7), 1, 7 }
  53. };
  54. /* EMIF-A bus pins for 8-bit NAND support on CS3 */
  55. static const struct pinmux_config emifa_nand_pins[] = {
  56. { pinmux(13), 1, 6 },
  57. { pinmux(13), 1, 7 },
  58. { pinmux(14), 1, 0 },
  59. { pinmux(14), 1, 1 },
  60. { pinmux(14), 1, 2 },
  61. { pinmux(14), 1, 3 },
  62. { pinmux(14), 1, 4 },
  63. { pinmux(14), 1, 5 },
  64. { pinmux(15), 1, 7 },
  65. { pinmux(16), 1, 0 },
  66. { pinmux(18), 1, 1 },
  67. { pinmux(18), 1, 4 },
  68. { pinmux(18), 1, 5 },
  69. };
  70. /* EMAC PHY interface pins */
  71. static const struct pinmux_config emac_pins[] = {
  72. { pinmux(9), 0, 5 },
  73. { pinmux(10), 2, 1 },
  74. { pinmux(10), 2, 2 },
  75. { pinmux(10), 2, 3 },
  76. { pinmux(10), 2, 4 },
  77. { pinmux(10), 2, 5 },
  78. { pinmux(10), 2, 6 },
  79. { pinmux(10), 2, 7 },
  80. { pinmux(11), 2, 0 },
  81. { pinmux(11), 2, 1 },
  82. };
  83. /* UART pin muxer settings */
  84. static const struct pinmux_config uart_pins[] = {
  85. { pinmux(8), 2, 7 },
  86. { pinmux(9), 2, 0 }
  87. };
  88. /* I2C pin muxer settings */
  89. static const struct pinmux_config i2c_pins[] = {
  90. { pinmux(8), 2, 3 },
  91. { pinmux(8), 2, 4 }
  92. };
  93. /* USB0_DRVVBUS pin muxer settings */
  94. static const struct pinmux_config usb_pins[] = {
  95. { pinmux(9), 1, 1 }
  96. };
  97. static const struct pinmux_resource pinmuxes[] = {
  98. #ifdef CONFIG_SPI_FLASH
  99. PINMUX_ITEM(spi0_pins),
  100. #endif
  101. PINMUX_ITEM(uart_pins),
  102. PINMUX_ITEM(i2c_pins),
  103. #ifdef CONFIG_USB_DA8XX
  104. PINMUX_ITEM(usb_pins),
  105. #endif
  106. #ifdef CONFIG_USE_NAND
  107. PINMUX_ITEM(emifa_nand_pins),
  108. #endif
  109. #if defined(CONFIG_DRIVER_TI_EMAC)
  110. PINMUX_ITEM(emac_pins),
  111. #endif
  112. };
  113. static const struct lpsc_resource lpsc[] = {
  114. { DAVINCI_LPSC_AEMIF }, /* NAND, NOR */
  115. { DAVINCI_LPSC_SPI0 }, /* Serial Flash */
  116. { DAVINCI_LPSC_EMAC }, /* image download */
  117. { DAVINCI_LPSC_UART2 }, /* console */
  118. { DAVINCI_LPSC_GPIO },
  119. };
  120. int board_init(void)
  121. {
  122. #ifndef CONFIG_USE_IRQ
  123. irq_init();
  124. #endif
  125. #ifdef CONFIG_NAND_DAVINCI
  126. /* EMIFA 100MHz clock select */
  127. writel(readl(&davinci_syscfg_regs->cfgchip3) & ~2,
  128. &davinci_syscfg_regs->cfgchip3);
  129. /* NAND CS setup */
  130. writel((DAVINCI_ABCR_WSETUP(0) |
  131. DAVINCI_ABCR_WSTROBE(2) |
  132. DAVINCI_ABCR_WHOLD(0) |
  133. DAVINCI_ABCR_RSETUP(0) |
  134. DAVINCI_ABCR_RSTROBE(2) |
  135. DAVINCI_ABCR_RHOLD(0) |
  136. DAVINCI_ABCR_TA(2) |
  137. DAVINCI_ABCR_ASIZE_8BIT),
  138. &davinci_emif_regs->ab2cr);
  139. #endif
  140. /* arch number of the board */
  141. gd->bd->bi_arch_number = MACH_TYPE_DAVINCI_DA830_EVM;
  142. /* address of boot parameters */
  143. gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR;
  144. /*
  145. * Power on required peripherals
  146. * ARM does not have access by default to PSC0 and PSC1
  147. * assuming here that the DSP bootloader has set the IOPU
  148. * such that PSC access is available to ARM
  149. */
  150. if (da8xx_configure_lpsc_items(lpsc, ARRAY_SIZE(lpsc)))
  151. return 1;
  152. /* setup the SUSPSRC for ARM to control emulation suspend */
  153. writel(readl(&davinci_syscfg_regs->suspsrc) &
  154. ~(DAVINCI_SYSCFG_SUSPSRC_EMAC | DAVINCI_SYSCFG_SUSPSRC_I2C |
  155. DAVINCI_SYSCFG_SUSPSRC_SPI0 | DAVINCI_SYSCFG_SUSPSRC_TIMER0 |
  156. DAVINCI_SYSCFG_SUSPSRC_UART2),
  157. &davinci_syscfg_regs->suspsrc);
  158. /* configure pinmux settings */
  159. if (davinci_configure_pin_mux_items(pinmuxes, ARRAY_SIZE(pinmuxes)))
  160. return 1;
  161. /* enable the console UART */
  162. writel((DAVINCI_UART_PWREMU_MGMT_FREE | DAVINCI_UART_PWREMU_MGMT_URRST |
  163. DAVINCI_UART_PWREMU_MGMT_UTRST),
  164. &davinci_uart2_ctrl_regs->pwremu_mgmt);
  165. return(0);
  166. }
  167. #if defined(CONFIG_DRIVER_TI_EMAC)
  168. #define PHY_SW_I2C_ADDR 0x5f /* Address of PHY on i2c bus */
  169. /*
  170. * Initializes on-board ethernet controllers.
  171. */
  172. int board_eth_init(bd_t *bis)
  173. {
  174. u_int8_t mac_addr[6];
  175. u_int8_t switch_start_cmd[2] = { 0x01, 0x23 };
  176. struct eth_device *dev;
  177. /* Read Ethernet MAC address from EEPROM */
  178. if (dvevm_read_mac_address(mac_addr))
  179. /* set address env if not already set */
  180. davinci_sync_env_enetaddr(mac_addr);
  181. /* read the address back from env */
  182. if (!eth_getenv_enetaddr("ethaddr", mac_addr))
  183. return -1;
  184. /* enable the Ethernet switch in the 3 port PHY */
  185. if (i2c_write(PHY_SW_I2C_ADDR, 0, 0,
  186. switch_start_cmd, sizeof(switch_start_cmd))) {
  187. printf("Ethernet switch start failed!\n");
  188. return -1;
  189. }
  190. /* finally, initialise the driver */
  191. if (!davinci_emac_initialize()) {
  192. printf("Error: Ethernet init failed!\n");
  193. return -1;
  194. }
  195. dev = eth_get_dev();
  196. /* provide the resulting addr to the driver */
  197. memcpy(dev->enetaddr, mac_addr, 6);
  198. dev->write_hwaddr(dev);
  199. return 0;
  200. }
  201. #endif /* CONFIG_DRIVER_TI_EMAC */