atstk1000.c 3.5 KB

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  1. /*
  2. * Copyright (C) 2005-2006 Atmel Corporation
  3. *
  4. * See file CREDITS for list of people who contributed to this
  5. * project.
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License as
  9. * published by the Free Software Foundation; either version 2 of
  10. * the License, or (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  20. * MA 02111-1307 USA
  21. */
  22. #include <common.h>
  23. #include <asm/io.h>
  24. #include <asm/sdram.h>
  25. #include <asm/arch/clk.h>
  26. #include <asm/arch/hmatrix.h>
  27. #include <asm/arch/mmu.h>
  28. #include <asm/arch/portmux.h>
  29. #include <netdev.h>
  30. DECLARE_GLOBAL_DATA_PTR;
  31. struct mmu_vm_range mmu_vmr_table[CONFIG_SYS_NR_VM_REGIONS] = {
  32. {
  33. .virt_pgno = CONFIG_SYS_FLASH_BASE >> PAGE_SHIFT,
  34. .nr_pages = CONFIG_SYS_FLASH_SIZE >> PAGE_SHIFT,
  35. .phys = (CONFIG_SYS_FLASH_BASE >> PAGE_SHIFT)
  36. | MMU_VMR_CACHE_NONE,
  37. }, {
  38. .virt_pgno = CONFIG_SYS_SDRAM_BASE >> PAGE_SHIFT,
  39. .nr_pages = EBI_SDRAM_SIZE >> PAGE_SHIFT,
  40. .phys = (CONFIG_SYS_SDRAM_BASE >> PAGE_SHIFT)
  41. | MMU_VMR_CACHE_WRBACK,
  42. },
  43. };
  44. static const struct sdram_config sdram_config = {
  45. #if defined(CONFIG_ATSTK1006)
  46. /* Dual MT48LC16M16A2-7E (64 MB) on daughterboard */
  47. .data_bits = SDRAM_DATA_32BIT,
  48. .row_bits = 13,
  49. .col_bits = 9,
  50. .bank_bits = 2,
  51. .cas = 2,
  52. .twr = 2,
  53. .trc = 7,
  54. .trp = 2,
  55. .trcd = 2,
  56. .tras = 4,
  57. .txsr = 7,
  58. /* 7.81 us */
  59. .refresh_period = (781 * (SDRAMC_BUS_HZ / 1000)) / 100000,
  60. #else
  61. /* MT48LC2M32B2P-5 (8 MB) on motherboard */
  62. #ifdef CONFIG_ATSTK1004
  63. .data_bits = SDRAM_DATA_16BIT,
  64. #else
  65. .data_bits = SDRAM_DATA_32BIT,
  66. #endif
  67. #ifdef CONFIG_ATSTK1000_16MB_SDRAM
  68. /* MT48LC4M32B2P-6 (16 MB) on mod'ed motherboard */
  69. .row_bits = 12,
  70. #else
  71. .row_bits = 11,
  72. #endif
  73. .col_bits = 8,
  74. .bank_bits = 2,
  75. .cas = 3,
  76. .twr = 2,
  77. .trc = 7,
  78. .trp = 2,
  79. .trcd = 2,
  80. .tras = 5,
  81. .txsr = 5,
  82. /* 15.6 us */
  83. .refresh_period = (156 * (SDRAMC_BUS_HZ / 1000)) / 10000,
  84. #endif
  85. };
  86. int board_early_init_f(void)
  87. {
  88. /* Enable SDRAM in the EBI mux */
  89. hmatrix_slave_write(EBI, SFR, HMATRIX_BIT(EBI_SDRAM_ENABLE));
  90. portmux_enable_ebi(sdram_config.data_bits, 23, 0, PORTMUX_DRIVE_HIGH);
  91. portmux_enable_usart1(PORTMUX_DRIVE_MIN);
  92. #if defined(CONFIG_MACB)
  93. portmux_enable_macb0(PORTMUX_MACB_MII, PORTMUX_DRIVE_LOW);
  94. portmux_enable_macb1(PORTMUX_MACB_MII, PORTMUX_DRIVE_LOW);
  95. #endif
  96. #if defined(CONFIG_MMC)
  97. portmux_enable_mmci(0, PORTMUX_MMCI_4BIT, PORTMUX_DRIVE_LOW);
  98. #endif
  99. return 0;
  100. }
  101. phys_size_t initdram(int board_type)
  102. {
  103. unsigned long expected_size;
  104. unsigned long actual_size;
  105. void *sdram_base;
  106. sdram_base = uncached(EBI_SDRAM_BASE);
  107. expected_size = sdram_init(sdram_base, &sdram_config);
  108. actual_size = get_ram_size(sdram_base, expected_size);
  109. if (expected_size != actual_size)
  110. printf("Warning: Only %lu of %lu MiB SDRAM is working\n",
  111. actual_size >> 20, expected_size >> 20);
  112. return actual_size;
  113. }
  114. int board_early_init_r(void)
  115. {
  116. gd->bd->bi_phy_id[0] = 0x10;
  117. gd->bd->bi_phy_id[1] = 0x11;
  118. return 0;
  119. }
  120. #ifdef CONFIG_CMD_NET
  121. int board_eth_init(bd_t *bi)
  122. {
  123. macb_eth_initialize(0, (void *)MACB0_BASE, bi->bi_phy_id[0]);
  124. macb_eth_initialize(1, (void *)MACB1_BASE, bi->bi_phy_id[1]);
  125. return 0;
  126. }
  127. #endif