atngw100.c 3.5 KB

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  1. /*
  2. * Copyright (C) 2006 Atmel Corporation
  3. *
  4. * See file CREDITS for list of people who contributed to this
  5. * project.
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License as
  9. * published by the Free Software Foundation; either version 2 of
  10. * the License, or (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  20. * MA 02111-1307 USA
  21. */
  22. #include <common.h>
  23. #include <asm/io.h>
  24. #include <asm/sdram.h>
  25. #include <asm/arch/clk.h>
  26. #include <asm/arch/gpio.h>
  27. #include <asm/arch/hmatrix.h>
  28. #include <asm/arch/mmu.h>
  29. #include <asm/arch/portmux.h>
  30. #include <netdev.h>
  31. DECLARE_GLOBAL_DATA_PTR;
  32. struct mmu_vm_range mmu_vmr_table[CONFIG_SYS_NR_VM_REGIONS] = {
  33. {
  34. .virt_pgno = CONFIG_SYS_FLASH_BASE >> PAGE_SHIFT,
  35. .nr_pages = CONFIG_SYS_FLASH_SIZE >> PAGE_SHIFT,
  36. .phys = (CONFIG_SYS_FLASH_BASE >> PAGE_SHIFT)
  37. | MMU_VMR_CACHE_NONE,
  38. }, {
  39. .virt_pgno = CONFIG_SYS_SDRAM_BASE >> PAGE_SHIFT,
  40. .nr_pages = EBI_SDRAM_SIZE >> PAGE_SHIFT,
  41. .phys = (CONFIG_SYS_SDRAM_BASE >> PAGE_SHIFT)
  42. | MMU_VMR_CACHE_WRBACK,
  43. },
  44. };
  45. static const struct sdram_config sdram_config = {
  46. .data_bits = SDRAM_DATA_16BIT,
  47. .row_bits = 13,
  48. .col_bits = 9,
  49. .bank_bits = 2,
  50. .cas = 3,
  51. .twr = 2,
  52. .trc = 7,
  53. .trp = 2,
  54. .trcd = 2,
  55. .tras = 5,
  56. .txsr = 5,
  57. /* 7.81 us */
  58. .refresh_period = (781 * (SDRAMC_BUS_HZ / 1000)) / 100000,
  59. };
  60. int board_early_init_f(void)
  61. {
  62. /* Enable SDRAM in the EBI mux */
  63. hmatrix_slave_write(EBI, SFR, HMATRIX_BIT(EBI_SDRAM_ENABLE));
  64. portmux_enable_ebi(16, 23, 0, PORTMUX_DRIVE_HIGH);
  65. portmux_enable_usart1(PORTMUX_DRIVE_MIN);
  66. #if defined(CONFIG_MACB)
  67. portmux_enable_macb0(PORTMUX_MACB_MII, PORTMUX_DRIVE_HIGH);
  68. portmux_enable_macb1(PORTMUX_MACB_MII, PORTMUX_DRIVE_HIGH);
  69. #endif
  70. #if defined(CONFIG_MMC)
  71. portmux_enable_mmci(0, PORTMUX_MMCI_4BIT, PORTMUX_DRIVE_LOW);
  72. #endif
  73. #if defined(CONFIG_ATMEL_SPI)
  74. portmux_enable_spi0(1 << 0, PORTMUX_DRIVE_LOW);
  75. #endif
  76. return 0;
  77. }
  78. phys_size_t initdram(int board_type)
  79. {
  80. unsigned long expected_size;
  81. unsigned long actual_size;
  82. void *sdram_base;
  83. sdram_base = uncached(EBI_SDRAM_BASE);
  84. expected_size = sdram_init(sdram_base, &sdram_config);
  85. actual_size = get_ram_size(sdram_base, expected_size);
  86. if (expected_size != actual_size)
  87. printf("Warning: Only %lu of %lu MiB SDRAM is working\n",
  88. actual_size >> 20, expected_size >> 20);
  89. return actual_size;
  90. }
  91. int board_early_init_r(void)
  92. {
  93. gd->bd->bi_phy_id[0] = 0x01;
  94. gd->bd->bi_phy_id[1] = 0x03;
  95. return 0;
  96. }
  97. #ifdef CONFIG_CMD_NET
  98. int board_eth_init(bd_t *bi)
  99. {
  100. macb_eth_initialize(0, (void *)MACB0_BASE, bi->bi_phy_id[0]);
  101. macb_eth_initialize(1, (void *)MACB1_BASE, bi->bi_phy_id[1]);
  102. return 0;
  103. }
  104. #endif
  105. /* SPI chip select control */
  106. #ifdef CONFIG_ATMEL_SPI
  107. #include <spi.h>
  108. #define ATNGW100_DATAFLASH_CS_PIN GPIO_PIN_PA(3)
  109. int spi_cs_is_valid(unsigned int bus, unsigned int cs)
  110. {
  111. return bus == 0 && cs == 0;
  112. }
  113. void spi_cs_activate(struct spi_slave *slave)
  114. {
  115. gpio_set_value(ATNGW100_DATAFLASH_CS_PIN, 0);
  116. }
  117. void spi_cs_deactivate(struct spi_slave *slave)
  118. {
  119. gpio_set_value(ATNGW100_DATAFLASH_CS_PIN, 1);
  120. }
  121. #endif /* CONFIG_ATMEL_SPI */