at91rm9200dk.c 4.5 KB

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  1. /*
  2. * (C) Copyright 2002
  3. * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
  4. * Marius Groeger <mgroeger@sysgo.de>
  5. *
  6. * See file CREDITS for list of people who contributed to this
  7. * project.
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License as
  11. * published by the Free Software Foundation; either version 2 of
  12. * the License, or (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  22. * MA 02111-1307 USA
  23. */
  24. #include <common.h>
  25. #include <exports.h>
  26. #include <netdev.h>
  27. #include <asm/arch/AT91RM9200.h>
  28. #include <asm/io.h>
  29. #if defined(CONFIG_DRIVER_ETHER)
  30. #include <at91rm9200_net.h>
  31. #include <dm9161.h>
  32. #endif
  33. DECLARE_GLOBAL_DATA_PTR;
  34. /* ------------------------------------------------------------------------- */
  35. /*
  36. * Miscelaneous platform dependent initialisations
  37. */
  38. int board_init (void)
  39. {
  40. /* Enable Ctrlc */
  41. console_init_f ();
  42. /* Correct IRDA resistor problem */
  43. /* Set PA23_TXD in Output */
  44. ((AT91PS_PIO) AT91C_BASE_PIOA)->PIO_OER = AT91C_PA23_TXD2;
  45. /* memory and cpu-speed are setup before relocation */
  46. /* so we do _nothing_ here */
  47. /* arch number of AT91RM9200DK-Board */
  48. gd->bd->bi_arch_number = MACH_TYPE_AT91RM9200DK;
  49. /* adress of boot parameters */
  50. gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
  51. return 0;
  52. }
  53. void board_reset (void)
  54. {
  55. AT91PS_PIO pio = AT91C_BASE_PIOA;
  56. /* Clear PA19 to trigger the hard reset */
  57. writel(0x00080000, pio->PIO_CODR);
  58. writel(0x00080000, pio->PIO_OER);
  59. writel(0x00080000, pio->PIO_PER);
  60. }
  61. int dram_init (void)
  62. {
  63. gd->bd->bi_dram[0].start = PHYS_SDRAM;
  64. gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE;
  65. return 0;
  66. }
  67. #ifdef CONFIG_DRIVER_ETHER
  68. #if defined(CONFIG_CMD_NET)
  69. /*
  70. * Name:
  71. * at91rm9200_GetPhyInterface
  72. * Description:
  73. * Initialise the interface functions to the PHY
  74. * Arguments:
  75. * None
  76. * Return value:
  77. * None
  78. */
  79. void at91rm9200_GetPhyInterface(AT91PS_PhyOps p_phyops)
  80. {
  81. p_phyops->Init = dm9161_InitPhy;
  82. p_phyops->IsPhyConnected = dm9161_IsPhyConnected;
  83. p_phyops->GetLinkSpeed = dm9161_GetLinkSpeed;
  84. p_phyops->AutoNegotiate = dm9161_AutoNegotiate;
  85. }
  86. #endif
  87. #endif /* CONFIG_DRIVER_ETHER */
  88. #ifdef CONFIG_DRIVER_AT91EMAC
  89. int board_eth_init(bd_t *bis)
  90. {
  91. int rc = 0;
  92. rc = at91emac_register(bis, 0);
  93. return rc;
  94. }
  95. #endif
  96. /*
  97. * Disk On Chip (NAND) Millenium initialization.
  98. * The NAND lives in the CS2* space
  99. */
  100. #if defined(CONFIG_CMD_NAND)
  101. extern ulong nand_probe (ulong physadr);
  102. #define AT91_SMARTMEDIA_BASE 0x40000000 /* physical address to access memory on NCS3 */
  103. void nand_init (void)
  104. {
  105. /* Setup Smart Media, fitst enable the address range of CS3 */
  106. *AT91C_EBI_CSA |= AT91C_EBI_CS3A_SMC_SmartMedia;
  107. /* set the bus interface characteristics based on
  108. tDS Data Set up Time 30 - ns
  109. tDH Data Hold Time 20 - ns
  110. tALS ALE Set up Time 20 - ns
  111. 16ns at 60 MHz ~= 3 */
  112. /*memory mapping structures */
  113. #define SM_ID_RWH (5 << 28)
  114. #define SM_RWH (1 << 28)
  115. #define SM_RWS (0 << 24)
  116. #define SM_TDF (1 << 8)
  117. #define SM_NWS (3)
  118. AT91C_BASE_SMC2->SMC2_CSR[3] = (SM_RWH | SM_RWS |
  119. AT91C_SMC2_ACSS_STANDARD | AT91C_SMC2_DBW_8 |
  120. SM_TDF | AT91C_SMC2_WSEN | SM_NWS);
  121. /* enable the SMOE line PC0=SMCE, A21=CLE, A22=ALE */
  122. *AT91C_PIOC_ASR = AT91C_PC0_BFCK | AT91C_PC1_BFRDY_SMOE |
  123. AT91C_PC3_BFBAA_SMWE;
  124. *AT91C_PIOC_PDR = AT91C_PC0_BFCK | AT91C_PC1_BFRDY_SMOE |
  125. AT91C_PC3_BFBAA_SMWE;
  126. /* Configure PC2 as input (signal READY of the SmartMedia) */
  127. *AT91C_PIOC_PER = AT91C_PC2_BFAVD; /* enable direct output enable */
  128. *AT91C_PIOC_ODR = AT91C_PC2_BFAVD; /* disable output */
  129. /* Configure PB1 as input (signal Card Detect of the SmartMedia) */
  130. *AT91C_PIOB_PER = AT91C_PIO_PB1; /* enable direct output enable */
  131. *AT91C_PIOB_ODR = AT91C_PIO_PB1; /* disable output */
  132. /* PIOB and PIOC clock enabling */
  133. *AT91C_PMC_PCER = 1 << AT91C_ID_PIOB;
  134. *AT91C_PMC_PCER = 1 << AT91C_ID_PIOC;
  135. if (*AT91C_PIOB_PDSR & AT91C_PIO_PB1)
  136. printf (" No SmartMedia card inserted\n");
  137. #ifdef DEBUG
  138. printf (" SmartMedia card inserted\n");
  139. printf ("Probing at 0x%.8x\n", AT91_SMARTMEDIA_BASE);
  140. #endif
  141. printf ("%4lu MB\n", nand_probe(AT91_SMARTMEDIA_BASE) >> 20);
  142. }
  143. #endif