watchdog.c 1.6 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475
  1. /*
  2. * This program is free software; you can redistribute it and/or
  3. * modify it under the terms of the GNU General Public License as
  4. * published by the Free Software Foundation; either version 2 of
  5. * the License, or (at your option) any later version.
  6. *
  7. * This program is distributed in the hope that it will be useful,
  8. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  9. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  10. * GNU General Public License for more details.
  11. *
  12. * You should have received a copy of the GNU General Public License
  13. * along with this program; if not, write to the Free Software
  14. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  15. * MA 02111-1307 USA
  16. */
  17. #include <common.h>
  18. #include <asm/processor.h>
  19. #include <asm/system.h>
  20. #include <asm/io.h>
  21. #define WDT_BASE WTCNT
  22. #define WDT_WD (1 << 6)
  23. #define WDT_RST_P (0)
  24. #define WDT_RST_M (1 << 5)
  25. #define WDT_ENABLE (1 << 7)
  26. #if defined(CONFIG_WATCHDOG)
  27. static unsigned char csr_read(void)
  28. {
  29. return inb(WDT_BASE + 0x04);
  30. }
  31. static void cnt_write(unsigned char value)
  32. {
  33. outl((unsigned short)value | 0x5A00, WDT_BASE + 0x00);
  34. }
  35. static void csr_write(unsigned char value)
  36. {
  37. outl((unsigned short)value | 0xA500, WDT_BASE + 0x04);
  38. }
  39. void watchdog_reset(void)
  40. {
  41. outl(0x55000000, WDT_BASE + 0x08);
  42. }
  43. int watchdog_init(void)
  44. {
  45. /* Set overflow time*/
  46. cnt_write(0);
  47. /* Power on reset */
  48. csr_write(WDT_WD|WDT_RST_P|WDT_ENABLE);
  49. return 0;
  50. }
  51. int watchdog_disable(void)
  52. {
  53. csr_write(csr_read() & ~WDT_ENABLE);
  54. return 0;
  55. }
  56. #endif
  57. void reset_cpu(unsigned long ignored)
  58. {
  59. /* Address error with SR.BL=1 first. */
  60. trigger_address_error();
  61. while (1)
  62. ;
  63. }