ecc.h 2.3 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475
  1. /*
  2. * Copyright (c) 2008 Nuovation System Designs, LLC
  3. * Grant Erickson <gerickson@nuovations.com>
  4. *
  5. * Copyright (c) 2007-2009 DENX Software Engineering, GmbH
  6. * Stefan Roese <sr@denx.de>
  7. *
  8. * See file CREDITS for list of people who contributed to this
  9. * project.
  10. *
  11. * This program is free software; you can redistribute it and/or
  12. * modify it under the terms of the GNU General Public License as
  13. * published by the Free Software Foundation; either version 2 of
  14. * the License, or (at your option) any later version.
  15. *
  16. * This program is distributed in the hope that it will abe useful,
  17. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  19. * GNU General Public License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with this program; if not, write to the Free Software
  23. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  24. * MA 02111-1307 USA
  25. *
  26. * Description:
  27. * This file implements ECC initialization for PowerPC processors
  28. * using the IBM SDRAM DDR1 & DDR2 controller.
  29. *
  30. */
  31. #ifndef _ECC_H_
  32. #define _ECC_H_
  33. /*
  34. * Since the IBM DDR controller used on 440GP/GX/EP/GR is not register
  35. * compatible to the IBM DDR/2 controller used on 405EX/440SP/SPe/460EX/GT
  36. * we need to make some processor dependant defines used later on by the
  37. * driver.
  38. */
  39. /* For 440GP/GX/EP/GR */
  40. #if defined(CONFIG_SDRAM_PPC4xx_IBM_DDR)
  41. #define SDRAM_MCOPT1 SDRAM_CFG0
  42. #define SDRAM_MCOPT1_MCHK_MASK SDRAM_CFG0_MCHK_MASK
  43. #define SDRAM_MCOPT1_MCHK_NON SDRAM_CFG0_MCHK_NON
  44. #define SDRAM_MCOPT1_MCHK_GEN SDRAM_CFG0_MCHK_GEN
  45. #define SDRAM_MCOPT1_MCHK_CHK SDRAM_CFG0_MCHK_CHK
  46. #define SDRAM_MCOPT1_MCHK_CHK_REP SDRAM_CFG0_MCHK_CHK
  47. #define SDRAM_MCOPT1_DMWD_MASK SDRAM_CFG0_DMWD_MASK
  48. #define SDRAM_MCOPT1_DMWD_32 SDRAM_CFG0_DMWD_32
  49. #define SDRAM_MCSTAT SDRAM0_MCSTS
  50. #define SDRAM_MCSTAT_IDLE_MASK SDRAM_MCSTS_CIS
  51. #define SDRAM_MCSTAT_IDLE_NOT SDRAM_MCSTS_IDLE_NOT
  52. #define SDRAM_ECCES SDRAM0_ECCESR
  53. #endif
  54. void ecc_init(unsigned long * const start, unsigned long size);
  55. void do_program_ecc(unsigned long tlb_word2_i_value);
  56. static void inline blank_string(int size)
  57. {
  58. int i;
  59. for (i = 0; i < size; i++)
  60. putc('\b');
  61. for (i = 0; i < size; i++)
  62. putc(' ');
  63. for (i = 0; i < size; i++)
  64. putc('\b');
  65. }
  66. #endif /* _ECC_H_ */