cpu.c 4.4 KB

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  1. /*
  2. * Copyright 2009-2010 Freescale Semiconductor, Inc.
  3. *
  4. * This file is derived from arch/powerpc/cpu/mpc85xx/cpu.c and
  5. * arch/powerpc/cpu/mpc86xx/cpu.c. Basically this file contains
  6. * cpu specific common code for 85xx/86xx processors.
  7. * See file CREDITS for list of people who contributed to this
  8. * project.
  9. *
  10. * This program is free software; you can redistribute it and/or
  11. * modify it under the terms of the GNU General Public License as
  12. * published by the Free Software Foundation; either version 2 of
  13. * the License, or (at your option) any later version.
  14. *
  15. * This program is distributed in the hope that it will be useful,
  16. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. * GNU General Public License for more details.
  19. *
  20. * You should have received a copy of the GNU General Public License
  21. * along with this program; if not, write to the Free Software
  22. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  23. * MA 02111-1307 USA
  24. */
  25. #include <config.h>
  26. #include <common.h>
  27. #include <command.h>
  28. #include <tsec.h>
  29. #include <netdev.h>
  30. #include <asm/cache.h>
  31. #include <asm/io.h>
  32. DECLARE_GLOBAL_DATA_PTR;
  33. struct cpu_type cpu_type_list [] = {
  34. #if defined(CONFIG_MPC85xx)
  35. CPU_TYPE_ENTRY(8533, 8533, 1),
  36. CPU_TYPE_ENTRY(8533, 8533_E, 1),
  37. CPU_TYPE_ENTRY(8535, 8535, 1),
  38. CPU_TYPE_ENTRY(8535, 8535_E, 1),
  39. CPU_TYPE_ENTRY(8536, 8536, 1),
  40. CPU_TYPE_ENTRY(8536, 8536_E, 1),
  41. CPU_TYPE_ENTRY(8540, 8540, 1),
  42. CPU_TYPE_ENTRY(8541, 8541, 1),
  43. CPU_TYPE_ENTRY(8541, 8541_E, 1),
  44. CPU_TYPE_ENTRY(8543, 8543, 1),
  45. CPU_TYPE_ENTRY(8543, 8543_E, 1),
  46. CPU_TYPE_ENTRY(8544, 8544, 1),
  47. CPU_TYPE_ENTRY(8544, 8544_E, 1),
  48. CPU_TYPE_ENTRY(8545, 8545, 1),
  49. CPU_TYPE_ENTRY(8545, 8545_E, 1),
  50. CPU_TYPE_ENTRY(8547, 8547_E, 1),
  51. CPU_TYPE_ENTRY(8548, 8548, 1),
  52. CPU_TYPE_ENTRY(8548, 8548_E, 1),
  53. CPU_TYPE_ENTRY(8555, 8555, 1),
  54. CPU_TYPE_ENTRY(8555, 8555_E, 1),
  55. CPU_TYPE_ENTRY(8560, 8560, 1),
  56. CPU_TYPE_ENTRY(8567, 8567, 1),
  57. CPU_TYPE_ENTRY(8567, 8567_E, 1),
  58. CPU_TYPE_ENTRY(8568, 8568, 1),
  59. CPU_TYPE_ENTRY(8568, 8568_E, 1),
  60. CPU_TYPE_ENTRY(8569, 8569, 1),
  61. CPU_TYPE_ENTRY(8569, 8569_E, 1),
  62. CPU_TYPE_ENTRY(8572, 8572, 2),
  63. CPU_TYPE_ENTRY(8572, 8572_E, 2),
  64. CPU_TYPE_ENTRY(P1011, P1011, 1),
  65. CPU_TYPE_ENTRY(P1011, P1011_E, 1),
  66. CPU_TYPE_ENTRY(P1012, P1012, 1),
  67. CPU_TYPE_ENTRY(P1012, P1012_E, 1),
  68. CPU_TYPE_ENTRY(P1013, P1013, 1),
  69. CPU_TYPE_ENTRY(P1013, P1013_E, 1),
  70. CPU_TYPE_ENTRY(P1020, P1020, 2),
  71. CPU_TYPE_ENTRY(P1020, P1020_E, 2),
  72. CPU_TYPE_ENTRY(P1021, P1021, 2),
  73. CPU_TYPE_ENTRY(P1021, P1021_E, 2),
  74. CPU_TYPE_ENTRY(P1022, P1022, 2),
  75. CPU_TYPE_ENTRY(P1022, P1022_E, 2),
  76. CPU_TYPE_ENTRY(P2010, P2010, 1),
  77. CPU_TYPE_ENTRY(P2010, P2010_E, 1),
  78. CPU_TYPE_ENTRY(P2020, P2020, 2),
  79. CPU_TYPE_ENTRY(P2020, P2020_E, 2),
  80. CPU_TYPE_ENTRY(P3041, P3041, 4),
  81. CPU_TYPE_ENTRY(P3041, P3041_E, 4),
  82. CPU_TYPE_ENTRY(P4040, P4040, 4),
  83. CPU_TYPE_ENTRY(P4040, P4040_E, 4),
  84. CPU_TYPE_ENTRY(P4080, P4080, 8),
  85. CPU_TYPE_ENTRY(P4080, P4080_E, 8),
  86. CPU_TYPE_ENTRY(P5010, P5010, 1),
  87. CPU_TYPE_ENTRY(P5010, P5010_E, 1),
  88. CPU_TYPE_ENTRY(P5020, P5020, 2),
  89. CPU_TYPE_ENTRY(P5020, P5020_E, 2),
  90. #elif defined(CONFIG_MPC86xx)
  91. CPU_TYPE_ENTRY(8610, 8610, 1),
  92. CPU_TYPE_ENTRY(8641, 8641, 2),
  93. CPU_TYPE_ENTRY(8641D, 8641D, 2),
  94. #endif
  95. };
  96. struct cpu_type cpu_type_unknown = CPU_TYPE_ENTRY(Unknown, Unknown, 1);
  97. struct cpu_type *identify_cpu(u32 ver)
  98. {
  99. int i;
  100. for (i = 0; i < ARRAY_SIZE(cpu_type_list); i++) {
  101. if (cpu_type_list[i].soc_ver == ver)
  102. return &cpu_type_list[i];
  103. }
  104. return &cpu_type_unknown;
  105. }
  106. int cpu_numcores() {
  107. ccsr_pic_t __iomem *pic = (void *)CONFIG_SYS_MPC8xxx_PIC_ADDR;
  108. struct cpu_type *cpu = gd->cpu;
  109. /* better to query feature reporting register than just assume 1 */
  110. #define MPC8xxx_PICFRR_NCPU_MASK 0x00001f00
  111. #define MPC8xxx_PICFRR_NCPU_SHIFT 8
  112. if (cpu == &cpu_type_unknown)
  113. return ((in_be32(&pic->frr) & MPC8xxx_PICFRR_NCPU_MASK) >>
  114. MPC8xxx_PICFRR_NCPU_SHIFT) + 1;
  115. return cpu->num_cores;
  116. }
  117. int probecpu (void)
  118. {
  119. uint svr;
  120. uint ver;
  121. svr = get_svr();
  122. ver = SVR_SOC_VER(svr);
  123. gd->cpu = identify_cpu(ver);
  124. return 0;
  125. }
  126. /*
  127. * Initializes on-chip ethernet controllers.
  128. * to override, implement board_eth_init()
  129. */
  130. int cpu_eth_init(bd_t *bis)
  131. {
  132. #if defined(CONFIG_ETHER_ON_FCC)
  133. fec_initialize(bis);
  134. #endif
  135. #if defined(CONFIG_UEC_ETH)
  136. uec_standard_init(bis);
  137. #endif
  138. #if defined(CONFIG_TSEC_ENET) || defined(CONFIG_MPC85XX_FEC)
  139. tsec_standard_init(bis);
  140. #endif
  141. return 0;
  142. }