at91rm9200.h 4.7 KB

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  1. /*
  2. * See file CREDITS for list of people who contributed to this
  3. * project.
  4. *
  5. * This program is free software; you can redistribute it and/or
  6. * modify it under the terms of the GNU General Public License as
  7. * published by the Free Software Foundation; either version 2 of
  8. * the License, or (at your option) any later version.
  9. *
  10. * This program is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; if not, write to the Free Software
  17. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  18. * MA 02111-1307 USA
  19. */
  20. #ifndef __AT91RM9200_H__
  21. #define __AT91RM9200_H__
  22. /* Periperial Identifiers */
  23. #define AT91_ID_SYS 1 /* System Peripheral */
  24. #define AT91_ID_PIOA 2 /* PIO port A */
  25. #define AT91_ID_PIOB 3 /* PIO port B */
  26. #define AT91_ID_PIOC 4 /* PIO port C */
  27. #define AT91_ID_PIOD 5 /* PIO port D BGA only */
  28. #define AT91_ID_USART0 6 /* USART 0 */
  29. #define AT91_ID_USART1 7 /* USART 1 */
  30. #define AT91_ID_USART2 8 /* USART 2 */
  31. #define AT91_ID_USART3 9 /* USART 3 */
  32. #define AT91_ID_MCI 10 /* Multimedia Card Interface */
  33. #define AT91_ID_UDP 11 /* USB Device Port */
  34. #define AT91_ID_TWI 12 /* Two Wire Interface */
  35. #define AT91_ID_SPI 13 /* Serial Peripheral Interface */
  36. #define AT91_ID_SSC0 14 /* Synch. Serial Controller 0 */
  37. #define AT91_ID_SSC1 15 /* Synch. Serial Controller 1 */
  38. #define AT91_ID_SSC2 16 /* Synch. Serial Controller 2 */
  39. #define AT91_ID_TC0 17 /* Timer Counter 0 */
  40. #define AT91_ID_TC1 18 /* Timer Counter 1 */
  41. #define AT91_ID_TC2 19 /* Timer Counter 2 */
  42. #define AT91_ID_TC3 20 /* Timer Counter 3 */
  43. #define AT91_ID_TC4 21 /* Timer Counter 4 */
  44. #define AT91_ID_TC5 22 /* Timer Counter 5 */
  45. #define AT91_ID_UHP 23 /* OHCI USB Host Port */
  46. #define AT91_ID_EMAC 24 /* Ethernet MAC */
  47. #define AT91_ID_IRQ0 25 /* Advanced Interrupt Controller */
  48. #define AT91_ID_IRQ1 26 /* Advanced Interrupt Controller */
  49. #define AT91_ID_IRQ2 27 /* Advanced Interrupt Controller */
  50. #define AT91_ID_IRQ3 28 /* Advanced Interrupt Controller */
  51. #define AT91_ID_IRQ4 29 /* Advanced Interrupt Controller */
  52. #define AT91_ID_IRQ5 30 /* Advanced Interrupt Controller */
  53. #define AT91_ID_IRQ6 31 /* Advanced Interrupt Controller */
  54. #define AT91_USB_HOST_BASE 0x00300000
  55. #define AT91_TC_BASE 0xFFFA0000
  56. #define AT91_UDP_BASE 0xFFFB0000
  57. #define AT91_MCI_BASE 0xFFFB4000
  58. #define AT91_TWI_BASE 0xFFFB8000
  59. #define AT91_EMAC_BASE 0xFFFBC000
  60. #define AT91_USART_BASE 0xFFFC0000 /* 4x 0x4000 Offset */
  61. #define AT91_SCC_BASE 0xFFFD0000 /* 4x 0x4000 Offset */
  62. #define AT91_SPI_BASE 0xFFFE0000
  63. #define AT91_AIC_BASE 0xFFFFF000
  64. #define AT91_DBGU_BASE 0xFFFFF200
  65. #define AT91_PIO_BASE 0xFFFFF400 /* 4x 0x200 Offset */
  66. #define AT91_PMC_BASE 0xFFFFFC00
  67. #define AT91_ST_BASE 0xFFFFFD00
  68. #define AT91_ST_BASE 0xFFFFFD00
  69. #define AT91_RTC_BASE 0xFFFFFE00
  70. #define AT91_MC_BASE 0xFFFFFF00
  71. /* AT91RM9200 Periperial Multiplexing A */
  72. /* Port A */
  73. #define AT91_PMX_AA_EREFCK 0x00000080
  74. #define AT91_PMX_AA_ETXCK 0x00000080
  75. #define AT91_PMX_AA_ETXEN 0x00000100
  76. #define AT91_PMX_AA_ETX0 0x00000200
  77. #define AT91_PMX_AA_ETX1 0x00000400
  78. #define AT91_PMX_AA_ECRS 0x00000800
  79. #define AT91_PMX_AA_ECRSDV 0x00000800
  80. #define AT91_PMX_AA_ERX0 0x00001000
  81. #define AT91_PMX_AA_ERX1 0x00002000
  82. #define AT91_PMX_AA_ERXER 0x00004000
  83. #define AT91_PMX_AA_EMDC 0x00008000
  84. #define AT91_PMX_AA_EMDIO 0x00010000
  85. #define AT91_PMX_AA_TXD2 0x00810000
  86. #define AT91_PMX_AA_TWD 0x02000000
  87. #define AT91_PMX_AA_TWCK 0x04000000
  88. /* Port B */
  89. #define AT91_PMX_BA_ERXCK 0x00080000
  90. #define AT91_PMX_BA_ECOL 0x00040000
  91. #define AT91_PMX_BA_ERXDV 0x00020000
  92. #define AT91_PMX_BA_ERX3 0x00010000
  93. #define AT91_PMX_BA_ERX2 0x00008000
  94. #define AT91_PMX_BA_ETXER 0x00004000
  95. #define AT91_PMX_BA_ETX3 0x00002000
  96. #define AT91_PMX_BA_ETX2 0x00001000
  97. /* Port B */
  98. #define AT91_PMX_CA_BFCK 0x00000001
  99. #define AT91_PMX_CA_BFRDY 0x00000002
  100. #define AT91_PMX_CA_SMOE 0x00000002
  101. #define AT91_PMX_CA_BFAVD 0x00000004
  102. #define AT91_PMX_CA_BFBAA 0x00000008
  103. #define AT91_PMX_CA_SMWE 0x00000008
  104. #define AT91_PMX_CA_BFOE 0x00000010
  105. #define AT91_PMX_CA_BFWE 0x00000020
  106. #define AT91_PMX_CA_NWAIT 0x00000040
  107. #define AT91_PMX_CA_A23 0x00000080
  108. #define AT91_PMX_CA_A24 0x00000100
  109. #define AT91_PMX_CA_A25 0x00000200
  110. #define AT91_PMX_CA_CFRNW 0x00000200
  111. #define AT91_PMX_CA_NCS4 0x00000400
  112. #define AT91_PMX_CA_CFCS 0x00000400
  113. #define AT91_PMX_CA_NCS5 0x00000800
  114. #define AT91_PMX_CA_CFCE1 0x00001000
  115. #define AT91_PMX_CA_NCS6 0x00001000
  116. #define AT91_PMX_CA_CFCE2 0x00002000
  117. #define AT91_PMX_CA_NCS7 0x00002000
  118. #define AT91_PMX_CA_D16_31 0xFFFF0000
  119. #define CONFIG_SYS_AT91_CPU_NAME "AT91RM9200"
  120. #endif