usb_ohci.c 45 KB

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  1. /*
  2. * URB OHCI HCD (Host Controller Driver) for USB on the S3C2400.
  3. *
  4. * (C) Copyright 2003
  5. * Gary Jennejohn, DENX Software Engineering <garyj@denx.de>
  6. *
  7. * Note: Much of this code has been derived from Linux 2.4
  8. * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
  9. * (C) Copyright 2000-2002 David Brownell
  10. *
  11. * See file CREDITS for list of people who contributed to this
  12. * project.
  13. *
  14. * This program is free software; you can redistribute it and/or
  15. * modify it under the terms of the GNU General Public License as
  16. * published by the Free Software Foundation; either version 2 of
  17. * the License, or (at your option) any later version.
  18. *
  19. * This program is distributed in the hope that it will be useful,
  20. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  21. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  22. * GNU General Public License for more details.
  23. *
  24. * You should have received a copy of the GNU General Public License
  25. * along with this program; if not, write to the Free Software
  26. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  27. * MA 02111-1307 USA
  28. *
  29. */
  30. /*
  31. * IMPORTANT NOTES
  32. * 1 - this driver is intended for use with USB Mass Storage Devices
  33. * (BBB) ONLY. There is NO support for Interrupt or Isochronous pipes!
  34. */
  35. #include <common.h>
  36. /* #include <pci.h> no PCI on the S3C24X0 */
  37. #if defined(CONFIG_USB_OHCI) && defined(CONFIG_S3C24X0)
  38. #include <asm/arch/s3c24x0_cpu.h>
  39. #include <asm/io.h>
  40. #include <malloc.h>
  41. #include <usb.h>
  42. #include "usb_ohci.h"
  43. #define OHCI_USE_NPS /* force NoPowerSwitching mode */
  44. #undef OHCI_VERBOSE_DEBUG /* not always helpful */
  45. /* For initializing controller (mask in an HCFS mode too) */
  46. #define OHCI_CONTROL_INIT \
  47. (OHCI_CTRL_CBSR & 0x3) | OHCI_CTRL_IE | OHCI_CTRL_PLE
  48. #define min_t(type, x, y) \
  49. ({ type __x = (x); type __y = (y); __x < __y ? __x : __y; })
  50. #undef DEBUG
  51. #ifdef DEBUG
  52. #define dbg(format, arg...) printf("DEBUG: " format "\n", ## arg)
  53. #else
  54. #define dbg(format, arg...) do {} while(0)
  55. #endif /* DEBUG */
  56. #define err(format, arg...) printf("ERROR: " format "\n", ## arg)
  57. #undef SHOW_INFO
  58. #ifdef SHOW_INFO
  59. #define info(format, arg...) printf("INFO: " format "\n", ## arg)
  60. #else
  61. #define info(format, arg...) do {} while(0)
  62. #endif
  63. #define m16_swap(x) swap_16(x)
  64. #define m32_swap(x) swap_32(x)
  65. /* global struct ohci */
  66. static struct ohci gohci;
  67. /* this must be aligned to a 256 byte boundary */
  68. struct ohci_hcca ghcca[1];
  69. /* a pointer to the aligned storage */
  70. struct ohci_hcca *phcca;
  71. /* this allocates EDs for all possible endpoints */
  72. struct ohci_device ohci_dev;
  73. /* urb_priv */
  74. struct urb_priv urb_priv;
  75. /* RHSC flag */
  76. int got_rhsc;
  77. /* device which was disconnected */
  78. struct usb_device *devgone;
  79. /* flag guarding URB transation */
  80. int urb_finished = 0;
  81. /*-------------------------------------------------------------------------*/
  82. /* AMD-756 (D2 rev) reports corrupt register contents in some cases.
  83. * The erratum (#4) description is incorrect. AMD's workaround waits
  84. * till some bits (mostly reserved) are clear; ok for all revs.
  85. */
  86. #define OHCI_QUIRK_AMD756 0xabcd
  87. #define read_roothub(hc, register, mask) ({ \
  88. u32 temp = readl (&hc->regs->roothub.register); \
  89. if (hc->flags & OHCI_QUIRK_AMD756) \
  90. while (temp & mask) \
  91. temp = readl (&hc->regs->roothub.register); \
  92. temp; })
  93. static u32 roothub_a(struct ohci *hc)
  94. {
  95. return read_roothub(hc, a, 0xfc0fe000);
  96. }
  97. static inline u32 roothub_b(struct ohci *hc)
  98. {
  99. return readl(&hc->regs->roothub.b);
  100. }
  101. static inline u32 roothub_status(struct ohci *hc)
  102. {
  103. return readl(&hc->regs->roothub.status);
  104. }
  105. static u32 roothub_portstatus(struct ohci *hc, int i)
  106. {
  107. return read_roothub(hc, portstatus[i], 0xffe0fce0);
  108. }
  109. /* forward declaration */
  110. static int hc_interrupt(void);
  111. static void td_submit_job(struct usb_device *dev, unsigned long pipe,
  112. void *buffer, int transfer_len,
  113. struct devrequest *setup, struct urb_priv *urb,
  114. int interval);
  115. /*-------------------------------------------------------------------------*
  116. * URB support functions
  117. *-------------------------------------------------------------------------*/
  118. /* free HCD-private data associated with this URB */
  119. static void urb_free_priv(struct urb_priv *urb)
  120. {
  121. int i;
  122. int last;
  123. struct td *td;
  124. last = urb->length - 1;
  125. if (last >= 0) {
  126. for (i = 0; i <= last; i++) {
  127. td = urb->td[i];
  128. if (td) {
  129. td->usb_dev = NULL;
  130. urb->td[i] = NULL;
  131. }
  132. }
  133. }
  134. }
  135. /*-------------------------------------------------------------------------*/
  136. #ifdef DEBUG
  137. static int sohci_get_current_frame_number(struct usb_device *dev);
  138. /* debug| print the main components of an URB
  139. * small: 0) header + data packets 1) just header */
  140. static void pkt_print(struct usb_device *dev, unsigned long pipe, void *buffer,
  141. int transfer_len, struct devrequest *setup, char *str,
  142. int small)
  143. {
  144. struct urb_priv *purb = &urb_priv;
  145. dbg("%s URB:[%4x] dev:%2d,ep:%2d-%c,type:%s,len:%d/%d stat:%#lx",
  146. str,
  147. sohci_get_current_frame_number(dev),
  148. usb_pipedevice(pipe),
  149. usb_pipeendpoint(pipe),
  150. usb_pipeout(pipe) ? 'O' : 'I',
  151. usb_pipetype(pipe) < 2 ?
  152. (usb_pipeint(pipe) ? "INTR" : "ISOC") :
  153. (usb_pipecontrol(pipe) ? "CTRL" : "BULK"),
  154. purb->actual_length, transfer_len, dev->status);
  155. #ifdef OHCI_VERBOSE_DEBUG
  156. if (!small) {
  157. int i, len;
  158. if (usb_pipecontrol(pipe)) {
  159. printf(__FILE__ ": cmd(8):");
  160. for (i = 0; i < 8; i++)
  161. printf(" %02x", ((__u8 *) setup)[i]);
  162. printf("\n");
  163. }
  164. if (transfer_len > 0 && buffer) {
  165. printf(__FILE__ ": data(%d/%d):",
  166. purb->actual_length, transfer_len);
  167. len = usb_pipeout(pipe) ?
  168. transfer_len : purb->actual_length;
  169. for (i = 0; i < 16 && i < len; i++)
  170. printf(" %02x", ((__u8 *) buffer)[i]);
  171. printf("%s\n", i < len ? "..." : "");
  172. }
  173. }
  174. #endif
  175. }
  176. /* just for debugging; prints non-empty branches of the
  177. int ed tree inclusive iso eds*/
  178. void ep_print_int_eds(struct ohci *ohci, char *str)
  179. {
  180. int i, j;
  181. __u32 *ed_p;
  182. for (i = 0; i < 32; i++) {
  183. j = 5;
  184. ed_p = &(ohci->hcca->int_table[i]);
  185. if (*ed_p == 0)
  186. continue;
  187. printf(__FILE__ ": %s branch int %2d(%2x):", str, i, i);
  188. while (*ed_p != 0 && j--) {
  189. struct ed *ed = (struct ed *) m32_swap(ed_p);
  190. printf(" ed: %4x;", ed->hwINFO);
  191. ed_p = &ed->hwNextED;
  192. }
  193. printf("\n");
  194. }
  195. }
  196. static void ohci_dump_intr_mask(char *label, __u32 mask)
  197. {
  198. dbg("%s: 0x%08x%s%s%s%s%s%s%s%s%s",
  199. label,
  200. mask,
  201. (mask & OHCI_INTR_MIE) ? " MIE" : "",
  202. (mask & OHCI_INTR_OC) ? " OC" : "",
  203. (mask & OHCI_INTR_RHSC) ? " RHSC" : "",
  204. (mask & OHCI_INTR_FNO) ? " FNO" : "",
  205. (mask & OHCI_INTR_UE) ? " UE" : "",
  206. (mask & OHCI_INTR_RD) ? " RD" : "",
  207. (mask & OHCI_INTR_SF) ? " SF" : "",
  208. (mask & OHCI_INTR_WDH) ? " WDH" : "",
  209. (mask & OHCI_INTR_SO) ? " SO" : "");
  210. }
  211. static void maybe_print_eds(char *label, __u32 value)
  212. {
  213. struct ed *edp = (struct ed *) value;
  214. if (value) {
  215. dbg("%s %08x", label, value);
  216. dbg("%08x", edp->hwINFO);
  217. dbg("%08x", edp->hwTailP);
  218. dbg("%08x", edp->hwHeadP);
  219. dbg("%08x", edp->hwNextED);
  220. }
  221. }
  222. static char *hcfs2string(int state)
  223. {
  224. switch (state) {
  225. case OHCI_USB_RESET:
  226. return "reset";
  227. case OHCI_USB_RESUME:
  228. return "resume";
  229. case OHCI_USB_OPER:
  230. return "operational";
  231. case OHCI_USB_SUSPEND:
  232. return "suspend";
  233. }
  234. return "?";
  235. }
  236. /* dump control and status registers */
  237. static void ohci_dump_status(struct ohci *controller)
  238. {
  239. struct ohci_regs *regs = controller->regs;
  240. __u32 temp;
  241. temp = readl(&regs->revision) & 0xff;
  242. if (temp != 0x10)
  243. dbg("spec %d.%d", (temp >> 4), (temp & 0x0f));
  244. temp = readl(&regs->control);
  245. dbg("control: 0x%08x%s%s%s HCFS=%s%s%s%s%s CBSR=%d", temp,
  246. (temp & OHCI_CTRL_RWE) ? " RWE" : "",
  247. (temp & OHCI_CTRL_RWC) ? " RWC" : "",
  248. (temp & OHCI_CTRL_IR) ? " IR" : "",
  249. hcfs2string(temp & OHCI_CTRL_HCFS),
  250. (temp & OHCI_CTRL_BLE) ? " BLE" : "",
  251. (temp & OHCI_CTRL_CLE) ? " CLE" : "",
  252. (temp & OHCI_CTRL_IE) ? " IE" : "",
  253. (temp & OHCI_CTRL_PLE) ? " PLE" : "", temp & OHCI_CTRL_CBSR);
  254. temp = readl(&regs->cmdstatus);
  255. dbg("cmdstatus: 0x%08x SOC=%d%s%s%s%s", temp,
  256. (temp & OHCI_SOC) >> 16,
  257. (temp & OHCI_OCR) ? " OCR" : "",
  258. (temp & OHCI_BLF) ? " BLF" : "",
  259. (temp & OHCI_CLF) ? " CLF" : "", (temp & OHCI_HCR) ? " HCR" : "");
  260. ohci_dump_intr_mask("intrstatus", readl(&regs->intrstatus));
  261. ohci_dump_intr_mask("intrenable", readl(&regs->intrenable));
  262. maybe_print_eds("ed_periodcurrent", readl(&regs->ed_periodcurrent));
  263. maybe_print_eds("ed_controlhead", readl(&regs->ed_controlhead));
  264. maybe_print_eds("ed_controlcurrent", readl(&regs->ed_controlcurrent));
  265. maybe_print_eds("ed_bulkhead", readl(&regs->ed_bulkhead));
  266. maybe_print_eds("ed_bulkcurrent", readl(&regs->ed_bulkcurrent));
  267. maybe_print_eds("donehead", readl(&regs->donehead));
  268. }
  269. static void ohci_dump_roothub(struct ohci *controller, int verbose)
  270. {
  271. __u32 temp, ndp, i;
  272. temp = roothub_a(controller);
  273. ndp = (temp & RH_A_NDP);
  274. if (verbose) {
  275. dbg("roothub.a: %08x POTPGT=%d%s%s%s%s%s NDP=%d", temp,
  276. ((temp & RH_A_POTPGT) >> 24) & 0xff,
  277. (temp & RH_A_NOCP) ? " NOCP" : "",
  278. (temp & RH_A_OCPM) ? " OCPM" : "",
  279. (temp & RH_A_DT) ? " DT" : "",
  280. (temp & RH_A_NPS) ? " NPS" : "",
  281. (temp & RH_A_PSM) ? " PSM" : "", ndp);
  282. temp = roothub_b(controller);
  283. dbg("roothub.b: %08x PPCM=%04x DR=%04x",
  284. temp, (temp & RH_B_PPCM) >> 16, (temp & RH_B_DR)
  285. );
  286. temp = roothub_status(controller);
  287. dbg("roothub.status: %08x%s%s%s%s%s%s",
  288. temp,
  289. (temp & RH_HS_CRWE) ? " CRWE" : "",
  290. (temp & RH_HS_OCIC) ? " OCIC" : "",
  291. (temp & RH_HS_LPSC) ? " LPSC" : "",
  292. (temp & RH_HS_DRWE) ? " DRWE" : "",
  293. (temp & RH_HS_OCI) ? " OCI" : "",
  294. (temp & RH_HS_LPS) ? " LPS" : "");
  295. }
  296. for (i = 0; i < ndp; i++) {
  297. temp = roothub_portstatus(controller, i);
  298. dbg("roothub.portstatus [%d] = 0x%08x%s%s%s%s%s%s%s%s%s%s%s%s",
  299. i,
  300. temp,
  301. (temp & RH_PS_PRSC) ? " PRSC" : "",
  302. (temp & RH_PS_OCIC) ? " OCIC" : "",
  303. (temp & RH_PS_PSSC) ? " PSSC" : "",
  304. (temp & RH_PS_PESC) ? " PESC" : "",
  305. (temp & RH_PS_CSC) ? " CSC" : "",
  306. (temp & RH_PS_LSDA) ? " LSDA" : "",
  307. (temp & RH_PS_PPS) ? " PPS" : "",
  308. (temp & RH_PS_PRS) ? " PRS" : "",
  309. (temp & RH_PS_POCI) ? " POCI" : "",
  310. (temp & RH_PS_PSS) ? " PSS" : "",
  311. (temp & RH_PS_PES) ? " PES" : "",
  312. (temp & RH_PS_CCS) ? " CCS" : "");
  313. }
  314. }
  315. static void ohci_dump(struct ohci *controller, int verbose)
  316. {
  317. dbg("OHCI controller usb-%s state", controller->slot_name);
  318. /* dumps some of the state we know about */
  319. ohci_dump_status(controller);
  320. if (verbose)
  321. ep_print_int_eds(controller, "hcca");
  322. dbg("hcca frame #%04x", controller->hcca->frame_no);
  323. ohci_dump_roothub(controller, 1);
  324. }
  325. #endif /* DEBUG */
  326. /*-------------------------------------------------------------------------*
  327. * Interface functions (URB)
  328. *-------------------------------------------------------------------------*/
  329. /* get a transfer request */
  330. int sohci_submit_job(struct usb_device *dev, unsigned long pipe, void *buffer,
  331. int transfer_len, struct devrequest *setup, int interval)
  332. {
  333. struct ohci *ohci;
  334. struct ed *ed;
  335. struct urb_priv *purb_priv;
  336. int i, size = 0;
  337. ohci = &gohci;
  338. /* when controller's hung, permit only roothub cleanup attempts
  339. * such as powering down ports */
  340. if (ohci->disabled) {
  341. err("sohci_submit_job: EPIPE");
  342. return -1;
  343. }
  344. /* if we have an unfinished URB from previous transaction let's
  345. * fail and scream as quickly as possible so as not to corrupt
  346. * further communication */
  347. if (!urb_finished) {
  348. err("sohci_submit_job: URB NOT FINISHED");
  349. return -1;
  350. }
  351. /* we're about to begin a new transaction here
  352. so mark the URB unfinished */
  353. urb_finished = 0;
  354. /* every endpoint has a ed, locate and fill it */
  355. ed = ep_add_ed(dev, pipe);
  356. if (!ed) {
  357. err("sohci_submit_job: ENOMEM");
  358. return -1;
  359. }
  360. /* for the private part of the URB we need the number of TDs (size) */
  361. switch (usb_pipetype(pipe)) {
  362. case PIPE_BULK:
  363. /* one TD for every 4096 Byte */
  364. size = (transfer_len - 1) / 4096 + 1;
  365. break;
  366. case PIPE_CONTROL:
  367. /* 1 TD for setup, 1 for ACK and 1 for every 4096 B */
  368. size = (transfer_len == 0) ? 2 : (transfer_len - 1) / 4096 + 3;
  369. break;
  370. }
  371. if (size >= (N_URB_TD - 1)) {
  372. err("need %d TDs, only have %d", size, N_URB_TD);
  373. return -1;
  374. }
  375. purb_priv = &urb_priv;
  376. purb_priv->pipe = pipe;
  377. /* fill the private part of the URB */
  378. purb_priv->length = size;
  379. purb_priv->ed = ed;
  380. purb_priv->actual_length = 0;
  381. /* allocate the TDs */
  382. /* note that td[0] was allocated in ep_add_ed */
  383. for (i = 0; i < size; i++) {
  384. purb_priv->td[i] = td_alloc(dev);
  385. if (!purb_priv->td[i]) {
  386. purb_priv->length = i;
  387. urb_free_priv(purb_priv);
  388. err("sohci_submit_job: ENOMEM");
  389. return -1;
  390. }
  391. }
  392. if (ed->state == ED_NEW || (ed->state & ED_DEL)) {
  393. urb_free_priv(purb_priv);
  394. err("sohci_submit_job: EINVAL");
  395. return -1;
  396. }
  397. /* link the ed into a chain if is not already */
  398. if (ed->state != ED_OPER)
  399. ep_link(ohci, ed);
  400. /* fill the TDs and link it to the ed */
  401. td_submit_job(dev, pipe, buffer, transfer_len, setup, purb_priv,
  402. interval);
  403. return 0;
  404. }
  405. /*-------------------------------------------------------------------------*/
  406. #ifdef DEBUG
  407. /* tell us the current USB frame number */
  408. static int sohci_get_current_frame_number(struct usb_device *usb_dev)
  409. {
  410. struct ohci *ohci = &gohci;
  411. return m16_swap(ohci->hcca->frame_no);
  412. }
  413. #endif
  414. /*-------------------------------------------------------------------------*
  415. * ED handling functions
  416. *-------------------------------------------------------------------------*/
  417. /* link an ed into one of the HC chains */
  418. static int ep_link(struct ohci *ohci, struct ed *edi)
  419. {
  420. struct ed *ed = edi;
  421. ed->state = ED_OPER;
  422. switch (ed->type) {
  423. case PIPE_CONTROL:
  424. ed->hwNextED = 0;
  425. if (ohci->ed_controltail == NULL) {
  426. writel((u32)ed, &ohci->regs->ed_controlhead);
  427. } else {
  428. ohci->ed_controltail->hwNextED = (__u32) m32_swap(ed);
  429. }
  430. ed->ed_prev = ohci->ed_controltail;
  431. if (!ohci->ed_controltail && !ohci->ed_rm_list[0] &&
  432. !ohci->ed_rm_list[1] && !ohci->sleeping) {
  433. ohci->hc_control |= OHCI_CTRL_CLE;
  434. writel(ohci->hc_control, &ohci->regs->control);
  435. }
  436. ohci->ed_controltail = edi;
  437. break;
  438. case PIPE_BULK:
  439. ed->hwNextED = 0;
  440. if (ohci->ed_bulktail == NULL) {
  441. writel((u32)ed, &ohci->regs->ed_bulkhead);
  442. } else {
  443. ohci->ed_bulktail->hwNextED = (__u32) m32_swap(ed);
  444. }
  445. ed->ed_prev = ohci->ed_bulktail;
  446. if (!ohci->ed_bulktail && !ohci->ed_rm_list[0] &&
  447. !ohci->ed_rm_list[1] && !ohci->sleeping) {
  448. ohci->hc_control |= OHCI_CTRL_BLE;
  449. writel(ohci->hc_control, &ohci->regs->control);
  450. }
  451. ohci->ed_bulktail = edi;
  452. break;
  453. }
  454. return 0;
  455. }
  456. /*-------------------------------------------------------------------------*/
  457. /* unlink an ed from one of the HC chains.
  458. * just the link to the ed is unlinked.
  459. * the link from the ed still points to another operational ed or 0
  460. * so the HC can eventually finish the processing of the unlinked ed */
  461. static int ep_unlink(struct ohci *ohci, struct ed *ed)
  462. {
  463. struct ed *next;
  464. ed->hwINFO |= m32_swap(OHCI_ED_SKIP);
  465. switch (ed->type) {
  466. case PIPE_CONTROL:
  467. if (ed->ed_prev == NULL) {
  468. if (!ed->hwNextED) {
  469. ohci->hc_control &= ~OHCI_CTRL_CLE;
  470. writel(ohci->hc_control, &ohci->regs->control);
  471. }
  472. writel(m32_swap(*((__u32 *) &ed->hwNextED)),
  473. &ohci->regs->ed_controlhead);
  474. } else {
  475. ed->ed_prev->hwNextED = ed->hwNextED;
  476. }
  477. if (ohci->ed_controltail == ed) {
  478. ohci->ed_controltail = ed->ed_prev;
  479. } else {
  480. next = (struct ed *)m32_swap(*((__u32 *)&ed->hwNextED));
  481. next->ed_prev = ed->ed_prev;
  482. }
  483. break;
  484. case PIPE_BULK:
  485. if (ed->ed_prev == NULL) {
  486. if (!ed->hwNextED) {
  487. ohci->hc_control &= ~OHCI_CTRL_BLE;
  488. writel(ohci->hc_control, &ohci->regs->control);
  489. }
  490. writel(m32_swap(*((__u32 *) &ed->hwNextED)),
  491. &ohci->regs->ed_bulkhead);
  492. } else {
  493. ed->ed_prev->hwNextED = ed->hwNextED;
  494. }
  495. if (ohci->ed_bulktail == ed) {
  496. ohci->ed_bulktail = ed->ed_prev;
  497. } else {
  498. next = (struct ed *)m32_swap(*((__u32 *)&ed->hwNextED));
  499. next->ed_prev = ed->ed_prev;
  500. }
  501. break;
  502. }
  503. ed->state = ED_UNLINK;
  504. return 0;
  505. }
  506. /*-------------------------------------------------------------------------*/
  507. /* add/reinit an endpoint; this should be done once at the usb_set_configuration
  508. * command, but the USB stack is a little bit stateless so we do it at every
  509. * transaction. If the state of the ed is ED_NEW then a dummy td is added and
  510. * the state is changed to ED_UNLINK. In all other cases the state is left
  511. * unchanged. The ed info fields are setted anyway even though most of them
  512. * should not change */
  513. static struct ed *ep_add_ed(struct usb_device *usb_dev, unsigned long pipe)
  514. {
  515. struct td *td;
  516. struct ed *ed_ret;
  517. struct ed *ed;
  518. ed = ed_ret = &ohci_dev.ed[(usb_pipeendpoint(pipe) << 1) |
  519. (usb_pipecontrol(pipe) ? 0 :
  520. usb_pipeout(pipe))];
  521. if ((ed->state & ED_DEL) || (ed->state & ED_URB_DEL)) {
  522. err("ep_add_ed: pending delete");
  523. /* pending delete request */
  524. return NULL;
  525. }
  526. if (ed->state == ED_NEW) {
  527. ed->hwINFO = m32_swap(OHCI_ED_SKIP); /* skip ed */
  528. /* dummy td; end of td list for ed */
  529. td = td_alloc(usb_dev);
  530. ed->hwTailP = (__u32) m32_swap(td);
  531. ed->hwHeadP = ed->hwTailP;
  532. ed->state = ED_UNLINK;
  533. ed->type = usb_pipetype(pipe);
  534. ohci_dev.ed_cnt++;
  535. }
  536. ed->hwINFO = m32_swap(usb_pipedevice(pipe)
  537. | usb_pipeendpoint(pipe) << 7
  538. | (usb_pipeisoc(pipe) ? 0x8000 : 0)
  539. | (usb_pipecontrol(pipe) ? 0 :
  540. (usb_pipeout(pipe) ? 0x800 : 0x1000))
  541. | usb_pipeslow(pipe) << 13 |
  542. usb_maxpacket(usb_dev, pipe) << 16);
  543. return ed_ret;
  544. }
  545. /*-------------------------------------------------------------------------*
  546. * TD handling functions
  547. *-------------------------------------------------------------------------*/
  548. /* enqueue next TD for this URB (OHCI spec 5.2.8.2) */
  549. static void td_fill(struct ohci *ohci, unsigned int info, void *data, int len,
  550. struct usb_device *dev, int index,
  551. struct urb_priv *urb_priv)
  552. {
  553. struct td *td, *td_pt;
  554. #ifdef OHCI_FILL_TRACE
  555. int i;
  556. #endif
  557. if (index > urb_priv->length) {
  558. err("index > length");
  559. return;
  560. }
  561. /* use this td as the next dummy */
  562. td_pt = urb_priv->td[index];
  563. td_pt->hwNextTD = 0;
  564. /* fill the old dummy TD */
  565. td = urb_priv->td[index] =
  566. (struct td *) (m32_swap(urb_priv->ed->hwTailP) & ~0xf);
  567. td->ed = urb_priv->ed;
  568. td->next_dl_td = NULL;
  569. td->index = index;
  570. td->data = (__u32) data;
  571. #ifdef OHCI_FILL_TRACE
  572. if (usb_pipebulk(urb_priv->pipe) && usb_pipeout(urb_priv->pipe)) {
  573. for (i = 0; i < len; i++)
  574. printf("td->data[%d] %#2x ", i,
  575. ((unsigned char *)td->data)[i]);
  576. printf("\n");
  577. }
  578. #endif
  579. if (!len)
  580. data = 0;
  581. td->hwINFO = (__u32) m32_swap(info);
  582. td->hwCBP = (__u32) m32_swap(data);
  583. if (data)
  584. td->hwBE = (__u32) m32_swap(data + len - 1);
  585. else
  586. td->hwBE = 0;
  587. td->hwNextTD = (__u32) m32_swap(td_pt);
  588. /* append to queue */
  589. td->ed->hwTailP = td->hwNextTD;
  590. }
  591. /*-------------------------------------------------------------------------*/
  592. /* prepare all TDs of a transfer */
  593. static void td_submit_job(struct usb_device *dev, unsigned long pipe,
  594. void *buffer, int transfer_len,
  595. struct devrequest *setup, struct urb_priv *urb,
  596. int interval)
  597. {
  598. struct ohci *ohci = &gohci;
  599. int data_len = transfer_len;
  600. void *data;
  601. int cnt = 0;
  602. __u32 info = 0;
  603. unsigned int toggle = 0;
  604. /* OHCI handles the DATA-toggles itself, we just
  605. use the USB-toggle bits for reseting */
  606. if (usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe))) {
  607. toggle = TD_T_TOGGLE;
  608. } else {
  609. toggle = TD_T_DATA0;
  610. usb_settoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe),
  611. 1);
  612. }
  613. urb->td_cnt = 0;
  614. if (data_len)
  615. data = buffer;
  616. else
  617. data = 0;
  618. switch (usb_pipetype(pipe)) {
  619. case PIPE_BULK:
  620. info = usb_pipeout(pipe) ? TD_CC | TD_DP_OUT : TD_CC | TD_DP_IN;
  621. while (data_len > 4096) {
  622. td_fill(ohci, info | (cnt ? TD_T_TOGGLE : toggle), data,
  623. 4096, dev, cnt, urb);
  624. data += 4096;
  625. data_len -= 4096;
  626. cnt++;
  627. }
  628. info = usb_pipeout(pipe) ?
  629. TD_CC | TD_DP_OUT :
  630. TD_CC | TD_R | TD_DP_IN;
  631. td_fill(ohci, info | (cnt ? TD_T_TOGGLE : toggle), data,
  632. data_len, dev, cnt, urb);
  633. cnt++;
  634. if (!ohci->sleeping)
  635. /* start bulk list */
  636. writel(OHCI_BLF, &ohci->regs->cmdstatus);
  637. break;
  638. case PIPE_CONTROL:
  639. info = TD_CC | TD_DP_SETUP | TD_T_DATA0;
  640. td_fill(ohci, info, setup, 8, dev, cnt++, urb);
  641. if (data_len > 0) {
  642. info = usb_pipeout(pipe) ?
  643. TD_CC | TD_R | TD_DP_OUT | TD_T_DATA1 :
  644. TD_CC | TD_R | TD_DP_IN | TD_T_DATA1;
  645. /* NOTE: mishandles transfers >8K, some >4K */
  646. td_fill(ohci, info, data, data_len, dev, cnt++, urb);
  647. }
  648. info = usb_pipeout(pipe) ?
  649. TD_CC | TD_DP_IN | TD_T_DATA1 :
  650. TD_CC | TD_DP_OUT | TD_T_DATA1;
  651. td_fill(ohci, info, data, 0, dev, cnt++, urb);
  652. if (!ohci->sleeping)
  653. /* start Control list */
  654. writel(OHCI_CLF, &ohci->regs->cmdstatus);
  655. break;
  656. }
  657. if (urb->length != cnt)
  658. dbg("TD LENGTH %d != CNT %d", urb->length, cnt);
  659. }
  660. /*-------------------------------------------------------------------------*
  661. * Done List handling functions
  662. *-------------------------------------------------------------------------*/
  663. /* calculate the transfer length and update the urb */
  664. static void dl_transfer_length(struct td *td)
  665. {
  666. __u32 tdINFO, tdBE, tdCBP;
  667. struct urb_priv *lurb_priv = &urb_priv;
  668. tdINFO = m32_swap(td->hwINFO);
  669. tdBE = m32_swap(td->hwBE);
  670. tdCBP = m32_swap(td->hwCBP);
  671. if (!(usb_pipecontrol(lurb_priv->pipe) &&
  672. ((td->index == 0) || (td->index == lurb_priv->length - 1)))) {
  673. if (tdBE != 0) {
  674. if (td->hwCBP == 0)
  675. lurb_priv->actual_length += tdBE - td->data + 1;
  676. else
  677. lurb_priv->actual_length += tdCBP - td->data;
  678. }
  679. }
  680. }
  681. /*-------------------------------------------------------------------------*/
  682. /* replies to the request have to be on a FIFO basis so
  683. * we reverse the reversed done-list */
  684. static struct td *dl_reverse_done_list(struct ohci *ohci)
  685. {
  686. __u32 td_list_hc;
  687. __u32 tmp;
  688. struct td *td_rev = NULL;
  689. struct td *td_list = NULL;
  690. struct urb_priv *lurb_priv = NULL;
  691. td_list_hc = m32_swap(ohci->hcca->done_head) & 0xfffffff0;
  692. ohci->hcca->done_head = 0;
  693. while (td_list_hc) {
  694. td_list = (struct td *) td_list_hc;
  695. if (TD_CC_GET(m32_swap(td_list->hwINFO))) {
  696. lurb_priv = &urb_priv;
  697. dbg(" USB-error/status: %x : %p",
  698. TD_CC_GET(m32_swap(td_list->hwINFO)), td_list);
  699. if (td_list->ed->hwHeadP & m32_swap(0x1)) {
  700. if (lurb_priv &&
  701. ((td_list->index+1) < lurb_priv->length)) {
  702. tmp = lurb_priv->length - 1;
  703. td_list->ed->hwHeadP =
  704. (lurb_priv->td[tmp]->hwNextTD &
  705. m32_swap(0xfffffff0)) |
  706. (td_list->ed->hwHeadP &
  707. m32_swap(0x2));
  708. lurb_priv->td_cnt += lurb_priv->length -
  709. td_list->index - 1;
  710. } else
  711. td_list->ed->hwHeadP &=
  712. m32_swap(0xfffffff2);
  713. }
  714. }
  715. td_list->next_dl_td = td_rev;
  716. td_rev = td_list;
  717. td_list_hc = m32_swap(td_list->hwNextTD) & 0xfffffff0;
  718. }
  719. return td_list;
  720. }
  721. /*-------------------------------------------------------------------------*/
  722. /* td done list */
  723. static int dl_done_list(struct ohci *ohci, struct td *td_list)
  724. {
  725. struct td *td_list_next = NULL;
  726. struct ed *ed;
  727. int cc = 0;
  728. int stat = 0;
  729. /* urb_t *urb; */
  730. struct urb_priv *lurb_priv;
  731. __u32 tdINFO, edHeadP, edTailP;
  732. while (td_list) {
  733. td_list_next = td_list->next_dl_td;
  734. lurb_priv = &urb_priv;
  735. tdINFO = m32_swap(td_list->hwINFO);
  736. ed = td_list->ed;
  737. dl_transfer_length(td_list);
  738. /* error code of transfer */
  739. cc = TD_CC_GET(tdINFO);
  740. if (cc != 0) {
  741. dbg("ConditionCode %#x", cc);
  742. stat = cc_to_error[cc];
  743. }
  744. /* see if this done list makes for all TD's of current URB,
  745. * and mark the URB finished if so */
  746. if (++(lurb_priv->td_cnt) == lurb_priv->length) {
  747. if ((ed->state & (ED_OPER | ED_UNLINK)))
  748. urb_finished = 1;
  749. else
  750. dbg("dl_done_list: strange.., ED state %x, "
  751. "ed->state\n");
  752. } else
  753. dbg("dl_done_list: processing TD %x, len %x\n",
  754. lurb_priv->td_cnt, lurb_priv->length);
  755. if (ed->state != ED_NEW) {
  756. edHeadP = m32_swap(ed->hwHeadP) & 0xfffffff0;
  757. edTailP = m32_swap(ed->hwTailP);
  758. /* unlink eds if they are not busy */
  759. if ((edHeadP == edTailP) && (ed->state == ED_OPER))
  760. ep_unlink(ohci, ed);
  761. }
  762. td_list = td_list_next;
  763. }
  764. return stat;
  765. }
  766. /*-------------------------------------------------------------------------*
  767. * Virtual Root Hub
  768. *-------------------------------------------------------------------------*/
  769. /* Device descriptor */
  770. static __u8 root_hub_dev_des[] = {
  771. 0x12, /* __u8 bLength; */
  772. 0x01, /* __u8 bDescriptorType; Device */
  773. 0x10, /* __u16 bcdUSB; v1.1 */
  774. 0x01,
  775. 0x09, /* __u8 bDeviceClass; HUB_CLASSCODE */
  776. 0x00, /* __u8 bDeviceSubClass; */
  777. 0x00, /* __u8 bDeviceProtocol; */
  778. 0x08, /* __u8 bMaxPacketSize0; 8 Bytes */
  779. 0x00, /* __u16 idVendor; */
  780. 0x00,
  781. 0x00, /* __u16 idProduct; */
  782. 0x00,
  783. 0x00, /* __u16 bcdDevice; */
  784. 0x00,
  785. 0x00, /* __u8 iManufacturer; */
  786. 0x01, /* __u8 iProduct; */
  787. 0x00, /* __u8 iSerialNumber; */
  788. 0x01 /* __u8 bNumConfigurations; */
  789. };
  790. /* Configuration descriptor */
  791. static __u8 root_hub_config_des[] = {
  792. 0x09, /* __u8 bLength; */
  793. 0x02, /* __u8 bDescriptorType; Configuration */
  794. 0x19, /* __u16 wTotalLength; */
  795. 0x00,
  796. 0x01, /* __u8 bNumInterfaces; */
  797. 0x01, /* __u8 bConfigurationValue; */
  798. 0x00, /* __u8 iConfiguration; */
  799. 0x40, /* __u8 bmAttributes;
  800. Bit 7: Bus-powered, 6: Self-powered,
  801. 5 Remote-wakwup, 4..0: resvd */
  802. 0x00, /* __u8 MaxPower; */
  803. /* interface */
  804. 0x09, /* __u8 if_bLength; */
  805. 0x04, /* __u8 if_bDescriptorType; Interface */
  806. 0x00, /* __u8 if_bInterfaceNumber; */
  807. 0x00, /* __u8 if_bAlternateSetting; */
  808. 0x01, /* __u8 if_bNumEndpoints; */
  809. 0x09, /* __u8 if_bInterfaceClass; HUB_CLASSCODE */
  810. 0x00, /* __u8 if_bInterfaceSubClass; */
  811. 0x00, /* __u8 if_bInterfaceProtocol; */
  812. 0x00, /* __u8 if_iInterface; */
  813. /* endpoint */
  814. 0x07, /* __u8 ep_bLength; */
  815. 0x05, /* __u8 ep_bDescriptorType; Endpoint */
  816. 0x81, /* __u8 ep_bEndpointAddress; IN Endpoint 1 */
  817. 0x03, /* __u8 ep_bmAttributes; Interrupt */
  818. 0x02, /* __u16 ep_wMaxPacketSize; ((MAX_ROOT_PORTS + 1) / 8 */
  819. 0x00,
  820. 0xff /* __u8 ep_bInterval; 255 ms */
  821. };
  822. static unsigned char root_hub_str_index0[] = {
  823. 0x04, /* __u8 bLength; */
  824. 0x03, /* __u8 bDescriptorType; String-descriptor */
  825. 0x09, /* __u8 lang ID */
  826. 0x04, /* __u8 lang ID */
  827. };
  828. static unsigned char root_hub_str_index1[] = {
  829. 28, /* __u8 bLength; */
  830. 0x03, /* __u8 bDescriptorType; String-descriptor */
  831. 'O', /* __u8 Unicode */
  832. 0, /* __u8 Unicode */
  833. 'H', /* __u8 Unicode */
  834. 0, /* __u8 Unicode */
  835. 'C', /* __u8 Unicode */
  836. 0, /* __u8 Unicode */
  837. 'I', /* __u8 Unicode */
  838. 0, /* __u8 Unicode */
  839. ' ', /* __u8 Unicode */
  840. 0, /* __u8 Unicode */
  841. 'R', /* __u8 Unicode */
  842. 0, /* __u8 Unicode */
  843. 'o', /* __u8 Unicode */
  844. 0, /* __u8 Unicode */
  845. 'o', /* __u8 Unicode */
  846. 0, /* __u8 Unicode */
  847. 't', /* __u8 Unicode */
  848. 0, /* __u8 Unicode */
  849. ' ', /* __u8 Unicode */
  850. 0, /* __u8 Unicode */
  851. 'H', /* __u8 Unicode */
  852. 0, /* __u8 Unicode */
  853. 'u', /* __u8 Unicode */
  854. 0, /* __u8 Unicode */
  855. 'b', /* __u8 Unicode */
  856. 0, /* __u8 Unicode */
  857. };
  858. /* Hub class-specific descriptor is constructed dynamically */
  859. /*-------------------------------------------------------------------------*/
  860. #define OK(x) len = (x); break
  861. #ifdef DEBUG
  862. #define WR_RH_STAT(x) \
  863. { \
  864. info("WR:status %#8x", (x)); \
  865. writel((x), &gohci.regs->roothub.status); \
  866. }
  867. #define WR_RH_PORTSTAT(x) \
  868. { \
  869. info("WR:portstatus[%d] %#8x", wIndex-1, (x)); \
  870. writel((x), &gohci.regs->roothub.portstatus[wIndex-1]); \
  871. }
  872. #else
  873. #define WR_RH_STAT(x) \
  874. writel((x), &gohci.regs->roothub.status)
  875. #define WR_RH_PORTSTAT(x)\
  876. writel((x), &gohci.regs->roothub.portstatus[wIndex-1])
  877. #endif
  878. #define RD_RH_STAT roothub_status(&gohci)
  879. #define RD_RH_PORTSTAT roothub_portstatus(&gohci, wIndex-1)
  880. /* request to virtual root hub */
  881. int rh_check_port_status(struct ohci *controller)
  882. {
  883. __u32 temp, ndp, i;
  884. int res;
  885. res = -1;
  886. temp = roothub_a(controller);
  887. ndp = (temp & RH_A_NDP);
  888. for (i = 0; i < ndp; i++) {
  889. temp = roothub_portstatus(controller, i);
  890. /* check for a device disconnect */
  891. if (((temp & (RH_PS_PESC | RH_PS_CSC)) ==
  892. (RH_PS_PESC | RH_PS_CSC)) && ((temp & RH_PS_CCS) == 0)) {
  893. res = i;
  894. break;
  895. }
  896. }
  897. return res;
  898. }
  899. static int ohci_submit_rh_msg(struct usb_device *dev, unsigned long pipe,
  900. void *buffer, int transfer_len,
  901. struct devrequest *cmd)
  902. {
  903. void *data = buffer;
  904. int leni = transfer_len;
  905. int len = 0;
  906. int stat = 0;
  907. __u32 datab[4];
  908. __u8 *data_buf = (__u8 *) datab;
  909. __u16 bmRType_bReq;
  910. __u16 wValue;
  911. __u16 wIndex;
  912. __u16 wLength;
  913. #ifdef DEBUG
  914. urb_priv.actual_length = 0;
  915. pkt_print(dev, pipe, buffer, transfer_len, cmd, "SUB(rh)",
  916. usb_pipein(pipe));
  917. #else
  918. wait_ms(1);
  919. #endif
  920. if (usb_pipeint(pipe)) {
  921. info("Root-Hub submit IRQ: NOT implemented");
  922. return 0;
  923. }
  924. bmRType_bReq = cmd->requesttype | (cmd->request << 8);
  925. wValue = m16_swap(cmd->value);
  926. wIndex = m16_swap(cmd->index);
  927. wLength = m16_swap(cmd->length);
  928. info("Root-Hub: adr: %2x cmd(%1x): %08x %04x %04x %04x",
  929. dev->devnum, 8, bmRType_bReq, wValue, wIndex, wLength);
  930. switch (bmRType_bReq) {
  931. /* Request Destination:
  932. without flags: Device,
  933. RH_INTERFACE: interface,
  934. RH_ENDPOINT: endpoint,
  935. RH_CLASS means HUB here,
  936. RH_OTHER | RH_CLASS almost ever means HUB_PORT here
  937. */
  938. case RH_GET_STATUS:
  939. *(__u16 *) data_buf = m16_swap(1);
  940. OK(2);
  941. case RH_GET_STATUS | RH_INTERFACE:
  942. *(__u16 *) data_buf = m16_swap(0);
  943. OK(2);
  944. case RH_GET_STATUS | RH_ENDPOINT:
  945. *(__u16 *) data_buf = m16_swap(0);
  946. OK(2);
  947. case RH_GET_STATUS | RH_CLASS:
  948. *(__u32 *) data_buf =
  949. m32_swap(RD_RH_STAT & ~(RH_HS_CRWE | RH_HS_DRWE));
  950. OK(4);
  951. case RH_GET_STATUS | RH_OTHER | RH_CLASS:
  952. *(__u32 *) data_buf = m32_swap(RD_RH_PORTSTAT);
  953. OK(4);
  954. case RH_CLEAR_FEATURE | RH_ENDPOINT:
  955. switch (wValue) {
  956. case (RH_ENDPOINT_STALL):
  957. OK(0);
  958. }
  959. break;
  960. case RH_CLEAR_FEATURE | RH_CLASS:
  961. switch (wValue) {
  962. case RH_C_HUB_LOCAL_POWER:
  963. OK(0);
  964. case (RH_C_HUB_OVER_CURRENT):
  965. WR_RH_STAT(RH_HS_OCIC);
  966. OK(0);
  967. }
  968. break;
  969. case RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS:
  970. switch (wValue) {
  971. case (RH_PORT_ENABLE):
  972. WR_RH_PORTSTAT(RH_PS_CCS);
  973. OK(0);
  974. case (RH_PORT_SUSPEND):
  975. WR_RH_PORTSTAT(RH_PS_POCI);
  976. OK(0);
  977. case (RH_PORT_POWER):
  978. WR_RH_PORTSTAT(RH_PS_LSDA);
  979. OK(0);
  980. case (RH_C_PORT_CONNECTION):
  981. WR_RH_PORTSTAT(RH_PS_CSC);
  982. OK(0);
  983. case (RH_C_PORT_ENABLE):
  984. WR_RH_PORTSTAT(RH_PS_PESC);
  985. OK(0);
  986. case (RH_C_PORT_SUSPEND):
  987. WR_RH_PORTSTAT(RH_PS_PSSC);
  988. OK(0);
  989. case (RH_C_PORT_OVER_CURRENT):
  990. WR_RH_PORTSTAT(RH_PS_OCIC);
  991. OK(0);
  992. case (RH_C_PORT_RESET):
  993. WR_RH_PORTSTAT(RH_PS_PRSC);
  994. OK(0);
  995. }
  996. break;
  997. case RH_SET_FEATURE | RH_OTHER | RH_CLASS:
  998. switch (wValue) {
  999. case (RH_PORT_SUSPEND):
  1000. WR_RH_PORTSTAT(RH_PS_PSS);
  1001. OK(0);
  1002. case (RH_PORT_RESET): /* BUG IN HUP CODE ******** */
  1003. if (RD_RH_PORTSTAT & RH_PS_CCS)
  1004. WR_RH_PORTSTAT(RH_PS_PRS);
  1005. OK(0);
  1006. case (RH_PORT_POWER):
  1007. WR_RH_PORTSTAT(RH_PS_PPS);
  1008. OK(0);
  1009. case (RH_PORT_ENABLE): /* BUG IN HUP CODE ******** */
  1010. if (RD_RH_PORTSTAT & RH_PS_CCS)
  1011. WR_RH_PORTSTAT(RH_PS_PES);
  1012. OK(0);
  1013. }
  1014. break;
  1015. case RH_SET_ADDRESS:
  1016. gohci.rh.devnum = wValue;
  1017. OK(0);
  1018. case RH_GET_DESCRIPTOR:
  1019. switch ((wValue & 0xff00) >> 8) {
  1020. case (0x01): /* device descriptor */
  1021. len = min_t(unsigned int,
  1022. leni,
  1023. min_t(unsigned int,
  1024. sizeof(root_hub_dev_des), wLength));
  1025. data_buf = root_hub_dev_des;
  1026. OK(len);
  1027. case (0x02): /* configuration descriptor */
  1028. len = min_t(unsigned int,
  1029. leni,
  1030. min_t(unsigned int,
  1031. sizeof(root_hub_config_des),
  1032. wLength));
  1033. data_buf = root_hub_config_des;
  1034. OK(len);
  1035. case (0x03): /* string descriptors */
  1036. if (wValue == 0x0300) {
  1037. len = min_t(unsigned int,
  1038. leni,
  1039. min_t(unsigned int,
  1040. sizeof(root_hub_str_index0),
  1041. wLength));
  1042. data_buf = root_hub_str_index0;
  1043. OK(len);
  1044. }
  1045. if (wValue == 0x0301) {
  1046. len = min_t(unsigned int,
  1047. leni,
  1048. min_t(unsigned int,
  1049. sizeof(root_hub_str_index1),
  1050. wLength));
  1051. data_buf = root_hub_str_index1;
  1052. OK(len);
  1053. }
  1054. default:
  1055. stat = USB_ST_STALLED;
  1056. }
  1057. break;
  1058. case RH_GET_DESCRIPTOR | RH_CLASS:
  1059. {
  1060. __u32 temp = roothub_a(&gohci);
  1061. data_buf[0] = 9; /* min length; */
  1062. data_buf[1] = 0x29;
  1063. data_buf[2] = temp & RH_A_NDP;
  1064. data_buf[3] = 0;
  1065. if (temp & RH_A_PSM)
  1066. /* per-port power switching? */
  1067. data_buf[3] |= 0x1;
  1068. if (temp & RH_A_NOCP)
  1069. /* no overcurrent reporting? */
  1070. data_buf[3] |= 0x10;
  1071. else if (temp & RH_A_OCPM)
  1072. /* per-port overcurrent reporting? */
  1073. data_buf[3] |= 0x8;
  1074. /* corresponds to data_buf[4-7] */
  1075. datab[1] = 0;
  1076. data_buf[5] = (temp & RH_A_POTPGT) >> 24;
  1077. temp = roothub_b(&gohci);
  1078. data_buf[7] = temp & RH_B_DR;
  1079. if (data_buf[2] < 7) {
  1080. data_buf[8] = 0xff;
  1081. } else {
  1082. data_buf[0] += 2;
  1083. data_buf[8] = (temp & RH_B_DR) >> 8;
  1084. data_buf[10] = data_buf[9] = 0xff;
  1085. }
  1086. len = min_t(unsigned int, leni,
  1087. min_t(unsigned int, data_buf[0], wLength));
  1088. OK(len);
  1089. }
  1090. case RH_GET_CONFIGURATION:
  1091. *(__u8 *) data_buf = 0x01;
  1092. OK(1);
  1093. case RH_SET_CONFIGURATION:
  1094. WR_RH_STAT(0x10000);
  1095. OK(0);
  1096. default:
  1097. dbg("unsupported root hub command");
  1098. stat = USB_ST_STALLED;
  1099. }
  1100. #ifdef DEBUG
  1101. ohci_dump_roothub(&gohci, 1);
  1102. #else
  1103. wait_ms(1);
  1104. #endif
  1105. len = min_t(int, len, leni);
  1106. if (data != data_buf)
  1107. memcpy(data, data_buf, len);
  1108. dev->act_len = len;
  1109. dev->status = stat;
  1110. #ifdef DEBUG
  1111. if (transfer_len)
  1112. urb_priv.actual_length = transfer_len;
  1113. pkt_print(dev, pipe, buffer, transfer_len, cmd, "RET(rh)",
  1114. 0 /*usb_pipein(pipe) */);
  1115. #else
  1116. wait_ms(1);
  1117. #endif
  1118. return stat;
  1119. }
  1120. /*-------------------------------------------------------------------------*/
  1121. /* common code for handling submit messages - used for all but root hub */
  1122. /* accesses. */
  1123. int submit_common_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
  1124. int transfer_len, struct devrequest *setup, int interval)
  1125. {
  1126. int stat = 0;
  1127. int maxsize = usb_maxpacket(dev, pipe);
  1128. int timeout;
  1129. /* device pulled? Shortcut the action. */
  1130. if (devgone == dev) {
  1131. dev->status = USB_ST_CRC_ERR;
  1132. return 0;
  1133. }
  1134. #ifdef DEBUG
  1135. urb_priv.actual_length = 0;
  1136. pkt_print(dev, pipe, buffer, transfer_len, setup, "SUB",
  1137. usb_pipein(pipe));
  1138. #else
  1139. wait_ms(1);
  1140. #endif
  1141. if (!maxsize) {
  1142. err("submit_common_message: pipesize for pipe %lx is zero",
  1143. pipe);
  1144. return -1;
  1145. }
  1146. if (sohci_submit_job(dev, pipe, buffer, transfer_len, setup, interval) <
  1147. 0) {
  1148. err("sohci_submit_job failed");
  1149. return -1;
  1150. }
  1151. wait_ms(10);
  1152. /* ohci_dump_status(&gohci); */
  1153. /* allow more time for a BULK device to react - some are slow */
  1154. #define BULK_TO 5000 /* timeout in milliseconds */
  1155. if (usb_pipebulk(pipe))
  1156. timeout = BULK_TO;
  1157. else
  1158. timeout = 100;
  1159. /* wait for it to complete */
  1160. for (;;) {
  1161. /* check whether the controller is done */
  1162. stat = hc_interrupt();
  1163. if (stat < 0) {
  1164. stat = USB_ST_CRC_ERR;
  1165. break;
  1166. }
  1167. /* NOTE: since we are not interrupt driven in U-Boot and always
  1168. * handle only one URB at a time, we cannot assume the
  1169. * transaction finished on the first successful return from
  1170. * hc_interrupt().. unless the flag for current URB is set,
  1171. * meaning that all TD's to/from device got actually
  1172. * transferred and processed. If the current URB is not
  1173. * finished we need to re-iterate this loop so as
  1174. * hc_interrupt() gets called again as there needs to be some
  1175. * more TD's to process still */
  1176. if ((stat >= 0) && (stat != 0xff) && (urb_finished)) {
  1177. /* 0xff is returned for an SF-interrupt */
  1178. break;
  1179. }
  1180. if (--timeout) {
  1181. wait_ms(1);
  1182. if (!urb_finished)
  1183. dbg("\%");
  1184. } else {
  1185. err("CTL:TIMEOUT ");
  1186. dbg("submit_common_msg: TO status %x\n", stat);
  1187. stat = USB_ST_CRC_ERR;
  1188. urb_finished = 1;
  1189. break;
  1190. }
  1191. }
  1192. #if 0
  1193. /* we got an Root Hub Status Change interrupt */
  1194. if (got_rhsc) {
  1195. #ifdef DEBUG
  1196. ohci_dump_roothub(&gohci, 1);
  1197. #endif
  1198. got_rhsc = 0;
  1199. /* abuse timeout */
  1200. timeout = rh_check_port_status(&gohci);
  1201. if (timeout >= 0) {
  1202. #if 0 /* this does nothing useful, but leave it here
  1203. in case that changes */
  1204. /* the called routine adds 1 to the passed value */
  1205. usb_hub_port_connect_change(gohci.rh.dev, timeout - 1);
  1206. #endif
  1207. /*
  1208. * XXX
  1209. * This is potentially dangerous because it assumes
  1210. * that only one device is ever plugged in!
  1211. */
  1212. devgone = dev;
  1213. }
  1214. }
  1215. #endif
  1216. dev->status = stat;
  1217. dev->act_len = transfer_len;
  1218. #ifdef DEBUG
  1219. pkt_print(dev, pipe, buffer, transfer_len, setup, "RET(ctlr)",
  1220. usb_pipein(pipe));
  1221. #else
  1222. wait_ms(1);
  1223. #endif
  1224. /* free TDs in urb_priv */
  1225. urb_free_priv(&urb_priv);
  1226. return 0;
  1227. }
  1228. /* submit routines called from usb.c */
  1229. int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
  1230. int transfer_len)
  1231. {
  1232. info("submit_bulk_msg");
  1233. return submit_common_msg(dev, pipe, buffer, transfer_len, NULL, 0);
  1234. }
  1235. int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
  1236. int transfer_len, struct devrequest *setup)
  1237. {
  1238. int maxsize = usb_maxpacket(dev, pipe);
  1239. info("submit_control_msg");
  1240. #ifdef DEBUG
  1241. urb_priv.actual_length = 0;
  1242. pkt_print(dev, pipe, buffer, transfer_len, setup, "SUB",
  1243. usb_pipein(pipe));
  1244. #else
  1245. wait_ms(1);
  1246. #endif
  1247. if (!maxsize) {
  1248. err("submit_control_message: pipesize for pipe %lx is zero",
  1249. pipe);
  1250. return -1;
  1251. }
  1252. if (((pipe >> 8) & 0x7f) == gohci.rh.devnum) {
  1253. gohci.rh.dev = dev;
  1254. /* root hub - redirect */
  1255. return ohci_submit_rh_msg(dev, pipe, buffer, transfer_len,
  1256. setup);
  1257. }
  1258. return submit_common_msg(dev, pipe, buffer, transfer_len, setup, 0);
  1259. }
  1260. int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
  1261. int transfer_len, int interval)
  1262. {
  1263. info("submit_int_msg");
  1264. return -1;
  1265. }
  1266. /*-------------------------------------------------------------------------*
  1267. * HC functions
  1268. *-------------------------------------------------------------------------*/
  1269. /* reset the HC and BUS */
  1270. static int hc_reset(struct ohci *ohci)
  1271. {
  1272. int timeout = 30;
  1273. int smm_timeout = 50; /* 0,5 sec */
  1274. if (readl(&ohci->regs->control) & OHCI_CTRL_IR) {
  1275. /* SMM owns the HC - request ownership */
  1276. writel(OHCI_OCR, &ohci->regs->cmdstatus);
  1277. info("USB HC TakeOver from SMM");
  1278. while (readl(&ohci->regs->control) & OHCI_CTRL_IR) {
  1279. wait_ms(10);
  1280. if (--smm_timeout == 0) {
  1281. err("USB HC TakeOver failed!");
  1282. return -1;
  1283. }
  1284. }
  1285. }
  1286. /* Disable HC interrupts */
  1287. writel(OHCI_INTR_MIE, &ohci->regs->intrdisable);
  1288. dbg("USB HC reset_hc usb-%s: ctrl = 0x%X ;",
  1289. ohci->slot_name, readl(&ohci->regs->control));
  1290. /* Reset USB (needed by some controllers) */
  1291. writel(0, &ohci->regs->control);
  1292. /* HC Reset requires max 10 us delay */
  1293. writel(OHCI_HCR, &ohci->regs->cmdstatus);
  1294. while ((readl(&ohci->regs->cmdstatus) & OHCI_HCR) != 0) {
  1295. if (--timeout == 0) {
  1296. err("USB HC reset timed out!");
  1297. return -1;
  1298. }
  1299. udelay(1);
  1300. }
  1301. return 0;
  1302. }
  1303. /*-------------------------------------------------------------------------*/
  1304. /* Start an OHCI controller, set the BUS operational
  1305. * enable interrupts
  1306. * connect the virtual root hub */
  1307. static int hc_start(struct ohci *ohci)
  1308. {
  1309. __u32 mask;
  1310. unsigned int fminterval;
  1311. ohci->disabled = 1;
  1312. /* Tell the controller where the control and bulk lists are
  1313. * The lists are empty now. */
  1314. writel(0, &ohci->regs->ed_controlhead);
  1315. writel(0, &ohci->regs->ed_bulkhead);
  1316. /* a reset clears this */
  1317. writel((__u32) ohci->hcca, &ohci->regs->hcca);
  1318. fminterval = 0x2edf;
  1319. writel((fminterval * 9) / 10, &ohci->regs->periodicstart);
  1320. fminterval |= ((((fminterval - 210) * 6) / 7) << 16);
  1321. writel(fminterval, &ohci->regs->fminterval);
  1322. writel(0x628, &ohci->regs->lsthresh);
  1323. /* start controller operations */
  1324. ohci->hc_control = OHCI_CONTROL_INIT | OHCI_USB_OPER;
  1325. ohci->disabled = 0;
  1326. writel(ohci->hc_control, &ohci->regs->control);
  1327. /* disable all interrupts */
  1328. mask = (OHCI_INTR_SO | OHCI_INTR_WDH | OHCI_INTR_SF | OHCI_INTR_RD |
  1329. OHCI_INTR_UE | OHCI_INTR_FNO | OHCI_INTR_RHSC |
  1330. OHCI_INTR_OC | OHCI_INTR_MIE);
  1331. writel(mask, &ohci->regs->intrdisable);
  1332. /* clear all interrupts */
  1333. mask &= ~OHCI_INTR_MIE;
  1334. writel(mask, &ohci->regs->intrstatus);
  1335. /* Choose the interrupts we care about now - but w/o MIE */
  1336. mask = OHCI_INTR_RHSC | OHCI_INTR_UE | OHCI_INTR_WDH | OHCI_INTR_SO;
  1337. writel(mask, &ohci->regs->intrenable);
  1338. #ifdef OHCI_USE_NPS
  1339. /* required for AMD-756 and some Mac platforms */
  1340. writel((roothub_a(ohci) | RH_A_NPS) & ~RH_A_PSM,
  1341. &ohci->regs->roothub.a);
  1342. writel(RH_HS_LPSC, &ohci->regs->roothub.status);
  1343. #endif /* OHCI_USE_NPS */
  1344. #define mdelay(n) ({unsigned long msec=(n); while (msec--) udelay(1000);})
  1345. /* POTPGT delay is bits 24-31, in 2 ms units. */
  1346. mdelay((roothub_a(ohci) >> 23) & 0x1fe);
  1347. /* connect the virtual root hub */
  1348. ohci->rh.devnum = 0;
  1349. return 0;
  1350. }
  1351. /*-------------------------------------------------------------------------*/
  1352. /* an interrupt happens */
  1353. static int hc_interrupt(void)
  1354. {
  1355. struct ohci *ohci = &gohci;
  1356. struct ohci_regs *regs = ohci->regs;
  1357. int ints;
  1358. int stat = -1;
  1359. if ((ohci->hcca->done_head != 0) &&
  1360. !(m32_swap(ohci->hcca->done_head) & 0x01)) {
  1361. ints = OHCI_INTR_WDH;
  1362. } else {
  1363. ints = readl(&regs->intrstatus);
  1364. if (ints == ~(u32) 0) {
  1365. ohci->disabled++;
  1366. err("%s device removed!", ohci->slot_name);
  1367. return -1;
  1368. }
  1369. ints &= readl(&regs->intrenable);
  1370. if (ints == 0) {
  1371. dbg("hc_interrupt: returning..\n");
  1372. return 0xff;
  1373. }
  1374. }
  1375. /* dbg("Interrupt: %x frame: %x", ints,
  1376. le16_to_cpu(ohci->hcca->frame_no)); */
  1377. if (ints & OHCI_INTR_RHSC) {
  1378. got_rhsc = 1;
  1379. stat = 0xff;
  1380. }
  1381. if (ints & OHCI_INTR_UE) {
  1382. ohci->disabled++;
  1383. err("OHCI Unrecoverable Error, controller usb-%s disabled",
  1384. ohci->slot_name);
  1385. /* e.g. due to PCI Master/Target Abort */
  1386. #ifdef DEBUG
  1387. ohci_dump(ohci, 1);
  1388. #else
  1389. wait_ms(1);
  1390. #endif
  1391. /* FIXME: be optimistic, hope that bug won't repeat often. */
  1392. /* Make some non-interrupt context restart the controller. */
  1393. /* Count and limit the retries though; either hardware or */
  1394. /* software errors can go forever... */
  1395. hc_reset(ohci);
  1396. return -1;
  1397. }
  1398. if (ints & OHCI_INTR_WDH) {
  1399. wait_ms(1);
  1400. writel(OHCI_INTR_WDH, &regs->intrdisable);
  1401. stat = dl_done_list(&gohci, dl_reverse_done_list(&gohci));
  1402. writel(OHCI_INTR_WDH, &regs->intrenable);
  1403. }
  1404. if (ints & OHCI_INTR_SO) {
  1405. dbg("USB Schedule overrun\n");
  1406. writel(OHCI_INTR_SO, &regs->intrenable);
  1407. stat = -1;
  1408. }
  1409. /* FIXME: this assumes SOF (1/ms) interrupts don't get lost... */
  1410. if (ints & OHCI_INTR_SF) {
  1411. unsigned int frame = m16_swap(ohci->hcca->frame_no) & 1;
  1412. wait_ms(1);
  1413. writel(OHCI_INTR_SF, &regs->intrdisable);
  1414. if (ohci->ed_rm_list[frame] != NULL)
  1415. writel(OHCI_INTR_SF, &regs->intrenable);
  1416. stat = 0xff;
  1417. }
  1418. writel(ints, &regs->intrstatus);
  1419. return stat;
  1420. }
  1421. /*-------------------------------------------------------------------------*/
  1422. /*-------------------------------------------------------------------------*/
  1423. /* De-allocate all resources.. */
  1424. static void hc_release_ohci(struct ohci *ohci)
  1425. {
  1426. dbg("USB HC release ohci usb-%s", ohci->slot_name);
  1427. if (!ohci->disabled)
  1428. hc_reset(ohci);
  1429. }
  1430. /*-------------------------------------------------------------------------*/
  1431. /*
  1432. * low level initalisation routine, called from usb.c
  1433. */
  1434. static char ohci_inited = 0;
  1435. int usb_lowlevel_init(void)
  1436. {
  1437. struct s3c24x0_clock_power *clk_power = s3c24x0_get_base_clock_power();
  1438. struct s3c24x0_gpio *gpio = s3c24x0_get_base_gpio();
  1439. /*
  1440. * Set the 48 MHz UPLL clocking. Values are taken from
  1441. * "PLL value selection guide", 6-23, s3c2400_UM.pdf.
  1442. */
  1443. clk_power->UPLLCON = ((40 << 12) + (1 << 4) + 2);
  1444. gpio->MISCCR |= 0x8; /* 1 = use pads related USB for USB host */
  1445. /*
  1446. * Enable USB host clock.
  1447. */
  1448. clk_power->CLKCON |= (1 << 4);
  1449. memset(&gohci, 0, sizeof(struct ohci));
  1450. memset(&urb_priv, 0, sizeof(struct urb_priv));
  1451. /* align the storage */
  1452. if ((__u32) &ghcca[0] & 0xff) {
  1453. err("HCCA not aligned!!");
  1454. return -1;
  1455. }
  1456. phcca = &ghcca[0];
  1457. info("aligned ghcca %p", phcca);
  1458. memset(&ohci_dev, 0, sizeof(struct ohci_device));
  1459. if ((__u32) &ohci_dev.ed[0] & 0x7) {
  1460. err("EDs not aligned!!");
  1461. return -1;
  1462. }
  1463. memset(gtd, 0, sizeof(struct td) * (NUM_TD + 1));
  1464. if ((__u32) gtd & 0x7) {
  1465. err("TDs not aligned!!");
  1466. return -1;
  1467. }
  1468. ptd = gtd;
  1469. gohci.hcca = phcca;
  1470. memset(phcca, 0, sizeof(struct ohci_hcca));
  1471. gohci.disabled = 1;
  1472. gohci.sleeping = 0;
  1473. gohci.irq = -1;
  1474. gohci.regs = (struct ohci_regs *)S3C24X0_USB_HOST_BASE;
  1475. gohci.flags = 0;
  1476. gohci.slot_name = "s3c2400";
  1477. if (hc_reset(&gohci) < 0) {
  1478. hc_release_ohci(&gohci);
  1479. /* Initialization failed */
  1480. clk_power->CLKCON &= ~(1 << 4);
  1481. return -1;
  1482. }
  1483. /* FIXME this is a second HC reset; why?? */
  1484. gohci.hc_control = OHCI_USB_RESET;
  1485. writel(gohci.hc_control, &gohci.regs->control);
  1486. wait_ms(10);
  1487. if (hc_start(&gohci) < 0) {
  1488. err("can't start usb-%s", gohci.slot_name);
  1489. hc_release_ohci(&gohci);
  1490. /* Initialization failed */
  1491. clk_power->CLKCON &= ~(1 << 4);
  1492. return -1;
  1493. }
  1494. #ifdef DEBUG
  1495. ohci_dump(&gohci, 1);
  1496. #else
  1497. wait_ms(1);
  1498. #endif
  1499. ohci_inited = 1;
  1500. urb_finished = 1;
  1501. return 0;
  1502. }
  1503. int usb_lowlevel_stop(void)
  1504. {
  1505. struct s3c24x0_clock_power *clk_power = s3c24x0_get_base_clock_power();
  1506. /* this gets called really early - before the controller has */
  1507. /* even been initialized! */
  1508. if (!ohci_inited)
  1509. return 0;
  1510. /* TODO release any interrupts, etc. */
  1511. /* call hc_release_ohci() here ? */
  1512. hc_reset(&gohci);
  1513. /* may not want to do this */
  1514. clk_power->CLKCON &= ~(1 << 4);
  1515. return 0;
  1516. }
  1517. #endif /* defined(CONFIG_USB_OHCI) && defined(CONFIG_S3C24X0) */