reset.c 2.1 KB

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  1. /*
  2. * (C) Copyright 2002
  3. * Lineo, Inc. <www.lineo.com>
  4. * Bernhard Kuhn <bkuhn@lineo.com>
  5. *
  6. * (C) Copyright 2002
  7. * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
  8. * Marius Groeger <mgroeger@sysgo.de>
  9. *
  10. * (C) Copyright 2002
  11. * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
  12. * Alex Zuepke <azu@sysgo.de>
  13. *
  14. * See file CREDITS for list of people who contributed to this
  15. * project.
  16. *
  17. * This program is free software; you can redistribute it and/or
  18. * modify it under the terms of the GNU General Public License as
  19. * published by the Free Software Foundation; either version 2 of
  20. * the License, or (at your option) any later version.
  21. *
  22. * This program is distributed in the hope that it will be useful,
  23. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  24. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  25. * GNU General Public License for more details.
  26. *
  27. * You should have received a copy of the GNU General Public License
  28. * along with this program; if not, write to the Free Software
  29. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  30. * MA 02111-1307 USA
  31. */
  32. #include <common.h>
  33. #include <asm/arch/hardware.h>
  34. void board_reset(void) __attribute__((__weak__));
  35. /*
  36. * Reset the cpu by setting up the watchdog timer and let him time out
  37. * or toggle a GPIO pin on the AT91RM9200DK board
  38. */
  39. void reset_cpu (ulong ignored)
  40. {
  41. #if defined(CONFIG_AT91RM9200_USART)
  42. /*shutdown the console to avoid strange chars during reset */
  43. serial_exit();
  44. #endif
  45. if (board_reset)
  46. board_reset();
  47. /* this is the way Linux does it */
  48. /* FIXME:
  49. * These defines should be moved into
  50. * include/asm-arm/arch-at91rm9200/AT91RM9200.h
  51. * as soon as the whitespace fix gets applied.
  52. */
  53. #define AT91C_ST_RSTEN (0x1 << 16)
  54. #define AT91C_ST_EXTEN (0x1 << 17)
  55. #define AT91C_ST_WDRST (0x1 << 0)
  56. #define ST_WDMR *((unsigned long *)0xfffffd08) /* watchdog mode register */
  57. #define ST_CR *((unsigned long *)0xfffffd00) /* system clock control register */
  58. ST_WDMR = AT91C_ST_RSTEN | AT91C_ST_EXTEN | 1 ;
  59. ST_CR = AT91C_ST_WDRST;
  60. while (1);
  61. /* Never reached */
  62. }