cpu.c 1.7 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768
  1. /*
  2. * (C) Copyright 2004 Texas Insturments
  3. *
  4. * (C) Copyright 2002
  5. * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
  6. * Marius Groeger <mgroeger@sysgo.de>
  7. *
  8. * (C) Copyright 2002
  9. * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
  10. *
  11. * See file CREDITS for list of people who contributed to this
  12. * project.
  13. *
  14. * This program is free software; you can redistribute it and/or
  15. * modify it under the terms of the GNU General Public License as
  16. * published by the Free Software Foundation; either version 2 of
  17. * the License, or (at your option) any later version.
  18. *
  19. * This program is distributed in the hope that it will be useful,
  20. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  21. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  22. * GNU General Public License for more details.
  23. *
  24. * You should have received a copy of the GNU General Public License
  25. * along with this program; if not, write to the Free Software
  26. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  27. * MA 02111-1307 USA
  28. */
  29. /*
  30. * CPU specific code
  31. */
  32. #include <common.h>
  33. #include <command.h>
  34. #include <s3c6400.h>
  35. #include <asm/system.h>
  36. static void cache_flush (void);
  37. int cleanup_before_linux (void)
  38. {
  39. /*
  40. * this function is called just before we call linux
  41. * it prepares the processor for linux
  42. *
  43. * we turn off caches etc ...
  44. */
  45. disable_interrupts ();
  46. /* turn off I/D-cache */
  47. icache_disable();
  48. dcache_disable();
  49. /* flush I/D-cache */
  50. cache_flush();
  51. return 0;
  52. }
  53. /* flush I/D-cache */
  54. static void cache_flush (void)
  55. {
  56. /* invalidate both caches and flush btb */
  57. asm ("mcr p15, 0, %0, c7, c7, 0": :"r" (0));
  58. /* mem barrier to sync things */
  59. asm ("mcr p15, 0, %0, c7, c10, 4": :"r" (0));
  60. }