cpu.c 6.0 KB

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  1. /*
  2. * (C) Copyright 2008-2011
  3. * Graeme Russ, <graeme.russ@gmail.com>
  4. *
  5. * (C) Copyright 2002
  6. * Daniel Engström, Omicron Ceti AB, <daniel@omicron.se>
  7. *
  8. * (C) Copyright 2002
  9. * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
  10. * Marius Groeger <mgroeger@sysgo.de>
  11. *
  12. * (C) Copyright 2002
  13. * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
  14. * Alex Zuepke <azu@sysgo.de>
  15. *
  16. * See file CREDITS for list of people who contributed to this
  17. * project.
  18. *
  19. * This program is free software; you can redistribute it and/or
  20. * modify it under the terms of the GNU General Public License as
  21. * published by the Free Software Foundation; either version 2 of
  22. * the License, or (at your option) any later version.
  23. *
  24. * This program is distributed in the hope that it will be useful,
  25. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  26. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  27. * GNU General Public License for more details.
  28. *
  29. * You should have received a copy of the GNU General Public License
  30. * along with this program; if not, write to the Free Software
  31. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  32. * MA 02111-1307 USA
  33. */
  34. #include <common.h>
  35. #include <command.h>
  36. #include <asm/control_regs.h>
  37. #include <asm/processor.h>
  38. #include <asm/processor-flags.h>
  39. #include <asm/interrupt.h>
  40. #include <linux/compiler.h>
  41. /*
  42. * Constructor for a conventional segment GDT (or LDT) entry
  43. * This is a macro so it can be used in initialisers
  44. */
  45. #define GDT_ENTRY(flags, base, limit) \
  46. ((((base) & 0xff000000ULL) << (56-24)) | \
  47. (((flags) & 0x0000f0ffULL) << 40) | \
  48. (((limit) & 0x000f0000ULL) << (48-16)) | \
  49. (((base) & 0x00ffffffULL) << 16) | \
  50. (((limit) & 0x0000ffffULL)))
  51. struct gdt_ptr {
  52. u16 len;
  53. u32 ptr;
  54. } __packed;
  55. static void load_ds(u32 segment)
  56. {
  57. asm volatile("movl %0, %%ds" : : "r" (segment * X86_GDT_ENTRY_SIZE));
  58. }
  59. static void load_es(u32 segment)
  60. {
  61. asm volatile("movl %0, %%es" : : "r" (segment * X86_GDT_ENTRY_SIZE));
  62. }
  63. static void load_fs(u32 segment)
  64. {
  65. asm volatile("movl %0, %%fs" : : "r" (segment * X86_GDT_ENTRY_SIZE));
  66. }
  67. static void load_gs(u32 segment)
  68. {
  69. asm volatile("movl %0, %%gs" : : "r" (segment * X86_GDT_ENTRY_SIZE));
  70. }
  71. static void load_ss(u32 segment)
  72. {
  73. asm volatile("movl %0, %%ss" : : "r" (segment * X86_GDT_ENTRY_SIZE));
  74. }
  75. static void load_gdt(const u64 *boot_gdt, u16 num_entries)
  76. {
  77. struct gdt_ptr gdt;
  78. gdt.len = (num_entries * 8) - 1;
  79. gdt.ptr = (u32)boot_gdt;
  80. asm volatile("lgdtl %0\n" : : "m" (gdt));
  81. }
  82. void setup_gdt(gd_t *id, u64 *gdt_addr)
  83. {
  84. /* CS: code, read/execute, 4 GB, base 0 */
  85. gdt_addr[X86_GDT_ENTRY_32BIT_CS] = GDT_ENTRY(0xc09b, 0, 0xfffff);
  86. /* DS: data, read/write, 4 GB, base 0 */
  87. gdt_addr[X86_GDT_ENTRY_32BIT_DS] = GDT_ENTRY(0xc093, 0, 0xfffff);
  88. /* FS: data, read/write, 4 GB, base (Global Data Pointer) */
  89. id->arch.gd_addr = id;
  90. gdt_addr[X86_GDT_ENTRY_32BIT_FS] = GDT_ENTRY(0xc093,
  91. (ulong)&id->arch.gd_addr, 0xfffff);
  92. /* 16-bit CS: code, read/execute, 64 kB, base 0 */
  93. gdt_addr[X86_GDT_ENTRY_16BIT_CS] = GDT_ENTRY(0x109b, 0, 0x0ffff);
  94. /* 16-bit DS: data, read/write, 64 kB, base 0 */
  95. gdt_addr[X86_GDT_ENTRY_16BIT_DS] = GDT_ENTRY(0x1093, 0, 0x0ffff);
  96. load_gdt(gdt_addr, X86_GDT_NUM_ENTRIES);
  97. load_ds(X86_GDT_ENTRY_32BIT_DS);
  98. load_es(X86_GDT_ENTRY_32BIT_DS);
  99. load_gs(X86_GDT_ENTRY_32BIT_DS);
  100. load_ss(X86_GDT_ENTRY_32BIT_DS);
  101. load_fs(X86_GDT_ENTRY_32BIT_FS);
  102. }
  103. int __weak x86_cleanup_before_linux(void)
  104. {
  105. #ifdef CONFIG_BOOTSTAGE_STASH
  106. bootstage_stash((void *)CONFIG_BOOTSTAGE_STASH,
  107. CONFIG_BOOTSTAGE_STASH_SIZE);
  108. #endif
  109. return 0;
  110. }
  111. int x86_cpu_init_f(void)
  112. {
  113. const u32 em_rst = ~X86_CR0_EM;
  114. const u32 mp_ne_set = X86_CR0_MP | X86_CR0_NE;
  115. /* initialize FPU, reset EM, set MP and NE */
  116. asm ("fninit\n" \
  117. "movl %%cr0, %%eax\n" \
  118. "andl %0, %%eax\n" \
  119. "orl %1, %%eax\n" \
  120. "movl %%eax, %%cr0\n" \
  121. : : "i" (em_rst), "i" (mp_ne_set) : "eax");
  122. return 0;
  123. }
  124. int cpu_init_f(void) __attribute__((weak, alias("x86_cpu_init_f")));
  125. int x86_cpu_init_r(void)
  126. {
  127. /* Initialize core interrupt and exception functionality of CPU */
  128. cpu_init_interrupts();
  129. return 0;
  130. }
  131. int cpu_init_r(void) __attribute__((weak, alias("x86_cpu_init_r")));
  132. void x86_enable_caches(void)
  133. {
  134. unsigned long cr0;
  135. cr0 = read_cr0();
  136. cr0 &= ~(X86_CR0_NW | X86_CR0_CD);
  137. write_cr0(cr0);
  138. wbinvd();
  139. }
  140. void enable_caches(void) __attribute__((weak, alias("x86_enable_caches")));
  141. void x86_disable_caches(void)
  142. {
  143. unsigned long cr0;
  144. cr0 = read_cr0();
  145. cr0 |= X86_CR0_NW | X86_CR0_CD;
  146. wbinvd();
  147. write_cr0(cr0);
  148. wbinvd();
  149. }
  150. void disable_caches(void) __attribute__((weak, alias("x86_disable_caches")));
  151. int x86_init_cache(void)
  152. {
  153. enable_caches();
  154. return 0;
  155. }
  156. int init_cache(void) __attribute__((weak, alias("x86_init_cache")));
  157. int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
  158. {
  159. printf("resetting ...\n");
  160. /* wait 50 ms */
  161. udelay(50000);
  162. disable_interrupts();
  163. reset_cpu(0);
  164. /*NOTREACHED*/
  165. return 0;
  166. }
  167. void flush_cache(unsigned long dummy1, unsigned long dummy2)
  168. {
  169. asm("wbinvd\n");
  170. }
  171. void __attribute__ ((regparm(0))) generate_gpf(void);
  172. /* segment 0x70 is an arbitrary segment which does not exist */
  173. asm(".globl generate_gpf\n"
  174. ".hidden generate_gpf\n"
  175. ".type generate_gpf, @function\n"
  176. "generate_gpf:\n"
  177. "ljmp $0x70, $0x47114711\n");
  178. void __reset_cpu(ulong addr)
  179. {
  180. printf("Resetting using x86 Triple Fault\n");
  181. set_vector(13, generate_gpf); /* general protection fault handler */
  182. set_vector(8, generate_gpf); /* double fault handler */
  183. generate_gpf(); /* start the show */
  184. }
  185. void reset_cpu(ulong addr) __attribute__((weak, alias("__reset_cpu")));
  186. int dcache_status(void)
  187. {
  188. return !(read_cr0() & 0x40000000);
  189. }
  190. /* Define these functions to allow ehch-hcd to function */
  191. void flush_dcache_range(unsigned long start, unsigned long stop)
  192. {
  193. }
  194. void invalidate_dcache_range(unsigned long start, unsigned long stop)
  195. {
  196. }
  197. void dcache_enable(void)
  198. {
  199. enable_caches();
  200. }
  201. void dcache_disable(void)
  202. {
  203. disable_caches();
  204. }
  205. void icache_enable(void)
  206. {
  207. }
  208. void icache_disable(void)
  209. {
  210. }
  211. int icache_status(void)
  212. {
  213. return 1;
  214. }