omap3_mmc.c 14 KB

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  1. /*
  2. * (C) Copyright 2008
  3. * Texas Instruments, <www.ti.com>
  4. * Syed Mohammed Khasim <khasim@ti.com>
  5. *
  6. * See file CREDITS for list of people who contributed to this
  7. * project.
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License as
  11. * published by the Free Software Foundation's version 2 of
  12. * the License.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  22. * MA 02111-1307 USA
  23. */
  24. #include <config.h>
  25. #include <common.h>
  26. #include <fat.h>
  27. #include <mmc.h>
  28. #include <part.h>
  29. #include <i2c.h>
  30. #include <asm/io.h>
  31. #include <asm/arch/mmc.h>
  32. const unsigned short mmc_transspeed_val[15][4] = {
  33. {CLKD(10, 1), CLKD(10, 10), CLKD(10, 100), CLKD(10, 1000)},
  34. {CLKD(12, 1), CLKD(12, 10), CLKD(12, 100), CLKD(12, 1000)},
  35. {CLKD(13, 1), CLKD(13, 10), CLKD(13, 100), CLKD(13, 1000)},
  36. {CLKD(15, 1), CLKD(15, 10), CLKD(15, 100), CLKD(15, 1000)},
  37. {CLKD(20, 1), CLKD(20, 10), CLKD(20, 100), CLKD(20, 1000)},
  38. {CLKD(26, 1), CLKD(26, 10), CLKD(26, 100), CLKD(26, 1000)},
  39. {CLKD(30, 1), CLKD(30, 10), CLKD(30, 100), CLKD(30, 1000)},
  40. {CLKD(35, 1), CLKD(35, 10), CLKD(35, 100), CLKD(35, 1000)},
  41. {CLKD(40, 1), CLKD(40, 10), CLKD(40, 100), CLKD(40, 1000)},
  42. {CLKD(45, 1), CLKD(45, 10), CLKD(45, 100), CLKD(45, 1000)},
  43. {CLKD(52, 1), CLKD(52, 10), CLKD(52, 100), CLKD(52, 1000)},
  44. {CLKD(55, 1), CLKD(55, 10), CLKD(55, 100), CLKD(55, 1000)},
  45. {CLKD(60, 1), CLKD(60, 10), CLKD(60, 100), CLKD(60, 1000)},
  46. {CLKD(70, 1), CLKD(70, 10), CLKD(70, 100), CLKD(70, 1000)},
  47. {CLKD(80, 1), CLKD(80, 10), CLKD(80, 100), CLKD(80, 1000)}
  48. };
  49. mmc_card_data cur_card_data;
  50. static block_dev_desc_t mmc_blk_dev;
  51. static hsmmc_t *mmc_base = (hsmmc_t *)OMAP_HSMMC_BASE;
  52. block_dev_desc_t *mmc_get_dev(int dev)
  53. {
  54. return (block_dev_desc_t *) &mmc_blk_dev;
  55. }
  56. void twl4030_mmc_config(void)
  57. {
  58. unsigned char data;
  59. data = DEV_GRP_P1;
  60. i2c_write(PWRMGT_ADDR_ID4, VMMC1_DEV_GRP, 1, &data, 1);
  61. data = VMMC1_VSEL_30;
  62. i2c_write(PWRMGT_ADDR_ID4, VMMC1_DEDICATED, 1, &data, 1);
  63. }
  64. unsigned char mmc_board_init(void)
  65. {
  66. t2_t *t2_base = (t2_t *)T2_BASE;
  67. twl4030_mmc_config();
  68. writel(readl(&t2_base->pbias_lite) | PBIASLITEPWRDNZ1 |
  69. PBIASSPEEDCTRL0 | PBIASLITEPWRDNZ0,
  70. &t2_base->pbias_lite);
  71. writel(readl(&t2_base->devconf0) | MMCSDIO1ADPCLKISEL,
  72. &t2_base->devconf0);
  73. return 1;
  74. }
  75. void mmc_init_stream(void)
  76. {
  77. writel(readl(&mmc_base->con) | INIT_INITSTREAM, &mmc_base->con);
  78. writel(MMC_CMD0, &mmc_base->cmd);
  79. while (!(readl(&mmc_base->stat) & CC_MASK));
  80. writel(CC_MASK, &mmc_base->stat);
  81. writel(MMC_CMD0, &mmc_base->cmd);
  82. while (!(readl(&mmc_base->stat) & CC_MASK));
  83. writel(readl(&mmc_base->con) & ~INIT_INITSTREAM, &mmc_base->con);
  84. }
  85. unsigned char mmc_clock_config(unsigned int iclk, unsigned short clk_div)
  86. {
  87. unsigned int val;
  88. mmc_reg_out(&mmc_base->sysctl, (ICE_MASK | DTO_MASK | CEN_MASK),
  89. (ICE_STOP | DTO_15THDTO | CEN_DISABLE));
  90. switch (iclk) {
  91. case CLK_INITSEQ:
  92. val = MMC_INIT_SEQ_CLK / 2;
  93. break;
  94. case CLK_400KHZ:
  95. val = MMC_400kHz_CLK;
  96. break;
  97. case CLK_MISC:
  98. val = clk_div;
  99. break;
  100. default:
  101. return 0;
  102. }
  103. mmc_reg_out(&mmc_base->sysctl, ICE_MASK | CLKD_MASK,
  104. (val << CLKD_OFFSET) | ICE_OSCILLATE);
  105. while ((readl(&mmc_base->sysctl) & ICS_MASK) == ICS_NOTREADY);
  106. writel(readl(&mmc_base->sysctl) | CEN_ENABLE, &mmc_base->sysctl);
  107. return 1;
  108. }
  109. unsigned char mmc_init_setup(void)
  110. {
  111. unsigned int reg_val;
  112. mmc_board_init();
  113. writel(readl(&mmc_base->sysconfig) | MMC_SOFTRESET,
  114. &mmc_base->sysconfig);
  115. while ((readl(&mmc_base->sysstatus) & RESETDONE) == 0);
  116. writel(readl(&mmc_base->sysctl) | SOFTRESETALL, &mmc_base->sysctl);
  117. while ((readl(&mmc_base->sysctl) & SOFTRESETALL) != 0x0);
  118. writel(DTW_1_BITMODE | SDBP_PWROFF | SDVS_3V0, &mmc_base->hctl);
  119. writel(readl(&mmc_base->capa) | VS30_3V0SUP | VS18_1V8SUP,
  120. &mmc_base->capa);
  121. reg_val = readl(&mmc_base->con) & RESERVED_MASK;
  122. writel(CTPL_MMC_SD | reg_val | WPP_ACTIVEHIGH | CDP_ACTIVEHIGH |
  123. MIT_CTO | DW8_1_4BITMODE | MODE_FUNC | STR_BLOCK |
  124. HR_NOHOSTRESP | INIT_NOINIT | NOOPENDRAIN, &mmc_base->con);
  125. mmc_clock_config(CLK_INITSEQ, 0);
  126. writel(readl(&mmc_base->hctl) | SDBP_PWRON, &mmc_base->hctl);
  127. writel(IE_BADA | IE_CERR | IE_DEB | IE_DCRC | IE_DTO | IE_CIE |
  128. IE_CEB | IE_CCRC | IE_CTO | IE_BRR | IE_BWR | IE_TC | IE_CC,
  129. &mmc_base->ie);
  130. mmc_init_stream();
  131. return 1;
  132. }
  133. unsigned char mmc_send_cmd(unsigned int cmd, unsigned int arg,
  134. unsigned int *response)
  135. {
  136. unsigned int mmc_stat;
  137. while ((readl(&mmc_base->pstate) & DATI_MASK) == DATI_CMDDIS);
  138. writel(BLEN_512BYTESLEN | NBLK_STPCNT, &mmc_base->blk);
  139. writel(0xFFFFFFFF, &mmc_base->stat);
  140. writel(arg, &mmc_base->arg);
  141. writel(cmd | CMD_TYPE_NORMAL | CICE_NOCHECK | CCCE_NOCHECK |
  142. MSBS_SGLEBLK | ACEN_DISABLE | BCE_DISABLE | DE_DISABLE,
  143. &mmc_base->cmd);
  144. while (1) {
  145. do {
  146. mmc_stat = readl(&mmc_base->stat);
  147. } while (mmc_stat == 0);
  148. if ((mmc_stat & ERRI_MASK) != 0)
  149. return (unsigned char) mmc_stat;
  150. if (mmc_stat & CC_MASK) {
  151. writel(CC_MASK, &mmc_base->stat);
  152. response[0] = readl(&mmc_base->rsp10);
  153. if ((cmd & RSP_TYPE_MASK) == RSP_TYPE_LGHT136) {
  154. response[1] = readl(&mmc_base->rsp32);
  155. response[2] = readl(&mmc_base->rsp54);
  156. response[3] = readl(&mmc_base->rsp76);
  157. }
  158. break;
  159. }
  160. }
  161. return 1;
  162. }
  163. unsigned char mmc_read_data(unsigned int *output_buf)
  164. {
  165. unsigned int mmc_stat;
  166. unsigned int read_count = 0;
  167. /*
  168. * Start Polled Read
  169. */
  170. while (1) {
  171. do {
  172. mmc_stat = readl(&mmc_base->stat);
  173. } while (mmc_stat == 0);
  174. if ((mmc_stat & ERRI_MASK) != 0)
  175. return (unsigned char) mmc_stat;
  176. if (mmc_stat & BRR_MASK) {
  177. unsigned int k;
  178. writel(readl(&mmc_base->stat) | BRR_MASK,
  179. &mmc_base->stat);
  180. for (k = 0; k < MMCSD_SECTOR_SIZE / 4; k++) {
  181. *output_buf = readl(&mmc_base->data);
  182. output_buf++;
  183. read_count += 4;
  184. }
  185. }
  186. if (mmc_stat & BWR_MASK)
  187. writel(readl(&mmc_base->stat) | BWR_MASK,
  188. &mmc_base->stat);
  189. if (mmc_stat & TC_MASK) {
  190. writel(readl(&mmc_base->stat) | TC_MASK,
  191. &mmc_base->stat);
  192. break;
  193. }
  194. }
  195. return 1;
  196. }
  197. unsigned char mmc_detect_card(mmc_card_data *mmc_card_cur)
  198. {
  199. unsigned char err;
  200. unsigned int argument = 0;
  201. unsigned int ocr_value, ocr_recvd, ret_cmd41, hcs_val;
  202. unsigned int resp[4];
  203. unsigned short retry_cnt = 2000;
  204. /* Set to Initialization Clock */
  205. err = mmc_clock_config(CLK_400KHZ, 0);
  206. if (err != 1)
  207. return err;
  208. mmc_card_cur->RCA = MMC_RELATIVE_CARD_ADDRESS;
  209. argument = 0x00000000;
  210. ocr_value = (0x1FF << 15);
  211. err = mmc_send_cmd(MMC_CMD0, argument, resp);
  212. if (err != 1)
  213. return err;
  214. argument = SD_CMD8_CHECK_PATTERN | SD_CMD8_2_7_3_6_V_RANGE;
  215. err = mmc_send_cmd(MMC_SDCMD8, argument, resp);
  216. hcs_val = (err == 1) ?
  217. MMC_OCR_REG_HOST_CAPACITY_SUPPORT_SECTOR :
  218. MMC_OCR_REG_HOST_CAPACITY_SUPPORT_BYTE;
  219. argument = 0x0000 << 16;
  220. err = mmc_send_cmd(MMC_CMD55, argument, resp);
  221. if (err == 1) {
  222. mmc_card_cur->card_type = SD_CARD;
  223. ocr_value |= hcs_val;
  224. ret_cmd41 = MMC_ACMD41;
  225. } else {
  226. mmc_card_cur->card_type = MMC_CARD;
  227. ocr_value |= MMC_OCR_REG_ACCESS_MODE_SECTOR;
  228. ret_cmd41 = MMC_CMD1;
  229. writel(readl(&mmc_base->con) & ~OD, &mmc_base->con);
  230. writel(readl(&mmc_base->con) | OPENDRAIN, &mmc_base->con);
  231. }
  232. argument = ocr_value;
  233. err = mmc_send_cmd(ret_cmd41, argument, resp);
  234. if (err != 1)
  235. return err;
  236. ocr_recvd = ((mmc_resp_r3 *) resp)->ocr;
  237. while (!(ocr_recvd & (0x1 << 31)) && (retry_cnt > 0)) {
  238. retry_cnt--;
  239. if (mmc_card_cur->card_type == SD_CARD) {
  240. argument = 0x0000 << 16;
  241. err = mmc_send_cmd(MMC_CMD55, argument, resp);
  242. }
  243. argument = ocr_value;
  244. err = mmc_send_cmd(ret_cmd41, argument, resp);
  245. if (err != 1)
  246. return err;
  247. ocr_recvd = ((mmc_resp_r3 *) resp)->ocr;
  248. }
  249. if (!(ocr_recvd & (0x1 << 31)))
  250. return 0;
  251. if (mmc_card_cur->card_type == MMC_CARD) {
  252. if ((ocr_recvd & MMC_OCR_REG_ACCESS_MODE_MASK) ==
  253. MMC_OCR_REG_ACCESS_MODE_SECTOR) {
  254. mmc_card_cur->mode = SECTOR_MODE;
  255. } else {
  256. mmc_card_cur->mode = BYTE_MODE;
  257. }
  258. ocr_recvd &= ~MMC_OCR_REG_ACCESS_MODE_MASK;
  259. } else {
  260. if ((ocr_recvd & MMC_OCR_REG_HOST_CAPACITY_SUPPORT_MASK)
  261. == MMC_OCR_REG_HOST_CAPACITY_SUPPORT_SECTOR) {
  262. mmc_card_cur->mode = SECTOR_MODE;
  263. } else {
  264. mmc_card_cur->mode = BYTE_MODE;
  265. }
  266. ocr_recvd &= ~MMC_OCR_REG_HOST_CAPACITY_SUPPORT_MASK;
  267. }
  268. ocr_recvd &= ~(0x1 << 31);
  269. if (!(ocr_recvd & ocr_value))
  270. return 0;
  271. err = mmc_send_cmd(MMC_CMD2, argument, resp);
  272. if (err != 1)
  273. return err;
  274. if (mmc_card_cur->card_type == MMC_CARD) {
  275. argument = mmc_card_cur->RCA << 16;
  276. err = mmc_send_cmd(MMC_CMD3, argument, resp);
  277. if (err != 1)
  278. return err;
  279. } else {
  280. argument = 0x00000000;
  281. err = mmc_send_cmd(MMC_SDCMD3, argument, resp);
  282. if (err != 1)
  283. return err;
  284. mmc_card_cur->RCA = ((mmc_resp_r6 *) resp)->newpublishedrca;
  285. }
  286. writel(readl(&mmc_base->con) & ~OD, &mmc_base->con);
  287. writel(readl(&mmc_base->con) | NOOPENDRAIN, &mmc_base->con);
  288. return 1;
  289. }
  290. unsigned char mmc_read_cardsize(mmc_card_data *mmc_dev_data,
  291. mmc_csd_reg_t *cur_csd)
  292. {
  293. mmc_extended_csd_reg_t ext_csd;
  294. unsigned int size, count, blk_len, blk_no, card_size, argument;
  295. unsigned char err;
  296. unsigned int resp[4];
  297. if (mmc_dev_data->mode == SECTOR_MODE) {
  298. if (mmc_dev_data->card_type == SD_CARD) {
  299. card_size =
  300. (((mmc_sd2_csd_reg_t *) cur_csd)->
  301. c_size_lsb & MMC_SD2_CSD_C_SIZE_LSB_MASK) |
  302. ((((mmc_sd2_csd_reg_t *) cur_csd)->
  303. c_size_msb & MMC_SD2_CSD_C_SIZE_MSB_MASK)
  304. << MMC_SD2_CSD_C_SIZE_MSB_OFFSET);
  305. mmc_dev_data->size = card_size * 1024;
  306. if (mmc_dev_data->size == 0)
  307. return 0;
  308. } else {
  309. argument = 0x00000000;
  310. err = mmc_send_cmd(MMC_CMD8, argument, resp);
  311. if (err != 1)
  312. return err;
  313. err = mmc_read_data((unsigned int *) &ext_csd);
  314. if (err != 1)
  315. return err;
  316. mmc_dev_data->size = ext_csd.sectorcount;
  317. if (mmc_dev_data->size == 0)
  318. mmc_dev_data->size = 8388608;
  319. }
  320. } else {
  321. if (cur_csd->c_size_mult >= 8)
  322. return 0;
  323. if (cur_csd->read_bl_len >= 12)
  324. return 0;
  325. /* Compute size */
  326. count = 1 << (cur_csd->c_size_mult + 2);
  327. card_size = (cur_csd->c_size_lsb & MMC_CSD_C_SIZE_LSB_MASK) |
  328. ((cur_csd->c_size_msb & MMC_CSD_C_SIZE_MSB_MASK)
  329. << MMC_CSD_C_SIZE_MSB_OFFSET);
  330. blk_no = (card_size + 1) * count;
  331. blk_len = 1 << cur_csd->read_bl_len;
  332. size = blk_no * blk_len;
  333. mmc_dev_data->size = size / MMCSD_SECTOR_SIZE;
  334. if (mmc_dev_data->size == 0)
  335. return 0;
  336. }
  337. return 1;
  338. }
  339. unsigned char omap_mmc_read_sect(unsigned int start_sec, unsigned int num_bytes,
  340. mmc_card_data *mmc_c,
  341. unsigned long *output_buf)
  342. {
  343. unsigned char err;
  344. unsigned int argument;
  345. unsigned int resp[4];
  346. unsigned int num_sec_val =
  347. (num_bytes + (MMCSD_SECTOR_SIZE - 1)) / MMCSD_SECTOR_SIZE;
  348. unsigned int sec_inc_val;
  349. if (num_sec_val == 0)
  350. return 1;
  351. if (mmc_c->mode == SECTOR_MODE) {
  352. argument = start_sec;
  353. sec_inc_val = 1;
  354. } else {
  355. argument = start_sec * MMCSD_SECTOR_SIZE;
  356. sec_inc_val = MMCSD_SECTOR_SIZE;
  357. }
  358. while (num_sec_val) {
  359. err = mmc_send_cmd(MMC_CMD17, argument, resp);
  360. if (err != 1)
  361. return err;
  362. err = mmc_read_data((unsigned int *) output_buf);
  363. if (err != 1)
  364. return err;
  365. output_buf += (MMCSD_SECTOR_SIZE / 4);
  366. argument += sec_inc_val;
  367. num_sec_val--;
  368. }
  369. return 1;
  370. }
  371. unsigned char configure_mmc(mmc_card_data *mmc_card_cur)
  372. {
  373. unsigned char ret_val;
  374. unsigned int argument;
  375. unsigned int resp[4];
  376. unsigned int trans_clk, trans_fact, trans_unit, retries = 2;
  377. mmc_csd_reg_t Card_CSD;
  378. unsigned char trans_speed;
  379. ret_val = mmc_init_setup();
  380. if (ret_val != 1)
  381. return ret_val;
  382. do {
  383. ret_val = mmc_detect_card(mmc_card_cur);
  384. retries--;
  385. } while ((retries > 0) && (ret_val != 1));
  386. argument = mmc_card_cur->RCA << 16;
  387. ret_val = mmc_send_cmd(MMC_CMD9, argument, resp);
  388. if (ret_val != 1)
  389. return ret_val;
  390. ((unsigned int *) &Card_CSD)[3] = resp[3];
  391. ((unsigned int *) &Card_CSD)[2] = resp[2];
  392. ((unsigned int *) &Card_CSD)[1] = resp[1];
  393. ((unsigned int *) &Card_CSD)[0] = resp[0];
  394. if (mmc_card_cur->card_type == MMC_CARD)
  395. mmc_card_cur->version = Card_CSD.spec_vers;
  396. trans_speed = Card_CSD.tran_speed;
  397. ret_val = mmc_send_cmd(MMC_CMD4, MMC_DSR_DEFAULT << 16, resp);
  398. if (ret_val != 1)
  399. return ret_val;
  400. trans_unit = trans_speed & MMC_CSD_TRAN_SPEED_UNIT_MASK;
  401. trans_fact = trans_speed & MMC_CSD_TRAN_SPEED_FACTOR_MASK;
  402. if (trans_unit > MMC_CSD_TRAN_SPEED_UNIT_100MHZ)
  403. return 0;
  404. if ((trans_fact < MMC_CSD_TRAN_SPEED_FACTOR_1_0) ||
  405. (trans_fact > MMC_CSD_TRAN_SPEED_FACTOR_8_0))
  406. return 0;
  407. trans_unit >>= 0;
  408. trans_fact >>= 3;
  409. trans_clk = mmc_transspeed_val[trans_fact - 1][trans_unit] * 2;
  410. ret_val = mmc_clock_config(CLK_MISC, trans_clk);
  411. if (ret_val != 1)
  412. return ret_val;
  413. argument = mmc_card_cur->RCA << 16;
  414. ret_val = mmc_send_cmd(MMC_CMD7_SELECT, argument, resp);
  415. if (ret_val != 1)
  416. return ret_val;
  417. /* Configure the block length to 512 bytes */
  418. argument = MMCSD_SECTOR_SIZE;
  419. ret_val = mmc_send_cmd(MMC_CMD16, argument, resp);
  420. if (ret_val != 1)
  421. return ret_val;
  422. /* get the card size in sectors */
  423. ret_val = mmc_read_cardsize(mmc_card_cur, &Card_CSD);
  424. if (ret_val != 1)
  425. return ret_val;
  426. return 1;
  427. }
  428. unsigned long mmc_bread(int dev_num, unsigned long blknr, lbaint_t blkcnt,
  429. void *dst)
  430. {
  431. omap_mmc_read_sect(blknr, (blkcnt * MMCSD_SECTOR_SIZE), &cur_card_data,
  432. (unsigned long *) dst);
  433. return 1;
  434. }
  435. int mmc_legacy_init(int verbose)
  436. {
  437. if (configure_mmc(&cur_card_data) != 1)
  438. return 1;
  439. mmc_blk_dev.if_type = IF_TYPE_MMC;
  440. mmc_blk_dev.part_type = PART_TYPE_DOS;
  441. mmc_blk_dev.dev = 0;
  442. mmc_blk_dev.lun = 0;
  443. mmc_blk_dev.type = 0;
  444. /* FIXME fill in the correct size (is set to 32MByte) */
  445. mmc_blk_dev.blksz = MMCSD_SECTOR_SIZE;
  446. mmc_blk_dev.lba = 0x10000;
  447. mmc_blk_dev.removable = 0;
  448. mmc_blk_dev.block_read = mmc_bread;
  449. fat_register_device(&mmc_blk_dev, 1);
  450. return 0;
  451. }