vexpress_common.c 5.9 KB

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  1. /*
  2. * (C) Copyright 2002
  3. * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
  4. * Marius Groeger <mgroeger@sysgo.de>
  5. *
  6. * (C) Copyright 2002
  7. * David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
  8. *
  9. * (C) Copyright 2003
  10. * Texas Instruments, <www.ti.com>
  11. * Kshitij Gupta <Kshitij@ti.com>
  12. *
  13. * (C) Copyright 2004
  14. * ARM Ltd.
  15. * Philippe Robin, <philippe.robin@arm.com>
  16. *
  17. * See file CREDITS for list of people who contributed to this
  18. * project.
  19. *
  20. * This program is free software; you can redistribute it and/or
  21. * modify it under the terms of the GNU General Public License as
  22. * published by the Free Software Foundation; either version 2 of
  23. * the License, or (at your option) any later version.
  24. *
  25. * This program is distributed in the hope that it will be useful,
  26. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  27. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  28. * GNU General Public License for more details.
  29. *
  30. * You should have received a copy of the GNU General Public License
  31. * along with this program; if not, write to the Free Software
  32. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  33. * MA 02111-1307 USA
  34. */
  35. #include <common.h>
  36. #include <malloc.h>
  37. #include <errno.h>
  38. #include <netdev.h>
  39. #include <asm/io.h>
  40. #include <asm/arch/systimer.h>
  41. #include <asm/arch/sysctrl.h>
  42. #include <asm/arch/wdt.h>
  43. #include "../drivers/mmc/arm_pl180_mmci.h"
  44. static ulong timestamp;
  45. static ulong lastdec;
  46. static struct wdt *wdt_base = (struct wdt *)WDT_BASE;
  47. static struct systimer *systimer_base = (struct systimer *)SYSTIMER_BASE;
  48. static struct sysctrl *sysctrl_base = (struct sysctrl *)SCTL_BASE;
  49. static void flash__init(void);
  50. static void vexpress_timer_init(void);
  51. DECLARE_GLOBAL_DATA_PTR;
  52. #if defined(CONFIG_SHOW_BOOT_PROGRESS)
  53. void show_boot_progress(int progress)
  54. {
  55. printf("Boot reached stage %d\n", progress);
  56. }
  57. #endif
  58. static inline void delay(ulong loops)
  59. {
  60. __asm__ volatile ("1:\n"
  61. "subs %0, %1, #1\n"
  62. "bne 1b" : "=r" (loops) : "0" (loops));
  63. }
  64. int board_init(void)
  65. {
  66. gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR;
  67. gd->bd->bi_arch_number = MACH_TYPE_VEXPRESS;
  68. gd->flags = 0;
  69. icache_enable();
  70. flash__init();
  71. vexpress_timer_init();
  72. return 0;
  73. }
  74. int board_eth_init(bd_t *bis)
  75. {
  76. int rc = 0;
  77. #ifdef CONFIG_SMC911X
  78. rc = smc911x_initialize(0, CONFIG_SMC911X_BASE);
  79. #endif
  80. return rc;
  81. }
  82. int cpu_mmc_init(bd_t *bis)
  83. {
  84. int rc = 0;
  85. (void) bis;
  86. #ifdef CONFIG_ARM_PL180_MMCI
  87. struct pl180_mmc_host *host;
  88. host = malloc(sizeof(struct pl180_mmc_host));
  89. if (!host)
  90. return -ENOMEM;
  91. memset(host, 0, sizeof(*host));
  92. strcpy(host->name, "MMC");
  93. host->base = (struct sdi_registers *)CONFIG_ARM_PL180_MMCI_BASE;
  94. host->pwr_init = INIT_PWR;
  95. host->clkdiv_init = SDI_CLKCR_CLKDIV_INIT_V1 | SDI_CLKCR_CLKEN;
  96. host->voltages = VOLTAGE_WINDOW_MMC;
  97. host->caps = 0;
  98. host->clock_in = ARM_MCLK;
  99. host->clock_min = ARM_MCLK / (2 * (SDI_CLKCR_CLKDIV_INIT_V1 + 1));
  100. host->clock_max = CONFIG_ARM_PL180_MMCI_CLOCK_FREQ;
  101. rc = arm_pl180_mmci_init(host);
  102. #endif
  103. return rc;
  104. }
  105. static void flash__init(void)
  106. {
  107. /* Setup the sytem control register to allow writing to flash */
  108. writel(readl(&sysctrl_base->scflashctrl) | VEXPRESS_FLASHPROG_FLVPPEN,
  109. &sysctrl_base->scflashctrl);
  110. }
  111. int dram_init(void)
  112. {
  113. gd->ram_size =
  114. get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, PHYS_SDRAM_1_SIZE);
  115. return 0;
  116. }
  117. void dram_init_banksize(void)
  118. {
  119. gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
  120. gd->bd->bi_dram[0].size =
  121. get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE);
  122. gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
  123. gd->bd->bi_dram[1].size =
  124. get_ram_size((long *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE);
  125. }
  126. int timer_init(void)
  127. {
  128. return 0;
  129. }
  130. /*
  131. * Start timer:
  132. * Setup a 32 bit timer, running at 1KHz
  133. * Versatile Express Motherboard provides 1 MHz timer
  134. */
  135. static void vexpress_timer_init(void)
  136. {
  137. /*
  138. * Set clock frequency in system controller:
  139. * VEXPRESS_REFCLK is 32KHz
  140. * VEXPRESS_TIMCLK is 1MHz
  141. */
  142. writel(SP810_TIMER0_ENSEL | SP810_TIMER1_ENSEL |
  143. SP810_TIMER2_ENSEL | SP810_TIMER3_ENSEL |
  144. readl(&sysctrl_base->scctrl), &sysctrl_base->scctrl);
  145. /*
  146. * Set Timer0 to be:
  147. * Enabled, free running, no interrupt, 32-bit, wrapping
  148. */
  149. writel(SYSTIMER_RELOAD, &systimer_base->timer0load);
  150. writel(SYSTIMER_RELOAD, &systimer_base->timer0value);
  151. writel(SYSTIMER_EN | SYSTIMER_32BIT |
  152. readl(&systimer_base->timer0control),
  153. &systimer_base->timer0control);
  154. reset_timer_masked();
  155. }
  156. /* Use the ARM Watchdog System to cause reset */
  157. void reset_cpu(ulong addr)
  158. {
  159. writeb(WDT_EN, &wdt_base->wdogcontrol);
  160. writel(WDT_RESET_LOAD, &wdt_base->wdogload);
  161. while (1)
  162. ;
  163. }
  164. /*
  165. * Delay x useconds AND perserve advance timstamp value
  166. * assumes timer is ticking at 1 msec
  167. */
  168. void __udelay(ulong usec)
  169. {
  170. ulong tmo, tmp;
  171. tmo = usec / 1000;
  172. tmp = get_timer(0); /* get current timestamp */
  173. /*
  174. * If setting this forward will roll time stamp then
  175. * reset "advancing" timestamp to 0 and set lastdec value
  176. * otherwise set the advancing stamp to the wake up time
  177. */
  178. if ((tmo + tmp + 1) < tmp)
  179. reset_timer_masked();
  180. else
  181. tmo += tmp;
  182. while (get_timer_masked() < tmo)
  183. ; /* loop till wakeup event */
  184. }
  185. ulong get_timer(ulong base)
  186. {
  187. return get_timer_masked() - base;
  188. }
  189. void reset_timer_masked(void)
  190. {
  191. lastdec = readl(&systimer_base->timer0value) / 1000;
  192. timestamp = 0;
  193. }
  194. ulong get_timer_masked(void)
  195. {
  196. ulong now = readl(&systimer_base->timer0value) / 1000;
  197. if (lastdec >= now) { /* normal mode (non roll) */
  198. timestamp += lastdec - now;
  199. } else { /* count down timer overflowed */
  200. /*
  201. * nts = ts + ld - now
  202. * ts = old stamp, ld = time before passing through - 1
  203. * now = amount of time after passing though - 1
  204. * nts = new "advancing time stamp"
  205. */
  206. timestamp += lastdec + SYSTIMER_RELOAD - now;
  207. }
  208. lastdec = now;
  209. return timestamp;
  210. }
  211. void lowlevel_init(void)
  212. {
  213. }
  214. ulong get_board_rev(void){
  215. return readl((u32 *)SYS_ID);
  216. }
  217. unsigned long long get_ticks(void)
  218. {
  219. return get_timer(0);
  220. }
  221. ulong get_tbclk(void)
  222. {
  223. return (ulong)CONFIG_SYS_HZ;
  224. }