kb9202.h 4.8 KB

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  1. /*
  2. * Rick Bronson <rick@efn.org>
  3. *
  4. * Configuation settings for the AT91RM9200DK board.
  5. *
  6. * See file CREDITS for list of people who contributed to this
  7. * project.
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License as
  11. * published by the Free Software Foundation; either version 2 of
  12. * the License, or (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  22. * MA 02111-1307 USA
  23. */
  24. /*
  25. * Adatped for KwikByte KB920x board from at91rm9200dk.h: 22APR2005
  26. */
  27. #ifndef __CONFIG_H
  28. #define __CONFIG_H
  29. /* ARM asynchronous clock */
  30. #define AT91C_MAIN_CLOCK 180000000 /* from 10 MHz crystal */
  31. #define AT91C_MASTER_CLOCK 60000000 /* peripheral clock (AT91C_MASTER_CLOCK / 3) */
  32. #define AT91_SLOW_CLOCK 32768 /* slow clock */
  33. #define CONFIG_ARM920T 1 /* This is an ARM920T Core */
  34. #define CONFIG_AT91RM9200 1 /* It's an Atmel AT91RM9200 SoC */
  35. /* Only define one of the following, based on board type */
  36. /* #define CONFIG_KB9200 1 KwikByte KB9202 board */
  37. /* #define CONFIG_KB9201 1 KwikByte KB9202 board */
  38. #define CONFIG_KB9202 1 /* KwikByte KB9202 board */
  39. #define CONFIG_KB920x 1 /* Any KB920x board */
  40. #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
  41. #define USE_920T_MMU 1
  42. #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
  43. #define CONFIG_SETUP_MEMORY_TAGS 1
  44. #define CONFIG_INITRD_TAG 1
  45. #define CONFIG_SKIP_LOWLEVEL_INIT
  46. #define CFG_LONGHELP
  47. /*
  48. * Size of malloc() pool
  49. */
  50. #define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024)
  51. #define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
  52. #define CONFIG_BAUDRATE 115200
  53. /*
  54. * Hardware drivers
  55. */
  56. /* define one of these to choose the DBGU, USART0 or USART1 as console */
  57. #define CONFIG_DBGU
  58. #undef CONFIG_USART0
  59. #undef CONFIG_USART1
  60. #undef CONFIG_HWFLOW /* don't include RTS/CTS flow control support */
  61. #undef CONFIG_MODEM_SUPPORT /* disable modem initialization stuff */
  62. #define CONFIG_BOOTDELAY 3
  63. #define CONFIG_ENV_OVERWRITE 1
  64. #define CONFIG_COMMANDS \
  65. ((CONFIG_CMD_DFL | \
  66. CFG_CMD_I2C | \
  67. CFG_CMD_PING | \
  68. CFG_CMD_DHCP ) & \
  69. ~(CFG_CMD_BDI | \
  70. CFG_CMD_FPGA | \
  71. CFG_CMD_MISC))
  72. /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
  73. #include <cmd_confdefs.h>
  74. #define CONFIG_NR_DRAM_BANKS 1
  75. #define PHYS_SDRAM 0x20000000
  76. #define PHYS_SDRAM_SIZE 0x2000000 /* 32 megs */
  77. #define CFG_MEMTEST_START PHYS_SDRAM
  78. #define CFG_MEMTEST_END CFG_MEMTEST_START + PHYS_SDRAM_SIZE - (512*1024)
  79. #define CONFIG_DRIVER_ETHER
  80. #define CONFIG_NET_RETRY_COUNT 20
  81. #define CFG_FLASH_BASE 0x10000000
  82. #ifdef CONFIG_KB9202
  83. #define PHYS_FLASH_SIZE 0x1000000
  84. #else
  85. #define PHYS_FLASH_SIZE 0x200000
  86. #endif
  87. #define CFG_MAX_FLASH_BANKS 1
  88. #define CFG_MAX_FLASH_SECT 256
  89. #define CONFIG_HARD_I2C
  90. #define CFG_ENV_IS_IN_EEPROM
  91. #ifdef CONFIG_KB9202
  92. #define CFG_ENV_OFFSET 0x3000
  93. #define CFG_ENV_SIZE 0x1000
  94. #else
  95. #define CFG_ENV_OFFSET 0x1000
  96. #define CFG_ENV_SIZE 0x1000
  97. #endif
  98. #define CFG_I2C_EEPROM_ADDR 0x50
  99. #define CFG_EEPROM_PAGE_WRITE_BITS 6
  100. #define CFG_I2C_EEPROM_ADDR_LEN 2
  101. #define CFG_I2C_SPEED 50000
  102. #define CFG_I2C_SLAVE 0 /* not used */
  103. #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10
  104. #define CFG_LOAD_ADDR 0x21000000 /* default load address */
  105. #define CFG_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 }
  106. #define CFG_PROMPT "U-Boot> " /* Monitor Command Prompt */
  107. #define CFG_CBSIZE 256 /* Console I/O Buffer Size */
  108. #define CFG_MAXARGS 16 /* max number of command args */
  109. #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
  110. #define CFG_FLASH_CFI_DRIVER
  111. #define CFG_FLASH_CFI
  112. #ifndef __ASSEMBLY__
  113. /*-----------------------------------------------------------------------
  114. * Board specific extension for bd_info
  115. *
  116. * This structure is embedded in the global bd_info (bd_t) structure
  117. * and can be used by the board specific code (eg board/...)
  118. */
  119. struct bd_info_ext {
  120. /* helper variable for board environment handling
  121. *
  122. * env_crc_valid == 0 => uninitialised
  123. * env_crc_valid > 0 => environment crc in flash is valid
  124. * env_crc_valid < 0 => environment crc in flash is invalid
  125. */
  126. int env_crc_valid;
  127. };
  128. #endif
  129. #define CFG_HZ 1000
  130. #define CFG_HZ_CLOCK AT91C_MASTER_CLOCK/2 /* AT91C_TC0_CMR is implicitly set to */
  131. /* AT91C_TC_TIMER_DIV1_CLOCK */
  132. #define CONFIG_STACKSIZE (32*1024) /* regular stack */
  133. #ifdef CONFIG_USE_IRQ
  134. #error CONFIG_USE_IRQ not supported
  135. #endif
  136. #endif