eric.c 6.1 KB

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  1. /*
  2. * (C) Copyright 2001
  3. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. */
  23. #include <common.h>
  24. #include <i2c.h>
  25. #include "eric.h"
  26. #include <asm/processor.h>
  27. #define PPC405GP_GPIO0_OR 0xef600700 /* GPIO Output */
  28. #define PPC405GP_GPIO0_TCR 0xef600704 /* GPIO Three-State Control */
  29. #define PPC405GP_GPIO0_ODR 0xef600718 /* GPIO Open Drain */
  30. #define PPC405GP_GPIO0_IR 0xef60071c /* GPIO Input */
  31. void sdram_init(void);
  32. int board_early_init_f (void)
  33. {
  34. /*-------------------------------------------------------------------------+
  35. | Interrupt controller setup for the ERIC board.
  36. | Note: IRQ 0-15 405GP internally generated; active high; level sensitive
  37. | IRQ 16 405GP internally generated; active low; level sensitive
  38. | IRQ 17-24 RESERVED
  39. | IRQ 25 (EXT IRQ 0) FLASH; active low; level sensitive
  40. | IRQ 26 (EXT IRQ 1) PHY ; active low; level sensitive
  41. | IRQ 27 (EXT IRQ 2) HOST FAIL, active low; level sensitive
  42. | indicates NO Power or HOST RESET active
  43. | check GPIO7 (HOST RESET#) and GPIO8 (NO Power#)
  44. | for real IRQ source
  45. | IRQ 28 (EXT IRQ 3) HOST; active high; level sensitive
  46. | IRQ 29 (EXT IRQ 4) PCI INTC#; active low; level sensitive
  47. | IRQ 30 (EXT IRQ 5) PCI INTB#; active low; level sensitive
  48. | IRQ 31 (EXT IRQ 6) PCI INTA#; active low; level sensitive
  49. | -> IRQ6 Pin is NOW GPIO23 and can be activateted by setting
  50. | PPC405GP_GPIO0_TCR Bit 0 = 1 (driving the output as defined in PPC405GP_GPIO0_OR,
  51. | else tristate)
  52. | Note for ERIC board:
  53. | An interrupt taken for the HOST (IRQ 28) indicates that
  54. | the HOST wrote a "1" to one of the following locations
  55. | - VGA CRT_GPIO0 (if R1216 is loaded)
  56. | - VGA CRT_GPIO1 (if R1217 is loaded)
  57. |
  58. +-------------------------------------------------------------------------*/
  59. mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */
  60. mtdcr (uicer, 0x00000000); /* disable all ints */
  61. mtdcr (uiccr, 0x00000000); /* set all SMI to be non-critical */
  62. mtdcr (uicpr, 0xFFFFFF88); /* set int polarities; IRQ3 to 1 */
  63. mtdcr (uictr, 0x10000000); /* set int trigger levels, UART0 is EDGE */
  64. mtdcr (uicvcr, 0x00000001); /* set vect base=0,INT0 highest priority */
  65. mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */
  66. mtdcr (cntrl0, 0x00002000); /* set IRQ6 as GPIO23 to generate an interrupt request to the PCP2PCI bridge */
  67. out32 (PPC405GP_GPIO0_OR, 0x60000000); /*fixme is SMB_INT high or low active??; IRQ6 is GPIO23 output */
  68. out32 (PPC405GP_GPIO0_TCR, 0x7E400000);
  69. return 0;
  70. }
  71. /* ------------------------------------------------------------------------- */
  72. /*
  73. * Check Board Identity:
  74. */
  75. int checkboard (void)
  76. {
  77. char *s = getenv ("serial#");
  78. char *e;
  79. puts ("Board: ");
  80. if (!s || strncmp (s, "ERIC", 9)) {
  81. puts ("### No HW ID - assuming ERIC");
  82. } else {
  83. for (e = s; *e; ++e) {
  84. if (*e == ' ')
  85. break;
  86. }
  87. for (; s < e; ++s) {
  88. putc (*s);
  89. }
  90. }
  91. putc ('\n');
  92. return (0);
  93. }
  94. /* ------------------------------------------------------------------------- */
  95. /* ------------------------------------------------------------------------- */
  96. /* ------------------------------------------------------------------------- */
  97. /*
  98. initdram(int board_type) reads EEPROM via I2c. EEPROM contains all of
  99. the necessary info for SDRAM controller configuration
  100. */
  101. /* ------------------------------------------------------------------------- */
  102. /* ------------------------------------------------------------------------- */
  103. phys_size_t initdram (int board_type)
  104. {
  105. #ifndef CONFIG_ERIC
  106. int i;
  107. unsigned char datain[128];
  108. int TotalSize;
  109. #endif
  110. /*
  111. * ToDo: Move the asm init routine sdram_init() to this C file,
  112. * or even better use some common ppc4xx code available
  113. * in cpu/ppc4xx
  114. */
  115. sdram_init();
  116. #ifdef CONFIG_ERIC
  117. /*
  118. * we have no EEPROM on ERIC
  119. * so let init.S do the init job for SDRAM
  120. * and simply return 32MByte here
  121. */
  122. return (CFG_SDRAM_SIZE * 1024 * 1024);
  123. #else
  124. /* Read Serial Presence Detect Information */
  125. for (i = 0; i < 128; i++)
  126. datain[i] = 127;
  127. i2c_send (SPD_EEPROM_ADDRESS, 0, 1, datain, 128);
  128. printf ("\nReading DIMM...\n");
  129. #if 0
  130. for (i = 0; i < 128; i++) {
  131. printf ("%d=0x%x ", i, datain[i]);
  132. if (((i + 1) % 10) == 0)
  133. printf ("\n");
  134. }
  135. printf ("\n");
  136. #endif
  137. /*****************************/
  138. /* Retrieve interesting data */
  139. /*****************************/
  140. /* size of a SDRAM bank */
  141. /* Number of bytes per side / number of banks per side */
  142. if (datain[31] == 0x08)
  143. TotalSize = 32;
  144. else if (datain[31] == 0x10)
  145. TotalSize = 64;
  146. else {
  147. printf ("IIC READ ERROR!!!\n");
  148. TotalSize = 32;
  149. }
  150. /* single-sided DIMM or double-sided DIMM? */
  151. if (datain[5] != 1) {
  152. /* double-sided DIMM => SDRAM banks 0..3 are valid */
  153. printf ("double-sided DIMM\n");
  154. TotalSize *= 2;
  155. }
  156. /* else single-sided DIMM => SDRAM bank 0 and bank 2 are valid */
  157. else {
  158. printf ("single-sided DIMM\n");
  159. }
  160. /* return size in Mb unit => *(1024*1024) */
  161. return (TotalSize * 1024 * 1024);
  162. #endif
  163. }
  164. /* ------------------------------------------------------------------------- */
  165. int testdram (void)
  166. {
  167. /* TODO: XXX XXX XXX */
  168. printf ("test: xxx MB - ok\n");
  169. return (0);
  170. }
  171. /* ------------------------------------------------------------------------- */