bubinga.c 2.1 KB

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  1. /*
  2. * (C) Copyright 2000-2005
  3. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. */
  23. #include <common.h>
  24. #include <asm/processor.h>
  25. #include <asm/io.h>
  26. long int spd_sdram(void);
  27. int board_early_init_f(void)
  28. {
  29. mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
  30. mtdcr(uicer, 0x00000000); /* disable all ints */
  31. mtdcr(uiccr, 0x00000010);
  32. mtdcr(uicpr, 0xFFFF7FF0); /* set int polarities */
  33. mtdcr(uictr, 0x00000010); /* set int trigger levels */
  34. mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
  35. /*
  36. * Configure CPC0_PCI to enable PerWE as output
  37. * and enable the internal PCI arbiter if selected
  38. */
  39. if (in_8((void *)FPGA_REG1) & FPGA_REG1_PCI_INT_ARB)
  40. mtdcr(cpc0_pci, CPC0_PCI_HOST_CFG_EN | CPC0_PCI_ARBIT_EN);
  41. else
  42. mtdcr(cpc0_pci, CPC0_PCI_HOST_CFG_EN);
  43. return 0;
  44. }
  45. /*
  46. * Check Board Identity:
  47. */
  48. int checkboard(void)
  49. {
  50. char *s = getenv("serial#");
  51. puts("Board: Bubinga - AMCC PPC405EP Evaluation Board");
  52. if (s != NULL) {
  53. puts(", serial# ");
  54. puts(s);
  55. }
  56. putc('\n');
  57. return (0);
  58. }
  59. /* -------------------------------------------------------------------------
  60. initdram(int board_type) reads EEPROM via I2c. EEPROM contains all of
  61. the necessary info for SDRAM controller configuration
  62. ------------------------------------------------------------------------- */
  63. phys_size_t initdram(int board_type)
  64. {
  65. long int ret;
  66. ret = spd_sdram();
  67. return ret;
  68. }