i2c.c 8.0 KB

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  1. /*
  2. * (C) Copyright 2004, Freescale, Inc
  3. * TsiChung Liew, Tsi-Chung.Liew@freescale.com.
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. */
  23. #include <common.h>
  24. #ifdef CONFIG_HARD_I2C
  25. #include <mpc8220.h>
  26. #include <i2c.h>
  27. typedef struct mpc8220_i2c {
  28. volatile u32 adr; /* I2Cn + 0x00 */
  29. volatile u32 fdr; /* I2Cn + 0x04 */
  30. volatile u32 cr; /* I2Cn + 0x08 */
  31. volatile u32 sr; /* I2Cn + 0x0C */
  32. volatile u32 dr; /* I2Cn + 0x10 */
  33. } i2c_t;
  34. /* I2Cn control register bits */
  35. #define I2C_EN 0x80
  36. #define I2C_IEN 0x40
  37. #define I2C_STA 0x20
  38. #define I2C_TX 0x10
  39. #define I2C_TXAK 0x08
  40. #define I2C_RSTA 0x04
  41. #define I2C_INIT_MASK (I2C_EN | I2C_STA | I2C_TX | I2C_RSTA)
  42. /* I2Cn status register bits */
  43. #define I2C_CF 0x80
  44. #define I2C_AAS 0x40
  45. #define I2C_BB 0x20
  46. #define I2C_AL 0x10
  47. #define I2C_SRW 0x04
  48. #define I2C_IF 0x02
  49. #define I2C_RXAK 0x01
  50. #define I2C_TIMEOUT 100
  51. #define I2C_RETRIES 1
  52. struct mpc8220_i2c_tap {
  53. int scl2tap;
  54. int tap2tap;
  55. };
  56. static int mpc_reg_in (volatile u32 * reg);
  57. static void mpc_reg_out (volatile u32 * reg, int val, int mask);
  58. static int wait_for_bb (void);
  59. static int wait_for_pin (int *status);
  60. static int do_address (uchar chip, char rdwr_flag);
  61. static int send_bytes (uchar chip, char *buf, int len);
  62. static int receive_bytes (uchar chip, char *buf, int len);
  63. static int mpc_get_fdr (int);
  64. static int mpc_reg_in (volatile u32 * reg)
  65. {
  66. return *reg >> 24;
  67. __asm__ __volatile__ ("eieio");
  68. }
  69. static void mpc_reg_out (volatile u32 * reg, int val, int mask)
  70. {
  71. int tmp;
  72. if (!mask) {
  73. *reg = val << 24;
  74. } else {
  75. tmp = mpc_reg_in (reg);
  76. *reg = ((tmp & ~mask) | (val & mask)) << 24;
  77. }
  78. __asm__ __volatile__ ("eieio");
  79. return;
  80. }
  81. static int wait_for_bb (void)
  82. {
  83. i2c_t *regs = (i2c_t *) MMAP_I2C;
  84. int timeout = I2C_TIMEOUT;
  85. int status;
  86. status = mpc_reg_in (&regs->sr);
  87. while (timeout-- && (status & I2C_BB)) {
  88. #if 1
  89. volatile int temp;
  90. mpc_reg_out (&regs->cr, I2C_STA, I2C_STA);
  91. temp = mpc_reg_in (&regs->dr);
  92. mpc_reg_out (&regs->cr, 0, I2C_STA);
  93. mpc_reg_out (&regs->cr, 0, 0);
  94. mpc_reg_out (&regs->cr, I2C_EN, 0);
  95. #endif
  96. udelay (1000);
  97. status = mpc_reg_in (&regs->sr);
  98. }
  99. return (status & I2C_BB);
  100. }
  101. static int wait_for_pin (int *status)
  102. {
  103. i2c_t *regs = (i2c_t *) MMAP_I2C;
  104. int timeout = I2C_TIMEOUT;
  105. *status = mpc_reg_in (&regs->sr);
  106. while (timeout-- && !(*status & I2C_IF)) {
  107. udelay (1000);
  108. *status = mpc_reg_in (&regs->sr);
  109. }
  110. if (!(*status & I2C_IF)) {
  111. return -1;
  112. }
  113. mpc_reg_out (&regs->sr, 0, I2C_IF);
  114. return 0;
  115. }
  116. static int do_address (uchar chip, char rdwr_flag)
  117. {
  118. i2c_t *regs = (i2c_t *) MMAP_I2C;
  119. int status;
  120. chip <<= 1;
  121. if (rdwr_flag)
  122. chip |= 1;
  123. mpc_reg_out (&regs->cr, I2C_TX, I2C_TX);
  124. mpc_reg_out (&regs->dr, chip, 0);
  125. if (wait_for_pin (&status))
  126. return -2;
  127. if (status & I2C_RXAK)
  128. return -3;
  129. return 0;
  130. }
  131. static int send_bytes (uchar chip, char *buf, int len)
  132. {
  133. i2c_t *regs = (i2c_t *) MMAP_I2C;
  134. int wrcount;
  135. int status;
  136. for (wrcount = 0; wrcount < len; ++wrcount) {
  137. mpc_reg_out (&regs->dr, buf[wrcount], 0);
  138. if (wait_for_pin (&status))
  139. break;
  140. if (status & I2C_RXAK)
  141. break;
  142. }
  143. return !(wrcount == len);
  144. return 0;
  145. }
  146. static int receive_bytes (uchar chip, char *buf, int len)
  147. {
  148. i2c_t *regs = (i2c_t *) MMAP_I2C;
  149. int dummy = 1;
  150. int rdcount = 0;
  151. int status;
  152. int i;
  153. mpc_reg_out (&regs->cr, 0, I2C_TX);
  154. for (i = 0; i < len; ++i) {
  155. buf[rdcount] = mpc_reg_in (&regs->dr);
  156. if (dummy)
  157. dummy = 0;
  158. else
  159. rdcount++;
  160. if (wait_for_pin (&status))
  161. return -4;
  162. }
  163. mpc_reg_out (&regs->cr, I2C_TXAK, I2C_TXAK);
  164. buf[rdcount++] = mpc_reg_in (&regs->dr);
  165. if (wait_for_pin (&status))
  166. return -5;
  167. mpc_reg_out (&regs->cr, 0, I2C_TXAK);
  168. return 0;
  169. }
  170. /**************** I2C API ****************/
  171. void i2c_init (int speed, int saddr)
  172. {
  173. i2c_t *regs = (i2c_t *) MMAP_I2C;
  174. mpc_reg_out (&regs->cr, 0, 0);
  175. mpc_reg_out (&regs->adr, saddr << 1, 0);
  176. /* Set clock
  177. */
  178. mpc_reg_out (&regs->fdr, mpc_get_fdr (speed), 0);
  179. /* Enable module
  180. */
  181. mpc_reg_out (&regs->cr, I2C_EN, I2C_INIT_MASK);
  182. mpc_reg_out (&regs->sr, 0, I2C_IF);
  183. return;
  184. }
  185. static int mpc_get_fdr (int speed)
  186. {
  187. DECLARE_GLOBAL_DATA_PTR;
  188. static int fdr = -1;
  189. if (fdr == -1) {
  190. ulong best_speed = 0;
  191. ulong divider;
  192. ulong ipb, scl;
  193. ulong bestmatch = 0xffffffffUL;
  194. int best_i = 0, best_j = 0, i, j;
  195. int SCL_Tap[] = { 9, 10, 12, 15, 5, 6, 7, 8 };
  196. struct mpc8220_i2c_tap scltap[] = {
  197. {4, 1},
  198. {4, 2},
  199. {6, 4},
  200. {6, 8},
  201. {14, 16},
  202. {30, 32},
  203. {62, 64},
  204. {126, 128}
  205. };
  206. ipb = gd->bus_clk;
  207. for (i = 7; i >= 0; i--) {
  208. for (j = 7; j >= 0; j--) {
  209. scl = 2 * (scltap[j].scl2tap +
  210. (SCL_Tap[i] -
  211. 1) * scltap[j].tap2tap + 2);
  212. if (ipb <= speed * scl) {
  213. if ((speed * scl - ipb) < bestmatch) {
  214. bestmatch = speed * scl - ipb;
  215. best_i = i;
  216. best_j = j;
  217. best_speed = ipb / scl;
  218. }
  219. }
  220. }
  221. }
  222. divider = (best_i & 3) | ((best_i & 4) << 3) | (best_j << 2);
  223. if (gd->flags & GD_FLG_RELOC) {
  224. fdr = divider;
  225. } else {
  226. printf ("%ld kHz, ", best_speed / 1000);
  227. return divider;
  228. }
  229. }
  230. return fdr;
  231. }
  232. int i2c_probe (uchar chip)
  233. {
  234. i2c_t *regs = (i2c_t *) MMAP_I2C;
  235. int i;
  236. for (i = 0; i < I2C_RETRIES; i++) {
  237. mpc_reg_out (&regs->cr, I2C_STA, I2C_STA);
  238. if (!do_address (chip, 0)) {
  239. mpc_reg_out (&regs->cr, 0, I2C_STA);
  240. break;
  241. }
  242. mpc_reg_out (&regs->cr, 0, I2C_STA);
  243. udelay (50);
  244. }
  245. return (i == I2C_RETRIES);
  246. }
  247. int i2c_read (uchar chip, uint addr, int alen, uchar * buf, int len)
  248. {
  249. uchar xaddr[4];
  250. i2c_t *regs = (i2c_t *) MMAP_I2C;
  251. int ret = -1;
  252. xaddr[0] = (addr >> 24) & 0xFF;
  253. xaddr[1] = (addr >> 16) & 0xFF;
  254. xaddr[2] = (addr >> 8) & 0xFF;
  255. xaddr[3] = addr & 0xFF;
  256. if (wait_for_bb ()) {
  257. printf ("i2c_read: bus is busy\n");
  258. goto Done;
  259. }
  260. mpc_reg_out (&regs->cr, I2C_STA, I2C_STA);
  261. if (do_address (chip, 0)) {
  262. printf ("i2c_read: failed to address chip\n");
  263. goto Done;
  264. }
  265. if (send_bytes (chip, &xaddr[4 - alen], alen)) {
  266. printf ("i2c_read: send_bytes failed\n");
  267. goto Done;
  268. }
  269. mpc_reg_out (&regs->cr, I2C_RSTA, I2C_RSTA);
  270. if (do_address (chip, 1)) {
  271. printf ("i2c_read: failed to address chip\n");
  272. goto Done;
  273. }
  274. if (receive_bytes (chip, buf, len)) {
  275. printf ("i2c_read: receive_bytes failed\n");
  276. goto Done;
  277. }
  278. ret = 0;
  279. Done:
  280. mpc_reg_out (&regs->cr, 0, I2C_STA);
  281. return ret;
  282. }
  283. int i2c_write (uchar chip, uint addr, int alen, uchar * buf, int len)
  284. {
  285. uchar xaddr[4];
  286. i2c_t *regs = (i2c_t *) MMAP_I2C;
  287. int ret = -1;
  288. xaddr[0] = (addr >> 24) & 0xFF;
  289. xaddr[1] = (addr >> 16) & 0xFF;
  290. xaddr[2] = (addr >> 8) & 0xFF;
  291. xaddr[3] = addr & 0xFF;
  292. if (wait_for_bb ()) {
  293. printf ("i2c_write: bus is busy\n");
  294. goto Done;
  295. }
  296. mpc_reg_out (&regs->cr, I2C_STA, I2C_STA);
  297. if (do_address (chip, 0)) {
  298. printf ("i2c_write: failed to address chip\n");
  299. goto Done;
  300. }
  301. if (send_bytes (chip, &xaddr[4 - alen], alen)) {
  302. printf ("i2c_write: send_bytes failed\n");
  303. goto Done;
  304. }
  305. if (send_bytes (chip, buf, len)) {
  306. printf ("i2c_write: send_bytes failed\n");
  307. goto Done;
  308. }
  309. ret = 0;
  310. Done:
  311. mpc_reg_out (&regs->cr, 0, I2C_STA);
  312. return ret;
  313. }
  314. uchar i2c_reg_read (uchar chip, uchar reg)
  315. {
  316. char buf;
  317. i2c_read (chip, reg, 1, &buf, 1);
  318. return buf;
  319. }
  320. void i2c_reg_write (uchar chip, uchar reg, uchar val)
  321. {
  322. i2c_write (chip, reg, 1, &val, 1);
  323. return;
  324. }
  325. #endif /* CONFIG_HARD_I2C */