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  1. /*
  2. * armboot - Startup Code for ARM926EJS CPU-core
  3. *
  4. * Copyright (c) 2003 Texas Instruments
  5. *
  6. * ----- Adapted for OMAP1610 OMAP730 from ARM925t code ------
  7. *
  8. * Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
  9. * Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
  10. * Copyright (c) 2002 Gary Jennejohn <garyj@denx.de>
  11. * Copyright (c) 2003 Richard Woodruff <r-woodruff2@ti.com>
  12. * Copyright (c) 2003 Kshitij <kshitij@ti.com>
  13. * Copyright (c) 2010 Albert Aribaud <albert.aribaud@free.fr>
  14. *
  15. * See file CREDITS for list of people who contributed to this
  16. * project.
  17. *
  18. * This program is free software; you can redistribute it and/or
  19. * modify it under the terms of the GNU General Public License as
  20. * published by the Free Software Foundation; either version 2 of
  21. * the License, or (at your option) any later version.
  22. *
  23. * This program is distributed in the hope that it will be useful,
  24. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  25. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  26. * GNU General Public License for more details.
  27. *
  28. * You should have received a copy of the GNU General Public License
  29. * along with this program; if not, write to the Free Software
  30. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  31. * MA 02111-1307 USA
  32. */
  33. #include <config.h>
  34. #include <common.h>
  35. #include <version.h>
  36. #if defined(CONFIG_OMAP1610)
  37. #include <./configs/omap1510.h>
  38. #elif defined(CONFIG_OMAP730)
  39. #include <./configs/omap730.h>
  40. #endif
  41. /*
  42. *************************************************************************
  43. *
  44. * Jump vector table as in table 3.1 in [1]
  45. *
  46. *************************************************************************
  47. */
  48. .globl _start
  49. _start:
  50. b reset
  51. #ifdef CONFIG_PRELOADER
  52. /* No exception handlers in preloader */
  53. ldr pc, _hang
  54. ldr pc, _hang
  55. ldr pc, _hang
  56. ldr pc, _hang
  57. ldr pc, _hang
  58. ldr pc, _hang
  59. ldr pc, _hang
  60. _hang:
  61. .word do_hang
  62. /* pad to 64 byte boundary */
  63. .word 0x12345678
  64. .word 0x12345678
  65. .word 0x12345678
  66. .word 0x12345678
  67. .word 0x12345678
  68. .word 0x12345678
  69. .word 0x12345678
  70. #else
  71. ldr pc, _undefined_instruction
  72. ldr pc, _software_interrupt
  73. ldr pc, _prefetch_abort
  74. ldr pc, _data_abort
  75. ldr pc, _not_used
  76. ldr pc, _irq
  77. ldr pc, _fiq
  78. _undefined_instruction:
  79. .word undefined_instruction
  80. _software_interrupt:
  81. .word software_interrupt
  82. _prefetch_abort:
  83. .word prefetch_abort
  84. _data_abort:
  85. .word data_abort
  86. _not_used:
  87. .word not_used
  88. _irq:
  89. .word irq
  90. _fiq:
  91. .word fiq
  92. #endif /* CONFIG_PRELOADER */
  93. .balignl 16,0xdeadbeef
  94. /*
  95. *************************************************************************
  96. *
  97. * Startup Code (reset vector)
  98. *
  99. * do important init only if we don't start from memory!
  100. * setup Memory and board specific bits prior to relocation.
  101. * relocate armboot to ram
  102. * setup stack
  103. *
  104. *************************************************************************
  105. */
  106. .globl _TEXT_BASE
  107. _TEXT_BASE:
  108. .word TEXT_BASE
  109. /*
  110. * These are defined in the board-specific linker script.
  111. * Subtracting _start from them lets the linker put their
  112. * relative position in the executable instead of leaving
  113. * them null.
  114. */
  115. .globl _bss_start_ofs
  116. _bss_start_ofs:
  117. .word __bss_start - _start
  118. .globl _bss_end_ofs
  119. _bss_end_ofs:
  120. .word _end - _start
  121. #ifdef CONFIG_USE_IRQ
  122. /* IRQ stack memory (calculated at run-time) */
  123. .globl IRQ_STACK_START
  124. IRQ_STACK_START:
  125. .word 0x0badc0de
  126. /* IRQ stack memory (calculated at run-time) */
  127. .globl FIQ_STACK_START
  128. FIQ_STACK_START:
  129. .word 0x0badc0de
  130. #endif
  131. #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
  132. /* IRQ stack memory (calculated at run-time) + 8 bytes */
  133. .globl IRQ_STACK_START_IN
  134. IRQ_STACK_START_IN:
  135. .word 0x0badc0de
  136. /*
  137. * the actual reset code
  138. */
  139. reset:
  140. /*
  141. * set the cpu to SVC32 mode
  142. */
  143. mrs r0,cpsr
  144. bic r0,r0,#0x1f
  145. orr r0,r0,#0xd3
  146. msr cpsr,r0
  147. /*
  148. * we do sys-critical inits only at reboot,
  149. * not when booting from ram!
  150. */
  151. #ifndef CONFIG_SKIP_LOWLEVEL_INIT
  152. bl cpu_init_crit
  153. #endif
  154. /* Set stackpointer in internal RAM to call board_init_f */
  155. call_board_init_f:
  156. ldr sp, =(CONFIG_SYS_INIT_SP_ADDR)
  157. ldr r0,=0x00000000
  158. bl board_init_f
  159. /*------------------------------------------------------------------------------*/
  160. /*
  161. * void relocate_code (addr_sp, gd, addr_moni)
  162. *
  163. * This "function" does not return, instead it continues in RAM
  164. * after relocating the monitor code.
  165. *
  166. */
  167. .globl relocate_code
  168. relocate_code:
  169. mov r4, r0 /* save addr_sp */
  170. mov r5, r1 /* save addr of gd */
  171. mov r6, r2 /* save addr of destination */
  172. mov r7, r2 /* save addr of destination */
  173. /* Set up the stack */
  174. stack_setup:
  175. mov sp, r4
  176. adr r0, _start
  177. ldr r2, _TEXT_BASE
  178. ldr r3, _bss_start_ofs
  179. add r2, r0, r3 /* r2 <- source end address */
  180. cmp r0, r6
  181. beq clear_bss
  182. #ifndef CONFIG_SKIP_RELOCATE_UBOOT
  183. copy_loop:
  184. ldmia r0!, {r9-r10} /* copy from source address [r0] */
  185. stmia r6!, {r9-r10} /* copy to target address [r1] */
  186. cmp r0, r2 /* until source end address [r2] */
  187. blo copy_loop
  188. #ifndef CONFIG_PRELOADER
  189. /*
  190. * fix .rel.dyn relocations
  191. */
  192. ldr r0, _TEXT_BASE /* r0 <- Text base */
  193. sub r9, r7, r0 /* r9 <- relocation offset */
  194. ldr r10, _dynsym_start_ofs /* r10 <- sym table ofs */
  195. add r10, r10, r0 /* r10 <- sym table in FLASH */
  196. ldr r2, _rel_dyn_start_ofs /* r2 <- rel dyn start ofs */
  197. add r2, r2, r0 /* r2 <- rel dyn start in FLASH */
  198. ldr r3, _rel_dyn_end_ofs /* r3 <- rel dyn end ofs */
  199. add r3, r3, r0 /* r3 <- rel dyn end in FLASH */
  200. fixloop:
  201. ldr r0, [r2] /* r0 <- location to fix up, IN FLASH! */
  202. add r0, r9 /* r0 <- location to fix up in RAM */
  203. ldr r1, [r2, #4]
  204. and r8, r1, #0xff
  205. cmp r8, #23 /* relative fixup? */
  206. beq fixrel
  207. cmp r8, #2 /* absolute fixup? */
  208. beq fixabs
  209. /* ignore unknown type of fixup */
  210. b fixnext
  211. fixabs:
  212. /* absolute fix: set location to (offset) symbol value */
  213. mov r1, r1, LSR #4 /* r1 <- symbol index in .dynsym */
  214. add r1, r10, r1 /* r1 <- address of symbol in table */
  215. ldr r1, [r1, #4] /* r1 <- symbol value */
  216. add r1, r9 /* r1 <- relocated sym addr */
  217. b fixnext
  218. fixrel:
  219. /* relative fix: increase location by offset */
  220. ldr r1, [r0]
  221. add r1, r1, r9
  222. fixnext:
  223. str r1, [r0]
  224. add r2, r2, #8 /* each rel.dyn entry is 8 bytes */
  225. cmp r2, r3
  226. blo fixloop
  227. #endif
  228. #endif /* #ifndef CONFIG_SKIP_RELOCATE_UBOOT */
  229. clear_bss:
  230. #ifndef CONFIG_PRELOADER
  231. ldr r0, _bss_start_ofs
  232. ldr r1, _bss_end_ofs
  233. ldr r3, _TEXT_BASE /* Text base */
  234. mov r4, r7 /* reloc addr */
  235. add r0, r0, r4
  236. add r1, r1, r4
  237. mov r2, #0x00000000 /* clear */
  238. clbss_l:str r2, [r0] /* clear loop... */
  239. add r0, r0, #4
  240. cmp r0, r1
  241. bne clbss_l
  242. bl coloured_LED_init
  243. bl red_LED_on
  244. #endif
  245. /*
  246. * We are done. Do not return, instead branch to second part of board
  247. * initialization, now running from RAM.
  248. */
  249. #ifdef CONFIG_NAND_SPL
  250. ldr r0, _nand_boot_ofs
  251. mov pc, r0
  252. _nand_boot_ofs:
  253. .word nand_boot
  254. #else
  255. ldr r0, _board_init_r_ofs
  256. adr r1, _start
  257. add r0, r0, r1
  258. add lr, r0, r9
  259. /* setup parameters for board_init_r */
  260. mov r0, r5 /* gd_t */
  261. mov r1, r7 /* dest_addr */
  262. /* jump to it ... */
  263. mov pc, lr
  264. _board_init_r_ofs:
  265. .word board_init_r - _start
  266. #endif
  267. _rel_dyn_start_ofs:
  268. .word __rel_dyn_start - _start
  269. _rel_dyn_end_ofs:
  270. .word __rel_dyn_end - _start
  271. _dynsym_start_ofs:
  272. .word __dynsym_start - _start
  273. #else /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
  274. /*
  275. * the actual reset code
  276. */
  277. reset:
  278. /*
  279. * set the cpu to SVC32 mode
  280. */
  281. mrs r0,cpsr
  282. bic r0,r0,#0x1f
  283. orr r0,r0,#0xd3
  284. msr cpsr,r0
  285. /*
  286. * we do sys-critical inits only at reboot,
  287. * not when booting from ram!
  288. */
  289. #ifndef CONFIG_SKIP_LOWLEVEL_INIT
  290. bl cpu_init_crit
  291. #endif
  292. #ifndef CONFIG_SKIP_RELOCATE_UBOOT
  293. relocate: /* relocate U-Boot to RAM */
  294. adr r0, _start /* r0 <- current position of code */
  295. ldr r1, _TEXT_BASE /* test if we run from flash or RAM */
  296. cmp r0, r1 /* don't reloc during debug */
  297. beq stack_setup
  298. ldr r3, _bss_start_ofs /* r3 <- _bss_start - _start */
  299. add r2, r0, r3 /* r2 <- source end address */
  300. copy_loop:
  301. ldmia r0!, {r3-r10} /* copy from source address [r0] */
  302. stmia r1!, {r3-r10} /* copy to target address [r1] */
  303. cmp r0, r2 /* until source end address [r2] */
  304. blo copy_loop
  305. #endif /* CONFIG_SKIP_RELOCATE_UBOOT */
  306. /* Set up the stack */
  307. stack_setup:
  308. ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */
  309. sub sp, r0, #128 /* leave 32 words for abort-stack */
  310. #ifndef CONFIG_PRELOADER
  311. sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */
  312. sub r0, r0, #CONFIG_SYS_GBL_DATA_SIZE /* bdinfo */
  313. #ifdef CONFIG_USE_IRQ
  314. sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ)
  315. #endif
  316. #endif /* CONFIG_PRELOADER */
  317. sub sp, r0, #12 /* leave 3 words for abort-stack */
  318. bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
  319. clear_bss:
  320. adr r2, _start
  321. ldr r0, _bss_start_ofs /* find start of bss segment */
  322. add r0, r0, r2
  323. ldr r1, _bss_end_ofs /* stop here */
  324. add r1, r1, r2
  325. mov r2, #0x00000000 /* clear */
  326. #ifndef CONFIG_PRELOADER
  327. clbss_l:str r2, [r0] /* clear loop... */
  328. add r0, r0, #4
  329. cmp r0, r1
  330. blo clbss_l
  331. bl coloured_LED_init
  332. bl red_LED_on
  333. #endif /* CONFIG_PRELOADER */
  334. ldr r0, _start_armboot_ofs
  335. adr r1, _start
  336. add r0, r0, r1
  337. ldr pc, r0
  338. _start_armboot_ofs:
  339. #ifdef CONFIG_NAND_SPL
  340. .word nand_boot - _start
  341. #else
  342. .word start_armboot - _start
  343. #endif /* CONFIG_NAND_SPL */
  344. #endif /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
  345. /*
  346. *************************************************************************
  347. *
  348. * CPU_init_critical registers
  349. *
  350. * setup important registers
  351. * setup memory timing
  352. *
  353. *************************************************************************
  354. */
  355. #ifndef CONFIG_SKIP_LOWLEVEL_INIT
  356. cpu_init_crit:
  357. /*
  358. * flush v4 I/D caches
  359. */
  360. mov r0, #0
  361. mcr p15, 0, r0, c7, c7, 0 /* flush v3/v4 cache */
  362. mcr p15, 0, r0, c8, c7, 0 /* flush v4 TLB */
  363. /*
  364. * disable MMU stuff and caches
  365. */
  366. mrc p15, 0, r0, c1, c0, 0
  367. bic r0, r0, #0x00002300 /* clear bits 13, 9:8 (--V- --RS) */
  368. bic r0, r0, #0x00000087 /* clear bits 7, 2:0 (B--- -CAM) */
  369. orr r0, r0, #0x00000002 /* set bit 2 (A) Align */
  370. orr r0, r0, #0x00001000 /* set bit 12 (I) I-Cache */
  371. mcr p15, 0, r0, c1, c0, 0
  372. /*
  373. * Go setup Memory and board specific bits prior to relocation.
  374. */
  375. mov ip, lr /* perserve link reg across call */
  376. bl lowlevel_init /* go setup pll,mux,memory */
  377. mov lr, ip /* restore link */
  378. mov pc, lr /* back to my caller */
  379. #endif /* CONFIG_SKIP_LOWLEVEL_INIT */
  380. #ifndef CONFIG_PRELOADER
  381. /*
  382. *************************************************************************
  383. *
  384. * Interrupt handling
  385. *
  386. *************************************************************************
  387. */
  388. @
  389. @ IRQ stack frame.
  390. @
  391. #define S_FRAME_SIZE 72
  392. #define S_OLD_R0 68
  393. #define S_PSR 64
  394. #define S_PC 60
  395. #define S_LR 56
  396. #define S_SP 52
  397. #define S_IP 48
  398. #define S_FP 44
  399. #define S_R10 40
  400. #define S_R9 36
  401. #define S_R8 32
  402. #define S_R7 28
  403. #define S_R6 24
  404. #define S_R5 20
  405. #define S_R4 16
  406. #define S_R3 12
  407. #define S_R2 8
  408. #define S_R1 4
  409. #define S_R0 0
  410. #define MODE_SVC 0x13
  411. #define I_BIT 0x80
  412. /*
  413. * use bad_save_user_regs for abort/prefetch/undef/swi ...
  414. * use irq_save_user_regs / irq_restore_user_regs for IRQ/FIQ handling
  415. */
  416. .macro bad_save_user_regs
  417. @ carve out a frame on current user stack
  418. sub sp, sp, #S_FRAME_SIZE
  419. stmia sp, {r0 - r12} @ Save user registers (now in svc mode) r0-r12
  420. #if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
  421. adr r2, _start
  422. sub r2, r2, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN)
  423. sub r2, r2, #(CONFIG_SYS_GBL_DATA_SIZE+8) @ set base 2 words into abort stack
  424. #else
  425. ldr r2, IRQ_STACK_START_IN
  426. #endif
  427. @ get values for "aborted" pc and cpsr (into parm regs)
  428. ldmia r2, {r2 - r3}
  429. add r0, sp, #S_FRAME_SIZE @ grab pointer to old stack
  430. add r5, sp, #S_SP
  431. mov r1, lr
  432. stmia r5, {r0 - r3} @ save sp_SVC, lr_SVC, pc, cpsr
  433. mov r0, sp @ save current stack into r0 (param register)
  434. .endm
  435. .macro irq_save_user_regs
  436. sub sp, sp, #S_FRAME_SIZE
  437. stmia sp, {r0 - r12} @ Calling r0-r12
  438. @ !!!! R8 NEEDS to be saved !!!! a reserved stack spot would be good.
  439. add r8, sp, #S_PC
  440. stmdb r8, {sp, lr}^ @ Calling SP, LR
  441. str lr, [r8, #0] @ Save calling PC
  442. mrs r6, spsr
  443. str r6, [r8, #4] @ Save CPSR
  444. str r0, [r8, #8] @ Save OLD_R0
  445. mov r0, sp
  446. .endm
  447. .macro irq_restore_user_regs
  448. ldmia sp, {r0 - lr}^ @ Calling r0 - lr
  449. mov r0, r0
  450. ldr lr, [sp, #S_PC] @ Get PC
  451. add sp, sp, #S_FRAME_SIZE
  452. subs pc, lr, #4 @ return & move spsr_svc into cpsr
  453. .endm
  454. .macro get_bad_stack
  455. #if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
  456. adr r13, _start @ setup our mode stack
  457. sub r13, r13, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN)
  458. sub r13, r13, #(CONFIG_SYS_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack
  459. #else
  460. ldr r13, IRQ_STACK_START_IN @ setup our mode stack
  461. #endif
  462. str lr, [r13] @ save caller lr in position 0 of saved stack
  463. mrs lr, spsr @ get the spsr
  464. str lr, [r13, #4] @ save spsr in position 1 of saved stack
  465. mov r13, #MODE_SVC @ prepare SVC-Mode
  466. @ msr spsr_c, r13
  467. msr spsr, r13 @ switch modes, make sure moves will execute
  468. mov lr, pc @ capture return pc
  469. movs pc, lr @ jump to next instruction & switch modes.
  470. .endm
  471. .macro get_irq_stack @ setup IRQ stack
  472. ldr sp, IRQ_STACK_START
  473. .endm
  474. .macro get_fiq_stack @ setup FIQ stack
  475. ldr sp, FIQ_STACK_START
  476. .endm
  477. #endif /* CONFIG_PRELOADER */
  478. /*
  479. * exception handlers
  480. */
  481. #ifdef CONFIG_PRELOADER
  482. .align 5
  483. do_hang:
  484. ldr sp, _TEXT_BASE /* switch to abort stack */
  485. 1:
  486. bl 1b /* hang and never return */
  487. #else /* !CONFIG_PRELOADER */
  488. .align 5
  489. undefined_instruction:
  490. get_bad_stack
  491. bad_save_user_regs
  492. bl do_undefined_instruction
  493. .align 5
  494. software_interrupt:
  495. get_bad_stack
  496. bad_save_user_regs
  497. bl do_software_interrupt
  498. .align 5
  499. prefetch_abort:
  500. get_bad_stack
  501. bad_save_user_regs
  502. bl do_prefetch_abort
  503. .align 5
  504. data_abort:
  505. get_bad_stack
  506. bad_save_user_regs
  507. bl do_data_abort
  508. .align 5
  509. not_used:
  510. get_bad_stack
  511. bad_save_user_regs
  512. bl do_not_used
  513. #ifdef CONFIG_USE_IRQ
  514. .align 5
  515. irq:
  516. get_irq_stack
  517. irq_save_user_regs
  518. bl do_irq
  519. irq_restore_user_regs
  520. .align 5
  521. fiq:
  522. get_fiq_stack
  523. /* someone ought to write a more effiction fiq_save_user_regs */
  524. irq_save_user_regs
  525. bl do_fiq
  526. irq_restore_user_regs
  527. #else
  528. .align 5
  529. irq:
  530. get_bad_stack
  531. bad_save_user_regs
  532. bl do_irq
  533. .align 5
  534. fiq:
  535. get_bad_stack
  536. bad_save_user_regs
  537. bl do_fiq
  538. #endif
  539. #endif /* CONFIG_PRELOADER */