sh_i2c.c 6.4 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276
  1. /*
  2. * Copyright (C) 2011 Renesas Solutions Corp.
  3. * Copyright (C) 2011 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
  4. *
  5. * This program is free software; you can redistribute it and/or
  6. * modify it under the terms of the GNU General Public License as
  7. * published by the Free Software Foundation; either version 2 of
  8. * the License, or (at your option) any later version.
  9. *
  10. * This program is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; if not, write to the Free Software
  17. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  18. * MA 02111-1307 USA
  19. */
  20. #include <common.h>
  21. #include <asm/io.h>
  22. /* Every register is 32bit aligned, but only 8bits in size */
  23. #define ureg(name) u8 name; u8 __pad_##name##0; u16 __pad_##name##1;
  24. struct sh_i2c {
  25. ureg(icdr);
  26. ureg(iccr);
  27. ureg(icsr);
  28. ureg(icic);
  29. ureg(iccl);
  30. ureg(icch);
  31. };
  32. #undef ureg
  33. static struct sh_i2c *base;
  34. /* ICCR */
  35. #define SH_I2C_ICCR_ICE (1 << 7)
  36. #define SH_I2C_ICCR_RACK (1 << 6)
  37. #define SH_I2C_ICCR_RTS (1 << 4)
  38. #define SH_I2C_ICCR_BUSY (1 << 2)
  39. #define SH_I2C_ICCR_SCP (1 << 0)
  40. /* ICSR / ICIC */
  41. #define SH_IC_BUSY (1 << 3)
  42. #define SH_IC_TACK (1 << 2)
  43. #define SH_IC_WAIT (1 << 1)
  44. #define SH_IC_DTE (1 << 0)
  45. static u8 iccl, icch;
  46. #define IRQ_WAIT 1000
  47. static void irq_dte(struct sh_i2c *base)
  48. {
  49. int i;
  50. for (i = 0 ; i < IRQ_WAIT ; i++) {
  51. if (SH_IC_DTE & readb(&base->icsr))
  52. break;
  53. udelay(10);
  54. }
  55. }
  56. static void irq_busy(struct sh_i2c *base)
  57. {
  58. int i;
  59. for (i = 0 ; i < IRQ_WAIT ; i++) {
  60. if (!(SH_IC_BUSY & readb(&base->icsr)))
  61. break;
  62. udelay(10);
  63. }
  64. }
  65. static void i2c_set_addr(struct sh_i2c *base, u8 id, u8 reg, int stop)
  66. {
  67. writeb(readb(&base->iccr) & ~SH_I2C_ICCR_ICE, &base->iccr);
  68. writeb(readb(&base->iccr) | SH_I2C_ICCR_ICE, &base->iccr);
  69. writeb(iccl, &base->iccl);
  70. writeb(icch, &base->icch);
  71. writeb(0, &base->icic);
  72. writeb((SH_I2C_ICCR_ICE|SH_I2C_ICCR_RTS|SH_I2C_ICCR_BUSY), &base->iccr);
  73. irq_dte(base);
  74. writeb(id << 1, &base->icdr);
  75. irq_dte(base);
  76. writeb(reg, &base->icdr);
  77. if (stop)
  78. writeb((SH_I2C_ICCR_ICE|SH_I2C_ICCR_RTS), &base->iccr);
  79. irq_dte(base);
  80. }
  81. static void i2c_finish(struct sh_i2c *base)
  82. {
  83. writeb(0, &base->icsr);
  84. writeb(readb(&base->iccr) & ~SH_I2C_ICCR_ICE, &base->iccr);
  85. }
  86. static void i2c_raw_write(struct sh_i2c *base, u8 id, u8 reg, u8 val)
  87. {
  88. i2c_set_addr(base, id, reg, 0);
  89. udelay(10);
  90. writeb(val, &base->icdr);
  91. irq_dte(base);
  92. writeb((SH_I2C_ICCR_ICE | SH_I2C_ICCR_RTS), &base->iccr);
  93. irq_dte(base);
  94. irq_busy(base);
  95. i2c_finish(base);
  96. }
  97. static u8 i2c_raw_read(struct sh_i2c *base, u8 id, u8 reg)
  98. {
  99. u8 ret;
  100. i2c_set_addr(base, id, reg, 1);
  101. udelay(100);
  102. writeb((SH_I2C_ICCR_ICE|SH_I2C_ICCR_RTS|SH_I2C_ICCR_BUSY), &base->iccr);
  103. irq_dte(base);
  104. writeb(id << 1 | 0x01, &base->icdr);
  105. irq_dte(base);
  106. writeb((SH_I2C_ICCR_ICE|SH_I2C_ICCR_SCP), &base->iccr);
  107. irq_dte(base);
  108. ret = readb(&base->icdr);
  109. writeb((SH_I2C_ICCR_ICE|SH_I2C_ICCR_RACK), &base->iccr);
  110. readb(&base->icdr); /* Dummy read */
  111. irq_busy(base);
  112. i2c_finish(base);
  113. return ret;
  114. }
  115. #ifdef CONFIG_I2C_MULTI_BUS
  116. static unsigned int current_bus;
  117. /**
  118. * i2c_set_bus_num - change active I2C bus
  119. * @bus: bus index, zero based
  120. * @returns: 0 on success, non-0 on failure
  121. */
  122. int i2c_set_bus_num(unsigned int bus)
  123. {
  124. if ((bus < 0) || (bus >= CONFIG_SYS_MAX_I2C_BUS)) {
  125. printf("Bad bus: %d\n", bus);
  126. return -1;
  127. }
  128. switch (bus) {
  129. case 0:
  130. base = (void *)CONFIG_SH_I2C_BASE0;
  131. break;
  132. case 1:
  133. base = (void *)CONFIG_SH_I2C_BASE1;
  134. break;
  135. default:
  136. return -1;
  137. }
  138. current_bus = bus;
  139. return 0;
  140. }
  141. /**
  142. * i2c_get_bus_num - returns index of active I2C bus
  143. */
  144. unsigned int i2c_get_bus_num(void)
  145. {
  146. return current_bus;
  147. }
  148. #endif
  149. #define SH_I2C_ICCL_CALC(clk, date, t_low, t_high) \
  150. ((clk / rate) * (t_low / t_low + t_high))
  151. #define SH_I2C_ICCH_CALC(clk, date, t_low, t_high) \
  152. ((clk / rate) * (t_high / t_low + t_high))
  153. void i2c_init(int speed, int slaveaddr)
  154. {
  155. int num, denom, tmp;
  156. #ifdef CONFIG_I2C_MULTI_BUS
  157. current_bus = 0;
  158. #endif
  159. base = (struct sh_i2c *)CONFIG_SH_I2C_BASE0;
  160. /*
  161. * Calculate the value for iccl. From the data sheet:
  162. * iccl = (p-clock / transfer-rate) * (L / (L + H))
  163. * where L and H are the SCL low and high ratio.
  164. */
  165. num = CONFIG_SH_I2C_CLOCK * CONFIG_SH_I2C_DATA_LOW;
  166. denom = speed * (CONFIG_SH_I2C_DATA_HIGH + CONFIG_SH_I2C_DATA_LOW);
  167. tmp = num * 10 / denom;
  168. if (tmp % 10 >= 5)
  169. iccl = (u8)((num/denom) + 1);
  170. else
  171. iccl = (u8)(num/denom);
  172. /* Calculate the value for icch. From the data sheet:
  173. icch = (p clock / transfer rate) * (H / (L + H)) */
  174. num = CONFIG_SH_I2C_CLOCK * CONFIG_SH_I2C_DATA_HIGH;
  175. tmp = num * 10 / denom;
  176. if (tmp % 10 >= 5)
  177. icch = (u8)((num/denom) + 1);
  178. else
  179. icch = (u8)(num/denom);
  180. }
  181. /*
  182. * i2c_read: - Read multiple bytes from an i2c device
  183. *
  184. * The higher level routines take into account that this function is only
  185. * called with len < page length of the device (see configuration file)
  186. *
  187. * @chip: address of the chip which is to be read
  188. * @addr: i2c data address within the chip
  189. * @alen: length of the i2c data address (1..2 bytes)
  190. * @buffer: where to write the data
  191. * @len: how much byte do we want to read
  192. * @return: 0 in case of success
  193. */
  194. int i2c_read(u8 chip, u32 addr, int alen, u8 *buffer, int len)
  195. {
  196. int i = 0;
  197. for (i = 0 ; i < len ; i++)
  198. buffer[i] = i2c_raw_read(base, chip, addr + i);
  199. return 0;
  200. }
  201. /*
  202. * i2c_write: - Write multiple bytes to an i2c device
  203. *
  204. * The higher level routines take into account that this function is only
  205. * called with len < page length of the device (see configuration file)
  206. *
  207. * @chip: address of the chip which is to be written
  208. * @addr: i2c data address within the chip
  209. * @alen: length of the i2c data address (1..2 bytes)
  210. * @buffer: where to find the data to be written
  211. * @len: how much byte do we want to read
  212. * @return: 0 in case of success
  213. */
  214. int i2c_write(u8 chip, u32 addr, int alen, u8 *buffer, int len)
  215. {
  216. int i = 0;
  217. for (i = 0; i < len ; i++)
  218. i2c_raw_write(base, chip, addr + i, buffer[i]);
  219. return 0;
  220. }
  221. /*
  222. * i2c_probe: - Test if a chip answers for a given i2c address
  223. *
  224. * @chip: address of the chip which is searched for
  225. * @return: 0 if a chip was found, -1 otherwhise
  226. */
  227. int i2c_probe(u8 chip)
  228. {
  229. return 0;
  230. }