usb_ohci.c 44 KB

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  1. /*
  2. * URB OHCI HCD (Host Controller Driver) for USB on the PPC440EP.
  3. *
  4. * (C) Copyright 2003-2004
  5. * Gary Jennejohn, DENX Software Engineering <garyj@denx.de>
  6. *
  7. * (C) Copyright 2004
  8. * Pierre Aubert, Staubli Faverges <p.aubert@staubli.com>
  9. *
  10. * Note: Much of this code has been derived from Linux 2.4
  11. * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
  12. * (C) Copyright 2000-2002 David Brownell
  13. *
  14. * See file CREDITS for list of people who contributed to this
  15. * project.
  16. *
  17. * This program is free software; you can redistribute it and/or
  18. * modify it under the terms of the GNU General Public License as
  19. * published by the Free Software Foundation; either version 2 of
  20. * the License, or (at your option) any later version.
  21. *
  22. * This program is distributed in the hope that it will be useful,
  23. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  24. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  25. * GNU General Public License for more details.
  26. *
  27. * You should have received a copy of the GNU General Public License
  28. * along with this program; if not, write to the Free Software
  29. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  30. * MA 02111-1307 USA
  31. *
  32. */
  33. /*
  34. * IMPORTANT NOTES
  35. * 1 - this driver is intended for use with USB Mass Storage Devices
  36. * (BBB) ONLY. There is NO support for Interrupt or Isochronous pipes!
  37. */
  38. #include <common.h>
  39. #ifdef CONFIG_USB_OHCI
  40. #include <malloc.h>
  41. #include <usb.h>
  42. #include "usb_ohci.h"
  43. #define OHCI_USE_NPS /* force NoPowerSwitching mode */
  44. #undef OHCI_VERBOSE_DEBUG /* not always helpful */
  45. #undef DEBUG
  46. #undef SHOW_INFO
  47. #undef OHCI_FILL_TRACE
  48. /* For initializing controller (mask in an HCFS mode too) */
  49. #define OHCI_CONTROL_INIT \
  50. (OHCI_CTRL_CBSR & 0x3) | OHCI_CTRL_IE | OHCI_CTRL_PLE
  51. #define readl(a) (*((volatile u32 *)(a)))
  52. #define writel(a, b) (*((volatile u32 *)(b)) = ((volatile u32)a))
  53. #define min_t(type,x,y) ({ type __x = (x); type __y = (y); __x < __y ? __x: __y; })
  54. #ifdef DEBUG
  55. #define dbg(format, arg...) printf("DEBUG: " format "\n", ## arg)
  56. #else
  57. #define dbg(format, arg...) do {} while(0)
  58. #endif /* DEBUG */
  59. #define err(format, arg...) printf("ERROR: " format "\n", ## arg)
  60. #ifdef SHOW_INFO
  61. #define info(format, arg...) printf("INFO: " format "\n", ## arg)
  62. #else
  63. #define info(format, arg...) do {} while(0)
  64. #endif
  65. #define m16_swap(x) swap_16(x)
  66. #define m32_swap(x) swap_32(x)
  67. #if defined(CONFIG_405EZ) || defined(CONFIG_440EP) || defined(CONFIG_440EPX)
  68. #define ohci_cpu_to_le16(x) (x)
  69. #define ohci_cpu_to_le32(x) (x)
  70. #else
  71. #define ohci_cpu_to_le16(x) swap_16(x)
  72. #define ohci_cpu_to_le32(x) swap_32(x)
  73. #endif
  74. /* global ohci_t */
  75. static ohci_t gohci;
  76. /* this must be aligned to a 256 byte boundary */
  77. struct ohci_hcca ghcca[1];
  78. /* a pointer to the aligned storage */
  79. struct ohci_hcca *phcca;
  80. /* this allocates EDs for all possible endpoints */
  81. struct ohci_device ohci_dev;
  82. /* urb_priv */
  83. urb_priv_t urb_priv;
  84. /* RHSC flag */
  85. int got_rhsc;
  86. /* device which was disconnected */
  87. struct usb_device *devgone;
  88. /* flag guarding URB transation */
  89. int urb_finished = 0;
  90. /*-------------------------------------------------------------------------*/
  91. /* AMD-756 (D2 rev) reports corrupt register contents in some cases.
  92. * The erratum (#4) description is incorrect. AMD's workaround waits
  93. * till some bits (mostly reserved) are clear; ok for all revs.
  94. */
  95. #define OHCI_QUIRK_AMD756 0xabcd
  96. #define read_roothub(hc, register, mask) ({ \
  97. u32 temp = readl (&hc->regs->roothub.register); \
  98. if (hc->flags & OHCI_QUIRK_AMD756) \
  99. while (temp & mask) \
  100. temp = readl (&hc->regs->roothub.register); \
  101. temp; })
  102. static u32 roothub_a (struct ohci *hc)
  103. { return read_roothub (hc, a, 0xfc0fe000); }
  104. static inline u32 roothub_b (struct ohci *hc)
  105. { return readl (&hc->regs->roothub.b); }
  106. static inline u32 roothub_status (struct ohci *hc)
  107. { return readl (&hc->regs->roothub.status); }
  108. static u32 roothub_portstatus (struct ohci *hc, int i)
  109. { return read_roothub (hc, portstatus [i], 0xffe0fce0); }
  110. /* forward declaration */
  111. static int hc_interrupt (void);
  112. static void
  113. td_submit_job (struct usb_device * dev, unsigned long pipe, void * buffer,
  114. int transfer_len, struct devrequest * setup, urb_priv_t * urb, int interval);
  115. /*-------------------------------------------------------------------------*
  116. * URB support functions
  117. *-------------------------------------------------------------------------*/
  118. /* free HCD-private data associated with this URB */
  119. static void urb_free_priv (urb_priv_t * urb)
  120. {
  121. int i;
  122. int last;
  123. struct td * td;
  124. last = urb->length - 1;
  125. if (last >= 0) {
  126. for (i = 0; i <= last; i++) {
  127. td = urb->td[i];
  128. if (td) {
  129. td->usb_dev = NULL;
  130. urb->td[i] = NULL;
  131. }
  132. }
  133. }
  134. }
  135. /*-------------------------------------------------------------------------*/
  136. #ifdef DEBUG
  137. static int sohci_get_current_frame_number (struct usb_device * dev);
  138. /* debug| print the main components of an URB
  139. * small: 0) header + data packets 1) just header */
  140. static void pkt_print (struct usb_device * dev, unsigned long pipe, void * buffer,
  141. int transfer_len, struct devrequest * setup, char * str, int small)
  142. {
  143. urb_priv_t * purb = &urb_priv;
  144. dbg("%s URB:[%4x] dev:%2d,ep:%2d-%c,type:%s,len:%d/%d stat:%#lx",
  145. str,
  146. sohci_get_current_frame_number (dev),
  147. usb_pipedevice (pipe),
  148. usb_pipeendpoint (pipe),
  149. usb_pipeout (pipe)? 'O': 'I',
  150. usb_pipetype (pipe) < 2? (usb_pipeint (pipe)? "INTR": "ISOC"):
  151. (usb_pipecontrol (pipe)? "CTRL": "BULK"),
  152. purb->actual_length,
  153. transfer_len, dev->status);
  154. #ifdef OHCI_VERBOSE_DEBUG
  155. if (!small) {
  156. int i, len;
  157. if (usb_pipecontrol (pipe)) {
  158. printf (__FILE__ ": cmd(8):");
  159. for (i = 0; i < 8 ; i++)
  160. printf (" %02x", ((__u8 *) setup) [i]);
  161. printf ("\n");
  162. }
  163. if (transfer_len > 0 && buffer) {
  164. printf (__FILE__ ": data(%d/%d):",
  165. purb->actual_length,
  166. transfer_len);
  167. len = usb_pipeout (pipe)?
  168. transfer_len: purb->actual_length;
  169. for (i = 0; i < 16 && i < len; i++)
  170. printf (" %02x", ((__u8 *) buffer) [i]);
  171. printf ("%s\n", i < len? "...": "");
  172. }
  173. }
  174. #endif
  175. }
  176. /* just for debugging; prints non-empty branches of the int ed tree inclusive iso eds*/
  177. void ep_print_int_eds (ohci_t *ohci, char * str) {
  178. int i, j;
  179. __u32 * ed_p;
  180. for (i= 0; i < 32; i++) {
  181. j = 5;
  182. ed_p = &(ohci->hcca->int_table [i]);
  183. if (*ed_p == 0)
  184. continue;
  185. printf (__FILE__ ": %s branch int %2d(%2x):", str, i, i);
  186. while (*ed_p != 0 && j--) {
  187. ed_t *ed = (ed_t *)ohci_cpu_to_le32(ed_p);
  188. printf (" ed: %4x;", ed->hwINFO);
  189. ed_p = &ed->hwNextED;
  190. }
  191. printf ("\n");
  192. }
  193. }
  194. static void ohci_dump_intr_mask (char *label, __u32 mask)
  195. {
  196. dbg ("%s: 0x%08x%s%s%s%s%s%s%s%s%s",
  197. label,
  198. mask,
  199. (mask & OHCI_INTR_MIE) ? " MIE" : "",
  200. (mask & OHCI_INTR_OC) ? " OC" : "",
  201. (mask & OHCI_INTR_RHSC) ? " RHSC" : "",
  202. (mask & OHCI_INTR_FNO) ? " FNO" : "",
  203. (mask & OHCI_INTR_UE) ? " UE" : "",
  204. (mask & OHCI_INTR_RD) ? " RD" : "",
  205. (mask & OHCI_INTR_SF) ? " SF" : "",
  206. (mask & OHCI_INTR_WDH) ? " WDH" : "",
  207. (mask & OHCI_INTR_SO) ? " SO" : ""
  208. );
  209. }
  210. static void maybe_print_eds (char *label, __u32 value)
  211. {
  212. ed_t *edp = (ed_t *)value;
  213. if (value) {
  214. dbg ("%s %08x", label, value);
  215. dbg ("%08x", edp->hwINFO);
  216. dbg ("%08x", edp->hwTailP);
  217. dbg ("%08x", edp->hwHeadP);
  218. dbg ("%08x", edp->hwNextED);
  219. }
  220. }
  221. static char * hcfs2string (int state)
  222. {
  223. switch (state) {
  224. case OHCI_USB_RESET: return "reset";
  225. case OHCI_USB_RESUME: return "resume";
  226. case OHCI_USB_OPER: return "operational";
  227. case OHCI_USB_SUSPEND: return "suspend";
  228. }
  229. return "?";
  230. }
  231. /* dump control and status registers */
  232. static void ohci_dump_status (ohci_t *controller)
  233. {
  234. struct ohci_regs *regs = controller->regs;
  235. __u32 temp;
  236. temp = readl (&regs->revision) & 0xff;
  237. if (temp != 0x10)
  238. dbg ("spec %d.%d", (temp >> 4), (temp & 0x0f));
  239. temp = readl (&regs->control);
  240. dbg ("control: 0x%08x%s%s%s HCFS=%s%s%s%s%s CBSR=%d", temp,
  241. (temp & OHCI_CTRL_RWE) ? " RWE" : "",
  242. (temp & OHCI_CTRL_RWC) ? " RWC" : "",
  243. (temp & OHCI_CTRL_IR) ? " IR" : "",
  244. hcfs2string (temp & OHCI_CTRL_HCFS),
  245. (temp & OHCI_CTRL_BLE) ? " BLE" : "",
  246. (temp & OHCI_CTRL_CLE) ? " CLE" : "",
  247. (temp & OHCI_CTRL_IE) ? " IE" : "",
  248. (temp & OHCI_CTRL_PLE) ? " PLE" : "",
  249. temp & OHCI_CTRL_CBSR
  250. );
  251. temp = readl (&regs->cmdstatus);
  252. dbg ("cmdstatus: 0x%08x SOC=%d%s%s%s%s", temp,
  253. (temp & OHCI_SOC) >> 16,
  254. (temp & OHCI_OCR) ? " OCR" : "",
  255. (temp & OHCI_BLF) ? " BLF" : "",
  256. (temp & OHCI_CLF) ? " CLF" : "",
  257. (temp & OHCI_HCR) ? " HCR" : ""
  258. );
  259. ohci_dump_intr_mask ("intrstatus", readl (&regs->intrstatus));
  260. ohci_dump_intr_mask ("intrenable", readl (&regs->intrenable));
  261. maybe_print_eds ("ed_periodcurrent", readl (&regs->ed_periodcurrent));
  262. maybe_print_eds ("ed_controlhead", readl (&regs->ed_controlhead));
  263. maybe_print_eds ("ed_controlcurrent", readl (&regs->ed_controlcurrent));
  264. maybe_print_eds ("ed_bulkhead", readl (&regs->ed_bulkhead));
  265. maybe_print_eds ("ed_bulkcurrent", readl (&regs->ed_bulkcurrent));
  266. maybe_print_eds ("donehead", readl (&regs->donehead));
  267. }
  268. static void ohci_dump_roothub (ohci_t *controller, int verbose)
  269. {
  270. __u32 temp, ndp, i;
  271. temp = roothub_a (controller);
  272. ndp = (temp & RH_A_NDP);
  273. if (verbose) {
  274. dbg ("roothub.a: %08x POTPGT=%d%s%s%s%s%s NDP=%d", temp,
  275. ((temp & RH_A_POTPGT) >> 24) & 0xff,
  276. (temp & RH_A_NOCP) ? " NOCP" : "",
  277. (temp & RH_A_OCPM) ? " OCPM" : "",
  278. (temp & RH_A_DT) ? " DT" : "",
  279. (temp & RH_A_NPS) ? " NPS" : "",
  280. (temp & RH_A_PSM) ? " PSM" : "",
  281. ndp
  282. );
  283. temp = roothub_b (controller);
  284. dbg ("roothub.b: %08x PPCM=%04x DR=%04x",
  285. temp,
  286. (temp & RH_B_PPCM) >> 16,
  287. (temp & RH_B_DR)
  288. );
  289. temp = roothub_status (controller);
  290. dbg ("roothub.status: %08x%s%s%s%s%s%s",
  291. temp,
  292. (temp & RH_HS_CRWE) ? " CRWE" : "",
  293. (temp & RH_HS_OCIC) ? " OCIC" : "",
  294. (temp & RH_HS_LPSC) ? " LPSC" : "",
  295. (temp & RH_HS_DRWE) ? " DRWE" : "",
  296. (temp & RH_HS_OCI) ? " OCI" : "",
  297. (temp & RH_HS_LPS) ? " LPS" : ""
  298. );
  299. }
  300. for (i = 0; i < ndp; i++) {
  301. temp = roothub_portstatus (controller, i);
  302. dbg ("roothub.portstatus [%d] = 0x%08x%s%s%s%s%s%s%s%s%s%s%s%s",
  303. i,
  304. temp,
  305. (temp & RH_PS_PRSC) ? " PRSC" : "",
  306. (temp & RH_PS_OCIC) ? " OCIC" : "",
  307. (temp & RH_PS_PSSC) ? " PSSC" : "",
  308. (temp & RH_PS_PESC) ? " PESC" : "",
  309. (temp & RH_PS_CSC) ? " CSC" : "",
  310. (temp & RH_PS_LSDA) ? " LSDA" : "",
  311. (temp & RH_PS_PPS) ? " PPS" : "",
  312. (temp & RH_PS_PRS) ? " PRS" : "",
  313. (temp & RH_PS_POCI) ? " POCI" : "",
  314. (temp & RH_PS_PSS) ? " PSS" : "",
  315. (temp & RH_PS_PES) ? " PES" : "",
  316. (temp & RH_PS_CCS) ? " CCS" : ""
  317. );
  318. }
  319. }
  320. static void ohci_dump (ohci_t *controller, int verbose)
  321. {
  322. dbg ("OHCI controller usb-%s state", controller->slot_name);
  323. /* dumps some of the state we know about */
  324. ohci_dump_status (controller);
  325. if (verbose)
  326. ep_print_int_eds (controller, "hcca");
  327. dbg ("hcca frame #%04x", controller->hcca->frame_no);
  328. ohci_dump_roothub (controller, 1);
  329. }
  330. #endif /* DEBUG */
  331. /*-------------------------------------------------------------------------*
  332. * Interface functions (URB)
  333. *-------------------------------------------------------------------------*/
  334. /* get a transfer request */
  335. int sohci_submit_job(struct usb_device *dev, unsigned long pipe, void *buffer,
  336. int transfer_len, struct devrequest *setup, int interval)
  337. {
  338. ohci_t *ohci;
  339. ed_t * ed;
  340. urb_priv_t *purb_priv;
  341. int i, size = 0;
  342. ohci = &gohci;
  343. /* when controller's hung, permit only roothub cleanup attempts
  344. * such as powering down ports */
  345. if (ohci->disabled) {
  346. err("sohci_submit_job: EPIPE");
  347. return -1;
  348. }
  349. /* if we have an unfinished URB from previous transaction let's
  350. * fail and scream as quickly as possible so as not to corrupt
  351. * further communication */
  352. if (!urb_finished) {
  353. err("sohci_submit_job: URB NOT FINISHED");
  354. return -1;
  355. }
  356. /* we're about to begin a new transaction here so mark the URB unfinished */
  357. urb_finished = 0;
  358. /* every endpoint has a ed, locate and fill it */
  359. if (!(ed = ep_add_ed (dev, pipe))) {
  360. err("sohci_submit_job: ENOMEM");
  361. return -1;
  362. }
  363. /* for the private part of the URB we need the number of TDs (size) */
  364. switch (usb_pipetype (pipe)) {
  365. case PIPE_BULK: /* one TD for every 4096 Byte */
  366. size = (transfer_len - 1) / 4096 + 1;
  367. break;
  368. case PIPE_CONTROL: /* 1 TD for setup, 1 for ACK and 1 for every 4096 B */
  369. size = (transfer_len == 0)? 2:
  370. (transfer_len - 1) / 4096 + 3;
  371. break;
  372. }
  373. if (size >= (N_URB_TD - 1)) {
  374. err("need %d TDs, only have %d", size, N_URB_TD);
  375. return -1;
  376. }
  377. purb_priv = &urb_priv;
  378. purb_priv->pipe = pipe;
  379. /* fill the private part of the URB */
  380. purb_priv->length = size;
  381. purb_priv->ed = ed;
  382. purb_priv->actual_length = 0;
  383. /* allocate the TDs */
  384. /* note that td[0] was allocated in ep_add_ed */
  385. for (i = 0; i < size; i++) {
  386. purb_priv->td[i] = td_alloc (dev);
  387. if (!purb_priv->td[i]) {
  388. purb_priv->length = i;
  389. urb_free_priv (purb_priv);
  390. err("sohci_submit_job: ENOMEM");
  391. return -1;
  392. }
  393. }
  394. if (ed->state == ED_NEW || (ed->state & ED_DEL)) {
  395. urb_free_priv (purb_priv);
  396. err("sohci_submit_job: EINVAL");
  397. return -1;
  398. }
  399. /* link the ed into a chain if is not already */
  400. if (ed->state != ED_OPER)
  401. ep_link (ohci, ed);
  402. /* fill the TDs and link it to the ed */
  403. td_submit_job(dev, pipe, buffer, transfer_len, setup, purb_priv, interval);
  404. return 0;
  405. }
  406. /*-------------------------------------------------------------------------*/
  407. #ifdef DEBUG
  408. /* tell us the current USB frame number */
  409. static int sohci_get_current_frame_number (struct usb_device *usb_dev)
  410. {
  411. ohci_t *ohci = &gohci;
  412. return ohci_cpu_to_le16 (ohci->hcca->frame_no);
  413. }
  414. #endif
  415. /*-------------------------------------------------------------------------*
  416. * ED handling functions
  417. *-------------------------------------------------------------------------*/
  418. /* link an ed into one of the HC chains */
  419. static int ep_link (ohci_t *ohci, ed_t *edi)
  420. {
  421. volatile ed_t *ed = edi;
  422. ed->state = ED_OPER;
  423. switch (ed->type) {
  424. case PIPE_CONTROL:
  425. ed->hwNextED = 0;
  426. if (ohci->ed_controltail == NULL) {
  427. writel (ed, &ohci->regs->ed_controlhead);
  428. } else {
  429. ohci->ed_controltail->hwNextED = ohci_cpu_to_le32 ((unsigned long)ed);
  430. }
  431. ed->ed_prev = ohci->ed_controltail;
  432. if (!ohci->ed_controltail && !ohci->ed_rm_list[0] &&
  433. !ohci->ed_rm_list[1] && !ohci->sleeping) {
  434. ohci->hc_control |= OHCI_CTRL_CLE;
  435. writel (ohci->hc_control, &ohci->regs->control);
  436. }
  437. ohci->ed_controltail = edi;
  438. break;
  439. case PIPE_BULK:
  440. ed->hwNextED = 0;
  441. if (ohci->ed_bulktail == NULL) {
  442. writel (ed, &ohci->regs->ed_bulkhead);
  443. } else {
  444. ohci->ed_bulktail->hwNextED = ohci_cpu_to_le32 ((unsigned long)ed);
  445. }
  446. ed->ed_prev = ohci->ed_bulktail;
  447. if (!ohci->ed_bulktail && !ohci->ed_rm_list[0] &&
  448. !ohci->ed_rm_list[1] && !ohci->sleeping) {
  449. ohci->hc_control |= OHCI_CTRL_BLE;
  450. writel (ohci->hc_control, &ohci->regs->control);
  451. }
  452. ohci->ed_bulktail = edi;
  453. break;
  454. }
  455. return 0;
  456. }
  457. /*-------------------------------------------------------------------------*/
  458. /* unlink an ed from one of the HC chains.
  459. * just the link to the ed is unlinked.
  460. * the link from the ed still points to another operational ed or 0
  461. * so the HC can eventually finish the processing of the unlinked ed */
  462. static int ep_unlink (ohci_t *ohci, ed_t *edi)
  463. {
  464. volatile ed_t *ed = edi;
  465. ed->hwINFO |= ohci_cpu_to_le32 (OHCI_ED_SKIP);
  466. switch (ed->type) {
  467. case PIPE_CONTROL:
  468. if (ed->ed_prev == NULL) {
  469. if (!ed->hwNextED) {
  470. ohci->hc_control &= ~OHCI_CTRL_CLE;
  471. writel (ohci->hc_control, &ohci->regs->control);
  472. }
  473. writel (ohci_cpu_to_le32 (*((__u32 *)&ed->hwNextED)), &ohci->regs->ed_controlhead);
  474. } else {
  475. ed->ed_prev->hwNextED = ed->hwNextED;
  476. }
  477. if (ohci->ed_controltail == ed) {
  478. ohci->ed_controltail = ed->ed_prev;
  479. } else {
  480. ((ed_t *)ohci_cpu_to_le32 (*((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
  481. }
  482. break;
  483. case PIPE_BULK:
  484. if (ed->ed_prev == NULL) {
  485. if (!ed->hwNextED) {
  486. ohci->hc_control &= ~OHCI_CTRL_BLE;
  487. writel (ohci->hc_control, &ohci->regs->control);
  488. }
  489. writel (ohci_cpu_to_le32 (*((__u32 *)&ed->hwNextED)), &ohci->regs->ed_bulkhead);
  490. } else {
  491. ed->ed_prev->hwNextED = ed->hwNextED;
  492. }
  493. if (ohci->ed_bulktail == ed) {
  494. ohci->ed_bulktail = ed->ed_prev;
  495. } else {
  496. ((ed_t *)ohci_cpu_to_le32 (*((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
  497. }
  498. break;
  499. }
  500. ed->state = ED_UNLINK;
  501. return 0;
  502. }
  503. /*-------------------------------------------------------------------------*/
  504. /* add/reinit an endpoint; this should be done once at the usb_set_configuration command,
  505. * but the USB stack is a little bit stateless so we do it at every transaction
  506. * if the state of the ed is ED_NEW then a dummy td is added and the state is changed to ED_UNLINK
  507. * in all other cases the state is left unchanged
  508. * the ed info fields are setted anyway even though most of them should not change */
  509. static ed_t * ep_add_ed (struct usb_device *usb_dev, unsigned long pipe)
  510. {
  511. td_t *td;
  512. ed_t *ed_ret;
  513. volatile ed_t *ed;
  514. ed = ed_ret = &ohci_dev.ed[(usb_pipeendpoint (pipe) << 1) |
  515. (usb_pipecontrol (pipe)? 0: usb_pipeout (pipe))];
  516. if ((ed->state & ED_DEL) || (ed->state & ED_URB_DEL)) {
  517. err("ep_add_ed: pending delete");
  518. /* pending delete request */
  519. return NULL;
  520. }
  521. if (ed->state == ED_NEW) {
  522. ed->hwINFO = ohci_cpu_to_le32 (OHCI_ED_SKIP); /* skip ed */
  523. /* dummy td; end of td list for ed */
  524. td = td_alloc (usb_dev);
  525. ed->hwTailP = ohci_cpu_to_le32 ((unsigned long)td);
  526. ed->hwHeadP = ed->hwTailP;
  527. ed->state = ED_UNLINK;
  528. ed->type = usb_pipetype (pipe);
  529. ohci_dev.ed_cnt++;
  530. }
  531. ed->hwINFO = ohci_cpu_to_le32 (usb_pipedevice (pipe)
  532. | usb_pipeendpoint (pipe) << 7
  533. | (usb_pipeisoc (pipe)? 0x8000: 0)
  534. | (usb_pipecontrol (pipe)? 0: (usb_pipeout (pipe)? 0x800: 0x1000))
  535. | (usb_dev->speed == USB_SPEED_LOW) << 13
  536. | usb_maxpacket (usb_dev, pipe) << 16);
  537. return ed_ret;
  538. }
  539. /*-------------------------------------------------------------------------*
  540. * TD handling functions
  541. *-------------------------------------------------------------------------*/
  542. /* enqueue next TD for this URB (OHCI spec 5.2.8.2) */
  543. static void td_fill (ohci_t *ohci, unsigned int info,
  544. void *data, int len,
  545. struct usb_device *dev, int index, urb_priv_t *urb_priv)
  546. {
  547. volatile td_t *td, *td_pt;
  548. #ifdef OHCI_FILL_TRACE
  549. int i;
  550. #endif
  551. if (index > urb_priv->length) {
  552. err("index > length");
  553. return;
  554. }
  555. /* use this td as the next dummy */
  556. td_pt = urb_priv->td [index];
  557. td_pt->hwNextTD = 0;
  558. /* fill the old dummy TD */
  559. td = urb_priv->td [index] = (td_t *)(ohci_cpu_to_le32 (urb_priv->ed->hwTailP) & ~0xf);
  560. td->ed = urb_priv->ed;
  561. td->next_dl_td = NULL;
  562. td->index = index;
  563. td->data = (__u32)data;
  564. #ifdef OHCI_FILL_TRACE
  565. if (usb_pipebulk(urb_priv->pipe) && usb_pipeout(urb_priv->pipe)) {
  566. for (i = 0; i < len; i++)
  567. printf("td->data[%d] %#2x ",i, ((unsigned char *)td->data)[i]);
  568. printf("\n");
  569. }
  570. #endif
  571. if (!len)
  572. data = 0;
  573. td->hwINFO = ohci_cpu_to_le32 (info);
  574. td->hwCBP = ohci_cpu_to_le32 ((unsigned long)data);
  575. if (data)
  576. td->hwBE = ohci_cpu_to_le32 ((unsigned long)(data + len - 1));
  577. else
  578. td->hwBE = 0;
  579. td->hwNextTD = ohci_cpu_to_le32 ((unsigned long)td_pt);
  580. /* append to queue */
  581. td->ed->hwTailP = td->hwNextTD;
  582. }
  583. /*-------------------------------------------------------------------------*/
  584. /* prepare all TDs of a transfer */
  585. static void td_submit_job (struct usb_device *dev, unsigned long pipe, void *buffer,
  586. int transfer_len, struct devrequest *setup, urb_priv_t *urb, int interval)
  587. {
  588. ohci_t *ohci = &gohci;
  589. int data_len = transfer_len;
  590. void *data;
  591. int cnt = 0;
  592. __u32 info = 0;
  593. unsigned int toggle = 0;
  594. /* OHCI handles the DATA-toggles itself, we just use the USB-toggle bits for reseting */
  595. if(usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe))) {
  596. toggle = TD_T_TOGGLE;
  597. } else {
  598. toggle = TD_T_DATA0;
  599. usb_settoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe), 1);
  600. }
  601. urb->td_cnt = 0;
  602. if (data_len)
  603. data = buffer;
  604. else
  605. data = 0;
  606. switch (usb_pipetype (pipe)) {
  607. case PIPE_BULK:
  608. info = usb_pipeout (pipe)?
  609. TD_CC | TD_DP_OUT : TD_CC | TD_DP_IN ;
  610. while(data_len > 4096) {
  611. td_fill (ohci, info | (cnt? TD_T_TOGGLE:toggle), data, 4096, dev, cnt, urb);
  612. data += 4096; data_len -= 4096; cnt++;
  613. }
  614. info = usb_pipeout (pipe)?
  615. TD_CC | TD_DP_OUT : TD_CC | TD_R | TD_DP_IN ;
  616. td_fill (ohci, info | (cnt? TD_T_TOGGLE:toggle), data, data_len, dev, cnt, urb);
  617. cnt++;
  618. if (!ohci->sleeping)
  619. writel (OHCI_BLF, &ohci->regs->cmdstatus); /* start bulk list */
  620. break;
  621. case PIPE_CONTROL:
  622. info = TD_CC | TD_DP_SETUP | TD_T_DATA0;
  623. td_fill (ohci, info, setup, 8, dev, cnt++, urb);
  624. if (data_len > 0) {
  625. info = usb_pipeout (pipe)?
  626. TD_CC | TD_R | TD_DP_OUT | TD_T_DATA1 : TD_CC | TD_R | TD_DP_IN | TD_T_DATA1;
  627. /* NOTE: mishandles transfers >8K, some >4K */
  628. td_fill (ohci, info, data, data_len, dev, cnt++, urb);
  629. }
  630. info = usb_pipeout (pipe)?
  631. TD_CC | TD_DP_IN | TD_T_DATA1: TD_CC | TD_DP_OUT | TD_T_DATA1;
  632. td_fill (ohci, info, data, 0, dev, cnt++, urb);
  633. if (!ohci->sleeping)
  634. writel (OHCI_CLF, &ohci->regs->cmdstatus); /* start Control list */
  635. break;
  636. }
  637. if (urb->length != cnt)
  638. dbg("TD LENGTH %d != CNT %d", urb->length, cnt);
  639. }
  640. /*-------------------------------------------------------------------------*
  641. * Done List handling functions
  642. *-------------------------------------------------------------------------*/
  643. /* calculate the transfer length and update the urb */
  644. static void dl_transfer_length(td_t * td)
  645. {
  646. __u32 tdBE, tdCBP;
  647. urb_priv_t *lurb_priv = &urb_priv;
  648. tdBE = ohci_cpu_to_le32 (td->hwBE);
  649. tdCBP = ohci_cpu_to_le32 (td->hwCBP);
  650. if (!(usb_pipecontrol(lurb_priv->pipe) &&
  651. ((td->index == 0) || (td->index == lurb_priv->length - 1)))) {
  652. if (tdBE != 0) {
  653. if (td->hwCBP == 0)
  654. lurb_priv->actual_length += tdBE - td->data + 1;
  655. else
  656. lurb_priv->actual_length += tdCBP - td->data;
  657. }
  658. }
  659. }
  660. /*-------------------------------------------------------------------------*/
  661. /* replies to the request have to be on a FIFO basis so
  662. * we reverse the reversed done-list */
  663. static td_t * dl_reverse_done_list (ohci_t *ohci)
  664. {
  665. __u32 td_list_hc;
  666. td_t *td_rev = NULL;
  667. td_t *td_list = NULL;
  668. urb_priv_t *lurb_priv = NULL;
  669. td_list_hc = ohci_cpu_to_le32 (ohci->hcca->done_head) & 0xfffffff0;
  670. ohci->hcca->done_head = 0;
  671. while (td_list_hc) {
  672. td_list = (td_t *)td_list_hc;
  673. if (TD_CC_GET (ohci_cpu_to_le32 (td_list->hwINFO))) {
  674. lurb_priv = &urb_priv;
  675. dbg(" USB-error/status: %x : %p",
  676. TD_CC_GET (ohci_cpu_to_le32 (td_list->hwINFO)), td_list);
  677. if (td_list->ed->hwHeadP & ohci_cpu_to_le32 (0x1)) {
  678. if (lurb_priv && ((td_list->index + 1) < lurb_priv->length)) {
  679. td_list->ed->hwHeadP =
  680. (lurb_priv->td[lurb_priv->length - 1]->hwNextTD & ohci_cpu_to_le32 (0xfffffff0)) |
  681. (td_list->ed->hwHeadP & ohci_cpu_to_le32 (0x2));
  682. lurb_priv->td_cnt += lurb_priv->length - td_list->index - 1;
  683. } else
  684. td_list->ed->hwHeadP &= ohci_cpu_to_le32 (0xfffffff2);
  685. }
  686. #ifdef CONFIG_MPC5200
  687. td_list->hwNextTD = 0;
  688. #endif
  689. }
  690. td_list->next_dl_td = td_rev;
  691. td_rev = td_list;
  692. td_list_hc = ohci_cpu_to_le32 (td_list->hwNextTD) & 0xfffffff0;
  693. }
  694. return td_list;
  695. }
  696. /*-------------------------------------------------------------------------*/
  697. /* td done list */
  698. static int dl_done_list (ohci_t *ohci, td_t *td_list)
  699. {
  700. td_t *td_list_next = NULL;
  701. ed_t *ed;
  702. int cc = 0;
  703. int stat = 0;
  704. /* urb_t *urb; */
  705. urb_priv_t *lurb_priv;
  706. __u32 tdINFO, edHeadP, edTailP;
  707. while (td_list) {
  708. td_list_next = td_list->next_dl_td;
  709. lurb_priv = &urb_priv;
  710. tdINFO = ohci_cpu_to_le32 (td_list->hwINFO);
  711. ed = td_list->ed;
  712. dl_transfer_length(td_list);
  713. /* error code of transfer */
  714. cc = TD_CC_GET (tdINFO);
  715. if (++(lurb_priv->td_cnt) == lurb_priv->length) {
  716. if ((ed->state & (ED_OPER | ED_UNLINK))
  717. && (lurb_priv->state != URB_DEL)) {
  718. dbg("ConditionCode %#x", cc);
  719. stat = cc_to_error[cc];
  720. urb_finished = 1;
  721. }
  722. }
  723. if (ed->state != ED_NEW) {
  724. edHeadP = ohci_cpu_to_le32 (ed->hwHeadP) & 0xfffffff0;
  725. edTailP = ohci_cpu_to_le32 (ed->hwTailP);
  726. /* unlink eds if they are not busy */
  727. if ((edHeadP == edTailP) && (ed->state == ED_OPER))
  728. ep_unlink (ohci, ed);
  729. }
  730. td_list = td_list_next;
  731. }
  732. return stat;
  733. }
  734. /*-------------------------------------------------------------------------*
  735. * Virtual Root Hub
  736. *-------------------------------------------------------------------------*/
  737. /* Device descriptor */
  738. static __u8 root_hub_dev_des[] =
  739. {
  740. 0x12, /* __u8 bLength; */
  741. 0x01, /* __u8 bDescriptorType; Device */
  742. 0x10, /* __u16 bcdUSB; v1.1 */
  743. 0x01,
  744. 0x09, /* __u8 bDeviceClass; HUB_CLASSCODE */
  745. 0x00, /* __u8 bDeviceSubClass; */
  746. 0x00, /* __u8 bDeviceProtocol; */
  747. 0x08, /* __u8 bMaxPacketSize0; 8 Bytes */
  748. 0x00, /* __u16 idVendor; */
  749. 0x00,
  750. 0x00, /* __u16 idProduct; */
  751. 0x00,
  752. 0x00, /* __u16 bcdDevice; */
  753. 0x00,
  754. 0x00, /* __u8 iManufacturer; */
  755. 0x01, /* __u8 iProduct; */
  756. 0x00, /* __u8 iSerialNumber; */
  757. 0x01 /* __u8 bNumConfigurations; */
  758. };
  759. /* Configuration descriptor */
  760. static __u8 root_hub_config_des[] =
  761. {
  762. 0x09, /* __u8 bLength; */
  763. 0x02, /* __u8 bDescriptorType; Configuration */
  764. 0x19, /* __u16 wTotalLength; */
  765. 0x00,
  766. 0x01, /* __u8 bNumInterfaces; */
  767. 0x01, /* __u8 bConfigurationValue; */
  768. 0x00, /* __u8 iConfiguration; */
  769. 0x40, /* __u8 bmAttributes;
  770. Bit 7: Bus-powered, 6: Self-powered, 5 Remote-wakwup, 4..0: resvd */
  771. 0x00, /* __u8 MaxPower; */
  772. /* interface */
  773. 0x09, /* __u8 if_bLength; */
  774. 0x04, /* __u8 if_bDescriptorType; Interface */
  775. 0x00, /* __u8 if_bInterfaceNumber; */
  776. 0x00, /* __u8 if_bAlternateSetting; */
  777. 0x01, /* __u8 if_bNumEndpoints; */
  778. 0x09, /* __u8 if_bInterfaceClass; HUB_CLASSCODE */
  779. 0x00, /* __u8 if_bInterfaceSubClass; */
  780. 0x00, /* __u8 if_bInterfaceProtocol; */
  781. 0x00, /* __u8 if_iInterface; */
  782. /* endpoint */
  783. 0x07, /* __u8 ep_bLength; */
  784. 0x05, /* __u8 ep_bDescriptorType; Endpoint */
  785. 0x81, /* __u8 ep_bEndpointAddress; IN Endpoint 1 */
  786. 0x03, /* __u8 ep_bmAttributes; Interrupt */
  787. 0x02, /* __u16 ep_wMaxPacketSize; ((MAX_ROOT_PORTS + 1) / 8 */
  788. 0x00,
  789. 0xff /* __u8 ep_bInterval; 255 ms */
  790. };
  791. static unsigned char root_hub_str_index0[] =
  792. {
  793. 0x04, /* __u8 bLength; */
  794. 0x03, /* __u8 bDescriptorType; String-descriptor */
  795. 0x09, /* __u8 lang ID */
  796. 0x04, /* __u8 lang ID */
  797. };
  798. static unsigned char root_hub_str_index1[] =
  799. {
  800. 28, /* __u8 bLength; */
  801. 0x03, /* __u8 bDescriptorType; String-descriptor */
  802. 'O', /* __u8 Unicode */
  803. 0, /* __u8 Unicode */
  804. 'H', /* __u8 Unicode */
  805. 0, /* __u8 Unicode */
  806. 'C', /* __u8 Unicode */
  807. 0, /* __u8 Unicode */
  808. 'I', /* __u8 Unicode */
  809. 0, /* __u8 Unicode */
  810. ' ', /* __u8 Unicode */
  811. 0, /* __u8 Unicode */
  812. 'R', /* __u8 Unicode */
  813. 0, /* __u8 Unicode */
  814. 'o', /* __u8 Unicode */
  815. 0, /* __u8 Unicode */
  816. 'o', /* __u8 Unicode */
  817. 0, /* __u8 Unicode */
  818. 't', /* __u8 Unicode */
  819. 0, /* __u8 Unicode */
  820. ' ', /* __u8 Unicode */
  821. 0, /* __u8 Unicode */
  822. 'H', /* __u8 Unicode */
  823. 0, /* __u8 Unicode */
  824. 'u', /* __u8 Unicode */
  825. 0, /* __u8 Unicode */
  826. 'b', /* __u8 Unicode */
  827. 0, /* __u8 Unicode */
  828. };
  829. /* Hub class-specific descriptor is constructed dynamically */
  830. /*-------------------------------------------------------------------------*/
  831. #define OK(x) len = (x); break
  832. #ifdef DEBUG
  833. #define WR_RH_STAT(x) {info("WR:status %#8x", (x));writel((x), &gohci.regs->roothub.status);}
  834. #define WR_RH_PORTSTAT(x) {info("WR:portstatus[%d] %#8x", wIndex-1, (x));writel((x), &gohci.regs->roothub.portstatus[wIndex-1]);}
  835. #else
  836. #define WR_RH_STAT(x) writel((x), &gohci.regs->roothub.status)
  837. #define WR_RH_PORTSTAT(x) writel((x), &gohci.regs->roothub.portstatus[wIndex-1])
  838. #endif
  839. #define RD_RH_STAT roothub_status(&gohci)
  840. #define RD_RH_PORTSTAT roothub_portstatus(&gohci,wIndex-1)
  841. /* request to virtual root hub */
  842. int rh_check_port_status(ohci_t *controller)
  843. {
  844. __u32 temp, ndp, i;
  845. int res;
  846. res = -1;
  847. temp = roothub_a (controller);
  848. ndp = (temp & RH_A_NDP);
  849. for (i = 0; i < ndp; i++) {
  850. temp = roothub_portstatus (controller, i);
  851. /* check for a device disconnect */
  852. if (((temp & (RH_PS_PESC | RH_PS_CSC)) ==
  853. (RH_PS_PESC | RH_PS_CSC)) &&
  854. ((temp & RH_PS_CCS) == 0)) {
  855. res = i;
  856. break;
  857. }
  858. }
  859. return res;
  860. }
  861. static int ohci_submit_rh_msg(struct usb_device *dev, unsigned long pipe,
  862. void *buffer, int transfer_len, struct devrequest *cmd)
  863. {
  864. void * data = buffer;
  865. int leni = transfer_len;
  866. int len = 0;
  867. int stat = 0;
  868. __u32 datab[4];
  869. __u8 *data_buf = (__u8 *)datab;
  870. __u16 bmRType_bReq;
  871. __u16 wValue;
  872. __u16 wIndex;
  873. __u16 wLength;
  874. #ifdef DEBUG
  875. urb_priv.actual_length = 0;
  876. pkt_print(dev, pipe, buffer, transfer_len, cmd, "SUB(rh)", usb_pipein(pipe));
  877. #endif
  878. if (usb_pipeint(pipe)) {
  879. info("Root-Hub submit IRQ: NOT implemented");
  880. return 0;
  881. }
  882. bmRType_bReq = cmd->requesttype | (cmd->request << 8);
  883. wValue = m16_swap (cmd->value);
  884. wIndex = m16_swap (cmd->index);
  885. wLength = m16_swap (cmd->length);
  886. info("Root-Hub: adr: %2x cmd(%1x): %08x %04x %04x %04x",
  887. dev->devnum, 8, bmRType_bReq, wValue, wIndex, wLength);
  888. switch (bmRType_bReq) {
  889. /* Request Destination:
  890. without flags: Device,
  891. RH_INTERFACE: interface,
  892. RH_ENDPOINT: endpoint,
  893. RH_CLASS means HUB here,
  894. RH_OTHER | RH_CLASS almost ever means HUB_PORT here
  895. */
  896. case RH_GET_STATUS:
  897. *(__u16 *) data_buf = m16_swap (1); OK (2);
  898. case RH_GET_STATUS | RH_INTERFACE:
  899. *(__u16 *) data_buf = m16_swap (0); OK (2);
  900. case RH_GET_STATUS | RH_ENDPOINT:
  901. *(__u16 *) data_buf = m16_swap (0); OK (2);
  902. case RH_GET_STATUS | RH_CLASS:
  903. *(__u32 *) data_buf = m32_swap (
  904. RD_RH_STAT & ~(RH_HS_CRWE | RH_HS_DRWE));
  905. OK (4);
  906. case RH_GET_STATUS | RH_OTHER | RH_CLASS:
  907. *(__u32 *) data_buf = m32_swap (RD_RH_PORTSTAT); OK (4);
  908. case RH_CLEAR_FEATURE | RH_ENDPOINT:
  909. switch (wValue) {
  910. case (RH_ENDPOINT_STALL): OK (0);
  911. }
  912. break;
  913. case RH_CLEAR_FEATURE | RH_CLASS:
  914. switch (wValue) {
  915. case RH_C_HUB_LOCAL_POWER:
  916. OK(0);
  917. case (RH_C_HUB_OVER_CURRENT):
  918. WR_RH_STAT(RH_HS_OCIC); OK (0);
  919. }
  920. break;
  921. case RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS:
  922. switch (wValue) {
  923. case (RH_PORT_ENABLE):
  924. WR_RH_PORTSTAT (RH_PS_CCS ); OK (0);
  925. case (RH_PORT_SUSPEND):
  926. WR_RH_PORTSTAT (RH_PS_POCI); OK (0);
  927. case (RH_PORT_POWER):
  928. WR_RH_PORTSTAT (RH_PS_LSDA); OK (0);
  929. case (RH_C_PORT_CONNECTION):
  930. WR_RH_PORTSTAT (RH_PS_CSC ); OK (0);
  931. case (RH_C_PORT_ENABLE):
  932. WR_RH_PORTSTAT (RH_PS_PESC); OK (0);
  933. case (RH_C_PORT_SUSPEND):
  934. WR_RH_PORTSTAT (RH_PS_PSSC); OK (0);
  935. case (RH_C_PORT_OVER_CURRENT):
  936. WR_RH_PORTSTAT (RH_PS_OCIC); OK (0);
  937. case (RH_C_PORT_RESET):
  938. WR_RH_PORTSTAT (RH_PS_PRSC); OK (0);
  939. }
  940. break;
  941. case RH_SET_FEATURE | RH_OTHER | RH_CLASS:
  942. switch (wValue) {
  943. case (RH_PORT_SUSPEND):
  944. WR_RH_PORTSTAT (RH_PS_PSS ); OK (0);
  945. case (RH_PORT_RESET): /* BUG IN HUP CODE *********/
  946. if (RD_RH_PORTSTAT & RH_PS_CCS)
  947. WR_RH_PORTSTAT (RH_PS_PRS);
  948. OK (0);
  949. case (RH_PORT_POWER):
  950. WR_RH_PORTSTAT (RH_PS_PPS ); OK (0);
  951. case (RH_PORT_ENABLE): /* BUG IN HUP CODE *********/
  952. if (RD_RH_PORTSTAT & RH_PS_CCS)
  953. WR_RH_PORTSTAT (RH_PS_PES );
  954. OK (0);
  955. }
  956. break;
  957. case RH_SET_ADDRESS: gohci.rh.devnum = wValue; OK(0);
  958. case RH_GET_DESCRIPTOR:
  959. switch ((wValue & 0xff00) >> 8) {
  960. case (0x01): /* device descriptor */
  961. len = min_t(unsigned int,
  962. leni,
  963. min_t(unsigned int,
  964. sizeof (root_hub_dev_des),
  965. wLength));
  966. data_buf = root_hub_dev_des; OK(len);
  967. case (0x02): /* configuration descriptor */
  968. len = min_t(unsigned int,
  969. leni,
  970. min_t(unsigned int,
  971. sizeof (root_hub_config_des),
  972. wLength));
  973. data_buf = root_hub_config_des; OK(len);
  974. case (0x03): /* string descriptors */
  975. if(wValue==0x0300) {
  976. len = min_t(unsigned int,
  977. leni,
  978. min_t(unsigned int,
  979. sizeof (root_hub_str_index0),
  980. wLength));
  981. data_buf = root_hub_str_index0;
  982. OK(len);
  983. }
  984. if(wValue==0x0301) {
  985. len = min_t(unsigned int,
  986. leni,
  987. min_t(unsigned int,
  988. sizeof (root_hub_str_index1),
  989. wLength));
  990. data_buf = root_hub_str_index1;
  991. OK(len);
  992. }
  993. default:
  994. stat = USB_ST_STALLED;
  995. }
  996. break;
  997. case RH_GET_DESCRIPTOR | RH_CLASS:
  998. {
  999. __u32 temp = roothub_a (&gohci);
  1000. data_buf [0] = 9; /* min length; */
  1001. data_buf [1] = 0x29;
  1002. data_buf [2] = temp & RH_A_NDP;
  1003. data_buf [3] = 0;
  1004. if (temp & RH_A_PSM) /* per-port power switching? */
  1005. data_buf [3] |= 0x1;
  1006. if (temp & RH_A_NOCP) /* no overcurrent reporting? */
  1007. data_buf [3] |= 0x10;
  1008. else if (temp & RH_A_OCPM) /* per-port overcurrent reporting? */
  1009. data_buf [3] |= 0x8;
  1010. /* corresponds to data_buf[4-7] */
  1011. datab [1] = 0;
  1012. data_buf [5] = (temp & RH_A_POTPGT) >> 24;
  1013. temp = roothub_b (&gohci);
  1014. data_buf [7] = temp & RH_B_DR;
  1015. if (data_buf [2] < 7) {
  1016. data_buf [8] = 0xff;
  1017. } else {
  1018. data_buf [0] += 2;
  1019. data_buf [8] = (temp & RH_B_DR) >> 8;
  1020. data_buf [10] = data_buf [9] = 0xff;
  1021. }
  1022. len = min_t(unsigned int, leni,
  1023. min_t(unsigned int, data_buf [0], wLength));
  1024. OK (len);
  1025. }
  1026. case RH_GET_CONFIGURATION: *(__u8 *) data_buf = 0x01; OK (1);
  1027. case RH_SET_CONFIGURATION: WR_RH_STAT (0x10000); OK (0);
  1028. default:
  1029. dbg ("unsupported root hub command");
  1030. stat = USB_ST_STALLED;
  1031. }
  1032. #ifdef DEBUG
  1033. ohci_dump_roothub (&gohci, 1);
  1034. #endif
  1035. len = min_t(int, len, leni);
  1036. if (data != data_buf)
  1037. memcpy (data, data_buf, len);
  1038. dev->act_len = len;
  1039. dev->status = stat;
  1040. #ifdef DEBUG
  1041. if (transfer_len)
  1042. urb_priv.actual_length = transfer_len;
  1043. pkt_print(dev, pipe, buffer, transfer_len, cmd, "RET(rh)", 0/*usb_pipein(pipe)*/);
  1044. #endif
  1045. return stat;
  1046. }
  1047. /*-------------------------------------------------------------------------*/
  1048. /* common code for handling submit messages - used for all but root hub */
  1049. /* accesses. */
  1050. int submit_common_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
  1051. int transfer_len, struct devrequest *setup, int interval)
  1052. {
  1053. int stat = 0;
  1054. int maxsize = usb_maxpacket(dev, pipe);
  1055. int timeout;
  1056. /* device pulled? Shortcut the action. */
  1057. if (devgone == dev) {
  1058. dev->status = USB_ST_CRC_ERR;
  1059. return 0;
  1060. }
  1061. #ifdef DEBUG
  1062. urb_priv.actual_length = 0;
  1063. pkt_print(dev, pipe, buffer, transfer_len, setup, "SUB", usb_pipein(pipe));
  1064. #endif
  1065. if (!maxsize) {
  1066. err("submit_common_message: pipesize for pipe %lx is zero",
  1067. pipe);
  1068. return -1;
  1069. }
  1070. if (sohci_submit_job(dev, pipe, buffer, transfer_len, setup, interval) < 0) {
  1071. err("sohci_submit_job failed");
  1072. return -1;
  1073. }
  1074. /* allow more time for a BULK device to react - some are slow */
  1075. #define BULK_TO 5000 /* timeout in milliseconds */
  1076. if (usb_pipebulk(pipe))
  1077. timeout = BULK_TO;
  1078. else
  1079. timeout = 100;
  1080. /* wait for it to complete */
  1081. for (;;) {
  1082. /* check whether the controller is done */
  1083. stat = hc_interrupt();
  1084. if (stat < 0) {
  1085. stat = USB_ST_CRC_ERR;
  1086. break;
  1087. }
  1088. /* NOTE: since we are not interrupt driven in U-Boot and always
  1089. * handle only one URB at a time, we cannot assume the
  1090. * transaction finished on the first successful return from
  1091. * hc_interrupt().. unless the flag for current URB is set,
  1092. * meaning that all TD's to/from device got actually
  1093. * transferred and processed. If the current URB is not
  1094. * finished we need to re-iterate this loop so as
  1095. * hc_interrupt() gets called again as there needs to be some
  1096. * more TD's to process still */
  1097. if ((stat >= 0) && (stat != 0xff) && (urb_finished)) {
  1098. /* 0xff is returned for an SF-interrupt */
  1099. break;
  1100. }
  1101. if (--timeout) {
  1102. mdelay(1);
  1103. if (!urb_finished)
  1104. dbg("\%");
  1105. } else {
  1106. err("CTL:TIMEOUT ");
  1107. dbg("submit_common_msg: TO status %x\n", stat);
  1108. stat = USB_ST_CRC_ERR;
  1109. urb_finished = 1;
  1110. break;
  1111. }
  1112. }
  1113. #if 0
  1114. /* we got an Root Hub Status Change interrupt */
  1115. if (got_rhsc) {
  1116. #ifdef DEBUG
  1117. ohci_dump_roothub (&gohci, 1);
  1118. #endif
  1119. got_rhsc = 0;
  1120. /* abuse timeout */
  1121. timeout = rh_check_port_status(&gohci);
  1122. if (timeout >= 0) {
  1123. #if 0 /* this does nothing useful, but leave it here in case that changes */
  1124. /* the called routine adds 1 to the passed value */
  1125. usb_hub_port_connect_change(gohci.rh.dev, timeout - 1);
  1126. #endif
  1127. /*
  1128. * XXX
  1129. * This is potentially dangerous because it assumes
  1130. * that only one device is ever plugged in!
  1131. */
  1132. devgone = dev;
  1133. }
  1134. }
  1135. #endif
  1136. dev->status = stat;
  1137. dev->act_len = transfer_len;
  1138. #ifdef DEBUG
  1139. pkt_print(dev, pipe, buffer, transfer_len, setup, "RET(ctlr)", usb_pipein(pipe));
  1140. #endif
  1141. /* free TDs in urb_priv */
  1142. urb_free_priv (&urb_priv);
  1143. return 0;
  1144. }
  1145. /* submit routines called from usb.c */
  1146. int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
  1147. int transfer_len)
  1148. {
  1149. info("submit_bulk_msg");
  1150. return submit_common_msg(dev, pipe, buffer, transfer_len, NULL, 0);
  1151. }
  1152. int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
  1153. int transfer_len, struct devrequest *setup)
  1154. {
  1155. int maxsize = usb_maxpacket(dev, pipe);
  1156. info("submit_control_msg");
  1157. #ifdef DEBUG
  1158. urb_priv.actual_length = 0;
  1159. pkt_print(dev, pipe, buffer, transfer_len, setup, "SUB", usb_pipein(pipe));
  1160. #endif
  1161. if (!maxsize) {
  1162. err("submit_control_message: pipesize for pipe %lx is zero",
  1163. pipe);
  1164. return -1;
  1165. }
  1166. if (((pipe >> 8) & 0x7f) == gohci.rh.devnum) {
  1167. gohci.rh.dev = dev;
  1168. /* root hub - redirect */
  1169. return ohci_submit_rh_msg(dev, pipe, buffer, transfer_len,
  1170. setup);
  1171. }
  1172. return submit_common_msg(dev, pipe, buffer, transfer_len, setup, 0);
  1173. }
  1174. int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
  1175. int transfer_len, int interval)
  1176. {
  1177. info("submit_int_msg");
  1178. return -1;
  1179. }
  1180. /*-------------------------------------------------------------------------*
  1181. * HC functions
  1182. *-------------------------------------------------------------------------*/
  1183. /* reset the HC and BUS */
  1184. static int hc_reset (ohci_t *ohci)
  1185. {
  1186. int timeout = 30;
  1187. int smm_timeout = 50; /* 0,5 sec */
  1188. if (readl (&ohci->regs->control) & OHCI_CTRL_IR) { /* SMM owns the HC */
  1189. writel (OHCI_OCR, &ohci->regs->cmdstatus); /* request ownership */
  1190. info("USB HC TakeOver from SMM");
  1191. while (readl (&ohci->regs->control) & OHCI_CTRL_IR) {
  1192. mdelay (10);
  1193. if (--smm_timeout == 0) {
  1194. err("USB HC TakeOver failed!");
  1195. return -1;
  1196. }
  1197. }
  1198. }
  1199. /* Disable HC interrupts */
  1200. writel (OHCI_INTR_MIE, &ohci->regs->intrdisable);
  1201. dbg("USB HC reset_hc usb-%s: ctrl = 0x%X ;",
  1202. ohci->slot_name,
  1203. readl (&ohci->regs->control));
  1204. /* Reset USB (needed by some controllers) */
  1205. ohci->hc_control = 0;
  1206. writel (ohci->hc_control, &ohci->regs->control);
  1207. /* HC Reset requires max 10 us delay */
  1208. writel (OHCI_HCR, &ohci->regs->cmdstatus);
  1209. while ((readl (&ohci->regs->cmdstatus) & OHCI_HCR) != 0) {
  1210. if (--timeout == 0) {
  1211. err("USB HC reset timed out!");
  1212. return -1;
  1213. }
  1214. udelay (1);
  1215. }
  1216. return 0;
  1217. }
  1218. /*-------------------------------------------------------------------------*/
  1219. /* Start an OHCI controller, set the BUS operational
  1220. * enable interrupts
  1221. * connect the virtual root hub */
  1222. static int hc_start (ohci_t * ohci)
  1223. {
  1224. __u32 mask;
  1225. unsigned int fminterval;
  1226. ohci->disabled = 1;
  1227. /* Tell the controller where the control and bulk lists are
  1228. * The lists are empty now. */
  1229. writel (0, &ohci->regs->ed_controlhead);
  1230. writel (0, &ohci->regs->ed_bulkhead);
  1231. writel ((__u32)ohci->hcca, &ohci->regs->hcca); /* a reset clears this */
  1232. fminterval = 0x2edf;
  1233. writel ((fminterval * 9) / 10, &ohci->regs->periodicstart);
  1234. fminterval |= ((((fminterval - 210) * 6) / 7) << 16);
  1235. writel (fminterval, &ohci->regs->fminterval);
  1236. writel (0x628, &ohci->regs->lsthresh);
  1237. /* start controller operations */
  1238. ohci->hc_control = OHCI_CONTROL_INIT | OHCI_USB_OPER;
  1239. ohci->disabled = 0;
  1240. writel (ohci->hc_control, &ohci->regs->control);
  1241. /* disable all interrupts */
  1242. mask = (OHCI_INTR_SO | OHCI_INTR_WDH | OHCI_INTR_SF | OHCI_INTR_RD |
  1243. OHCI_INTR_UE | OHCI_INTR_FNO | OHCI_INTR_RHSC |
  1244. OHCI_INTR_OC | OHCI_INTR_MIE);
  1245. writel (mask, &ohci->regs->intrdisable);
  1246. /* clear all interrupts */
  1247. mask &= ~OHCI_INTR_MIE;
  1248. writel (mask, &ohci->regs->intrstatus);
  1249. /* Choose the interrupts we care about now - but w/o MIE */
  1250. mask = OHCI_INTR_RHSC | OHCI_INTR_UE | OHCI_INTR_WDH | OHCI_INTR_SO;
  1251. writel (mask, &ohci->regs->intrenable);
  1252. #ifdef OHCI_USE_NPS
  1253. /* required for AMD-756 and some Mac platforms */
  1254. writel ((roothub_a (ohci) | RH_A_NPS) & ~RH_A_PSM,
  1255. &ohci->regs->roothub.a);
  1256. writel (RH_HS_LPSC, &ohci->regs->roothub.status);
  1257. #endif /* OHCI_USE_NPS */
  1258. /* POTPGT delay is bits 24-31, in 2 ms units. */
  1259. mdelay ((roothub_a (ohci) >> 23) & 0x1fe);
  1260. /* connect the virtual root hub */
  1261. ohci->rh.devnum = 0;
  1262. return 0;
  1263. }
  1264. /*-------------------------------------------------------------------------*/
  1265. /* an interrupt happens */
  1266. static int
  1267. hc_interrupt (void)
  1268. {
  1269. ohci_t *ohci = &gohci;
  1270. struct ohci_regs *regs = ohci->regs;
  1271. int ints;
  1272. int stat = -1;
  1273. if ((ohci->hcca->done_head != 0) &&
  1274. !(ohci_cpu_to_le32(ohci->hcca->done_head) & 0x01)) {
  1275. ints = OHCI_INTR_WDH;
  1276. } else if ((ints = readl (&regs->intrstatus)) == ~(u32)0) {
  1277. ohci->disabled++;
  1278. err ("%s device removed!", ohci->slot_name);
  1279. return -1;
  1280. } else if ((ints &= readl (&regs->intrenable)) == 0) {
  1281. dbg("hc_interrupt: returning..\n");
  1282. return 0xff;
  1283. }
  1284. /* dbg("Interrupt: %x frame: %x", ints, le16_to_cpu (ohci->hcca->frame_no)); */
  1285. if (ints & OHCI_INTR_RHSC) {
  1286. got_rhsc = 1;
  1287. stat = 0xff;
  1288. }
  1289. if (ints & OHCI_INTR_UE) {
  1290. ohci->disabled++;
  1291. err ("OHCI Unrecoverable Error, controller usb-%s disabled",
  1292. ohci->slot_name);
  1293. /* e.g. due to PCI Master/Target Abort */
  1294. #ifdef DEBUG
  1295. ohci_dump (ohci, 1);
  1296. #endif
  1297. /* FIXME: be optimistic, hope that bug won't repeat often. */
  1298. /* Make some non-interrupt context restart the controller. */
  1299. /* Count and limit the retries though; either hardware or */
  1300. /* software errors can go forever... */
  1301. hc_reset (ohci);
  1302. return -1;
  1303. }
  1304. if (ints & OHCI_INTR_WDH) {
  1305. writel (OHCI_INTR_WDH, &regs->intrdisable);
  1306. stat = dl_done_list (&gohci, dl_reverse_done_list (&gohci));
  1307. writel (OHCI_INTR_WDH, &regs->intrenable);
  1308. }
  1309. if (ints & OHCI_INTR_SO) {
  1310. dbg("USB Schedule overrun\n");
  1311. writel (OHCI_INTR_SO, &regs->intrenable);
  1312. stat = -1;
  1313. }
  1314. /* FIXME: this assumes SOF (1/ms) interrupts don't get lost... */
  1315. if (ints & OHCI_INTR_SF) {
  1316. unsigned int frame = ohci_cpu_to_le16 (ohci->hcca->frame_no) & 1;
  1317. mdelay(1);
  1318. writel (OHCI_INTR_SF, &regs->intrdisable);
  1319. if (ohci->ed_rm_list[frame] != NULL)
  1320. writel (OHCI_INTR_SF, &regs->intrenable);
  1321. stat = 0xff;
  1322. }
  1323. writel (ints, &regs->intrstatus);
  1324. return stat;
  1325. }
  1326. /*-------------------------------------------------------------------------*/
  1327. /*-------------------------------------------------------------------------*/
  1328. /* De-allocate all resources.. */
  1329. static void hc_release_ohci (ohci_t *ohci)
  1330. {
  1331. dbg ("USB HC release ohci usb-%s", ohci->slot_name);
  1332. if (!ohci->disabled)
  1333. hc_reset (ohci);
  1334. }
  1335. /*-------------------------------------------------------------------------*/
  1336. /*
  1337. * low level initalisation routine, called from usb.c
  1338. */
  1339. static char ohci_inited = 0;
  1340. int usb_lowlevel_init(int index, void **controller)
  1341. {
  1342. memset (&gohci, 0, sizeof (ohci_t));
  1343. memset (&urb_priv, 0, sizeof (urb_priv_t));
  1344. /* align the storage */
  1345. if ((__u32)&ghcca[0] & 0xff) {
  1346. err("HCCA not aligned!!");
  1347. return -1;
  1348. }
  1349. phcca = &ghcca[0];
  1350. info("aligned ghcca %p", phcca);
  1351. memset(&ohci_dev, 0, sizeof(struct ohci_device));
  1352. if ((__u32)&ohci_dev.ed[0] & 0x7) {
  1353. err("EDs not aligned!!");
  1354. return -1;
  1355. }
  1356. memset(gtd, 0, sizeof(td_t) * (NUM_TD + 1));
  1357. if ((__u32)gtd & 0x7) {
  1358. err("TDs not aligned!!");
  1359. return -1;
  1360. }
  1361. ptd = gtd;
  1362. gohci.hcca = phcca;
  1363. memset (phcca, 0, sizeof (struct ohci_hcca));
  1364. gohci.disabled = 1;
  1365. gohci.sleeping = 0;
  1366. gohci.irq = -1;
  1367. #if defined(CONFIG_440EP)
  1368. gohci.regs = (struct ohci_regs *)(CONFIG_SYS_PERIPHERAL_BASE | 0x1000);
  1369. #elif defined(CONFIG_440EPX) || defined(CONFIG_SYS_USB_HOST)
  1370. gohci.regs = (struct ohci_regs *)(CONFIG_SYS_USB_HOST);
  1371. #endif
  1372. gohci.flags = 0;
  1373. gohci.slot_name = "ppc440";
  1374. if (hc_reset (&gohci) < 0) {
  1375. hc_release_ohci (&gohci);
  1376. return -1;
  1377. }
  1378. if (hc_start (&gohci) < 0) {
  1379. err ("can't start usb-%s", gohci.slot_name);
  1380. hc_release_ohci (&gohci);
  1381. return -1;
  1382. }
  1383. #ifdef DEBUG
  1384. ohci_dump (&gohci, 1);
  1385. #endif
  1386. ohci_inited = 1;
  1387. urb_finished = 1;
  1388. return 0;
  1389. }
  1390. int usb_lowlevel_stop(int index)
  1391. {
  1392. /* this gets called really early - before the controller has */
  1393. /* even been initialized! */
  1394. if (!ohci_inited)
  1395. return 0;
  1396. /* TODO release any interrupts, etc. */
  1397. /* call hc_release_ohci() here ? */
  1398. hc_reset (&gohci);
  1399. return 0;
  1400. }
  1401. #endif /* CONFIG_USB_OHCI */